diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-15 04:02:39 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-15 04:02:39 -0500 |
commit | c09cd6e9691ec6fce8cb90b65929cad389d39c84 (patch) | |
tree | d76104420f72172b21b8fb5ca512baa016ac892b /drivers/gpu/drm/radeon/ni_dma.c | |
parent | 7eb1c496f7ac0f386552c0cd9144f6965fc61da5 (diff) | |
parent | 96ab4c70396e4e5a4d623bc95e86484682bef78f (diff) |
Merge branch 'backlight-rework' into drm-intel-next-queued
Pull in Jani's backlight rework branch. This was merged through a
separate branch to be able to sort out the Broadwell conflicts
properly before pulling it into the main development branch.
Conflicts:
drivers/gpu/drm/i915/intel_display.c
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/radeon/ni_dma.c')
-rw-r--r-- | drivers/gpu/drm/radeon/ni_dma.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c index dd6e9688fbef..bdeb65ed3658 100644 --- a/drivers/gpu/drm/radeon/ni_dma.c +++ b/drivers/gpu/drm/radeon/ni_dma.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <drm/drmP.h> | 24 | #include <drm/drmP.h> |
25 | #include "radeon.h" | 25 | #include "radeon.h" |
26 | #include "radeon_asic.h" | 26 | #include "radeon_asic.h" |
27 | #include "radeon_trace.h" | ||
27 | #include "nid.h" | 28 | #include "nid.h" |
28 | 29 | ||
29 | u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); | 30 | u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); |
@@ -245,8 +246,7 @@ bool cayman_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) | |||
245 | * @addr: dst addr to write into pe | 246 | * @addr: dst addr to write into pe |
246 | * @count: number of page entries to update | 247 | * @count: number of page entries to update |
247 | * @incr: increase next addr by incr bytes | 248 | * @incr: increase next addr by incr bytes |
248 | * @flags: access flags | 249 | * @flags: hw access flags |
249 | * @r600_flags: hw access flags | ||
250 | * | 250 | * |
251 | * Update the page tables using the DMA (cayman/TN). | 251 | * Update the page tables using the DMA (cayman/TN). |
252 | */ | 252 | */ |
@@ -256,11 +256,12 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, | |||
256 | uint64_t addr, unsigned count, | 256 | uint64_t addr, unsigned count, |
257 | uint32_t incr, uint32_t flags) | 257 | uint32_t incr, uint32_t flags) |
258 | { | 258 | { |
259 | uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); | ||
260 | uint64_t value; | 259 | uint64_t value; |
261 | unsigned ndw; | 260 | unsigned ndw; |
262 | 261 | ||
263 | if ((flags & RADEON_VM_PAGE_SYSTEM) || (count == 1)) { | 262 | trace_radeon_vm_set_page(pe, addr, count, incr, flags); |
263 | |||
264 | if ((flags & R600_PTE_SYSTEM) || (count == 1)) { | ||
264 | while (count) { | 265 | while (count) { |
265 | ndw = count * 2; | 266 | ndw = count * 2; |
266 | if (ndw > 0xFFFFE) | 267 | if (ndw > 0xFFFFE) |
@@ -271,16 +272,16 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, | |||
271 | ib->ptr[ib->length_dw++] = pe; | 272 | ib->ptr[ib->length_dw++] = pe; |
272 | ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; | 273 | ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; |
273 | for (; ndw > 0; ndw -= 2, --count, pe += 8) { | 274 | for (; ndw > 0; ndw -= 2, --count, pe += 8) { |
274 | if (flags & RADEON_VM_PAGE_SYSTEM) { | 275 | if (flags & R600_PTE_SYSTEM) { |
275 | value = radeon_vm_map_gart(rdev, addr); | 276 | value = radeon_vm_map_gart(rdev, addr); |
276 | value &= 0xFFFFFFFFFFFFF000ULL; | 277 | value &= 0xFFFFFFFFFFFFF000ULL; |
277 | } else if (flags & RADEON_VM_PAGE_VALID) { | 278 | } else if (flags & R600_PTE_VALID) { |
278 | value = addr; | 279 | value = addr; |
279 | } else { | 280 | } else { |
280 | value = 0; | 281 | value = 0; |
281 | } | 282 | } |
282 | addr += incr; | 283 | addr += incr; |
283 | value |= r600_flags; | 284 | value |= flags; |
284 | ib->ptr[ib->length_dw++] = value; | 285 | ib->ptr[ib->length_dw++] = value; |
285 | ib->ptr[ib->length_dw++] = upper_32_bits(value); | 286 | ib->ptr[ib->length_dw++] = upper_32_bits(value); |
286 | } | 287 | } |
@@ -291,7 +292,7 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, | |||
291 | if (ndw > 0xFFFFE) | 292 | if (ndw > 0xFFFFE) |
292 | ndw = 0xFFFFE; | 293 | ndw = 0xFFFFE; |
293 | 294 | ||
294 | if (flags & RADEON_VM_PAGE_VALID) | 295 | if (flags & R600_PTE_VALID) |
295 | value = addr; | 296 | value = addr; |
296 | else | 297 | else |
297 | value = 0; | 298 | value = 0; |
@@ -299,7 +300,7 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, | |||
299 | ib->ptr[ib->length_dw++] = DMA_PTE_PDE_PACKET(ndw); | 300 | ib->ptr[ib->length_dw++] = DMA_PTE_PDE_PACKET(ndw); |
300 | ib->ptr[ib->length_dw++] = pe; /* dst addr */ | 301 | ib->ptr[ib->length_dw++] = pe; /* dst addr */ |
301 | ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; | 302 | ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; |
302 | ib->ptr[ib->length_dw++] = r600_flags; /* mask */ | 303 | ib->ptr[ib->length_dw++] = flags; /* mask */ |
303 | ib->ptr[ib->length_dw++] = 0; | 304 | ib->ptr[ib->length_dw++] = 0; |
304 | ib->ptr[ib->length_dw++] = value; /* value */ | 305 | ib->ptr[ib->length_dw++] = value; /* value */ |
305 | ib->ptr[ib->length_dw++] = upper_32_bits(value); | 306 | ib->ptr[ib->length_dw++] = upper_32_bits(value); |