drm/radeon: don't reset the MC on IGPs/APUs

The MC isn't part of the GPU per se.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 4 insertions, 2 deletions

diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index b6e80550ed90..170bd03d4dd8 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1474,8 +1474,10 @@ static void cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
         if (reset_mask & RADEON_RESET_VMC)
                 srbm_soft_reset |= SOFT_RESET_VMC;
 
-        if (reset_mask & RADEON_RESET_MC)
-                srbm_soft_reset |= SOFT_RESET_MC;
+        if (!(rdev->flags & RADEON_IS_IGP)) {
+                if (reset_mask & RADEON_RESET_MC)
+                        srbm_soft_reset |= SOFT_RESET_MC;
+        }
 
         if (grbm_soft_reset) {
                 tmp = RREG32(GRBM_SOFT_RESET);