diff options
author | Olof Johansson <olof@lixom.net> | 2013-02-05 01:56:41 -0500 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2013-02-05 01:56:41 -0500 |
commit | 469da62096e23adc755c1268b00b5fc7a214151b (patch) | |
tree | fefd055fdae584e38d551f44d1339eb22cee4ed9 /drivers/gpu/drm/radeon/ni.c | |
parent | 4227961650884a06757f80877d5dce0bddc723d4 (diff) | |
parent | 88b62b915b0b7e25870eb0604ed9a92ba4bfc9f7 (diff) |
Merge tag 'v3.8-rc6' into next/soc
Linux 3.8-rc6
Diffstat (limited to 'drivers/gpu/drm/radeon/ni.c')
-rw-r--r-- | drivers/gpu/drm/radeon/ni.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 896f1cbc58a5..835992d8d067 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
@@ -1216,7 +1216,7 @@ void cayman_dma_stop(struct radeon_device *rdev) | |||
1216 | int cayman_dma_resume(struct radeon_device *rdev) | 1216 | int cayman_dma_resume(struct radeon_device *rdev) |
1217 | { | 1217 | { |
1218 | struct radeon_ring *ring; | 1218 | struct radeon_ring *ring; |
1219 | u32 rb_cntl, dma_cntl; | 1219 | u32 rb_cntl, dma_cntl, ib_cntl; |
1220 | u32 rb_bufsz; | 1220 | u32 rb_bufsz; |
1221 | u32 reg_offset, wb_offset; | 1221 | u32 reg_offset, wb_offset; |
1222 | int i, r; | 1222 | int i, r; |
@@ -1265,7 +1265,11 @@ int cayman_dma_resume(struct radeon_device *rdev) | |||
1265 | WREG32(DMA_RB_BASE + reg_offset, ring->gpu_addr >> 8); | 1265 | WREG32(DMA_RB_BASE + reg_offset, ring->gpu_addr >> 8); |
1266 | 1266 | ||
1267 | /* enable DMA IBs */ | 1267 | /* enable DMA IBs */ |
1268 | WREG32(DMA_IB_CNTL + reg_offset, DMA_IB_ENABLE | CMD_VMID_FORCE); | 1268 | ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; |
1269 | #ifdef __BIG_ENDIAN | ||
1270 | ib_cntl |= DMA_IB_SWAP_ENABLE; | ||
1271 | #endif | ||
1272 | WREG32(DMA_IB_CNTL + reg_offset, ib_cntl); | ||
1269 | 1273 | ||
1270 | dma_cntl = RREG32(DMA_CNTL + reg_offset); | 1274 | dma_cntl = RREG32(DMA_CNTL + reg_offset); |
1271 | dma_cntl &= ~CTXEMPTY_INT_ENABLE; | 1275 | dma_cntl &= ~CTXEMPTY_INT_ENABLE; |
@@ -1409,6 +1413,12 @@ static int cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) | |||
1409 | { | 1413 | { |
1410 | struct evergreen_mc_save save; | 1414 | struct evergreen_mc_save save; |
1411 | 1415 | ||
1416 | if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) | ||
1417 | reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE); | ||
1418 | |||
1419 | if (RREG32(DMA_STATUS_REG) & DMA_IDLE) | ||
1420 | reset_mask &= ~RADEON_RESET_DMA; | ||
1421 | |||
1412 | if (reset_mask == 0) | 1422 | if (reset_mask == 0) |
1413 | return 0; | 1423 | return 0; |
1414 | 1424 | ||