aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/evergreend.h
diff options
context:
space:
mode:
authorJerome Glisse <jglisse@redhat.com>2011-12-16 17:03:42 -0500
committerDave Airlie <airlied@redhat.com>2012-02-13 07:28:13 -0500
commit285484e2d55e76031b45926720c10b1aec8b782a (patch)
treeca2ddf80717feeafa5219485d3bfe32ab837666c /drivers/gpu/drm/radeon/evergreend.h
parentdd220a00e8bd5ad7f98ecdc3eed699a7cfabdc27 (diff)
drm/radeon: add support for evergreen/ni tiling informations v11
evergreen and northern island gpu needs more informations for 2D tiling than previous r6xx/r7xx. Add field to tiling ioctl to allow userspace to provide those. The v8 cs checking change to track color view on r6xx/r7xx doesn't affect old userspace as old userspace always emited 0 for this register. v2 fix r6xx/r7xx 2D tiling computation v3 fix r6xx/r7xx height align for untiled surface & add support for tile split on evergreen and newer v4 improve tiling debugging output v5 fix tile split code for evergreen and newer v6 set proper tile split for crtc register v7 fix tile split limit value v8 add COLOR_VIEW checking to r6xx/r7xx checker, add evergreen cs checking, update safe reg for r600, evergreen and cayman. Evergreen checking need some work around for stencil alignment issues v9 fix tile split value range, fix compressed texture handling and mipmap calculation, allow evergreen check to be silencious in front of current broken userspace (depth/stencil alignment issue) v10 fix eg 3d texture and compressed texture, fix r600 depth array, fix r600 color view computation, add support for evergreen stencil split v11 more verbose debugging in some case Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreend.h')
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h368
1 files changed, 368 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index 50d20da5b5f0..eb5708c7159d 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -926,7 +926,70 @@
926#define DB_DEBUG4 0x983C 926#define DB_DEBUG4 0x983C
927#define DB_WATERMARKS 0x9854 927#define DB_WATERMARKS 0x9854
928#define DB_DEPTH_CONTROL 0x28800 928#define DB_DEPTH_CONTROL 0x28800
929#define R_028800_DB_DEPTH_CONTROL 0x028800
930#define S_028800_STENCIL_ENABLE(x) (((x) & 0x1) << 0)
931#define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1)
932#define C_028800_STENCIL_ENABLE 0xFFFFFFFE
933#define S_028800_Z_ENABLE(x) (((x) & 0x1) << 1)
934#define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1)
935#define C_028800_Z_ENABLE 0xFFFFFFFD
936#define S_028800_Z_WRITE_ENABLE(x) (((x) & 0x1) << 2)
937#define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1)
938#define C_028800_Z_WRITE_ENABLE 0xFFFFFFFB
939#define S_028800_ZFUNC(x) (((x) & 0x7) << 4)
940#define G_028800_ZFUNC(x) (((x) >> 4) & 0x7)
941#define C_028800_ZFUNC 0xFFFFFF8F
942#define S_028800_BACKFACE_ENABLE(x) (((x) & 0x1) << 7)
943#define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1)
944#define C_028800_BACKFACE_ENABLE 0xFFFFFF7F
945#define S_028800_STENCILFUNC(x) (((x) & 0x7) << 8)
946#define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x7)
947#define C_028800_STENCILFUNC 0xFFFFF8FF
948#define V_028800_STENCILFUNC_NEVER 0x00000000
949#define V_028800_STENCILFUNC_LESS 0x00000001
950#define V_028800_STENCILFUNC_EQUAL 0x00000002
951#define V_028800_STENCILFUNC_LEQUAL 0x00000003
952#define V_028800_STENCILFUNC_GREATER 0x00000004
953#define V_028800_STENCILFUNC_NOTEQUAL 0x00000005
954#define V_028800_STENCILFUNC_GEQUAL 0x00000006
955#define V_028800_STENCILFUNC_ALWAYS 0x00000007
956#define S_028800_STENCILFAIL(x) (((x) & 0x7) << 11)
957#define G_028800_STENCILFAIL(x) (((x) >> 11) & 0x7)
958#define C_028800_STENCILFAIL 0xFFFFC7FF
959#define V_028800_STENCIL_KEEP 0x00000000
960#define V_028800_STENCIL_ZERO 0x00000001
961#define V_028800_STENCIL_REPLACE 0x00000002
962#define V_028800_STENCIL_INCR 0x00000003
963#define V_028800_STENCIL_DECR 0x00000004
964#define V_028800_STENCIL_INVERT 0x00000005
965#define V_028800_STENCIL_INCR_WRAP 0x00000006
966#define V_028800_STENCIL_DECR_WRAP 0x00000007
967#define S_028800_STENCILZPASS(x) (((x) & 0x7) << 14)
968#define G_028800_STENCILZPASS(x) (((x) >> 14) & 0x7)
969#define C_028800_STENCILZPASS 0xFFFE3FFF
970#define S_028800_STENCILZFAIL(x) (((x) & 0x7) << 17)
971#define G_028800_STENCILZFAIL(x) (((x) >> 17) & 0x7)
972#define C_028800_STENCILZFAIL 0xFFF1FFFF
973#define S_028800_STENCILFUNC_BF(x) (((x) & 0x7) << 20)
974#define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x7)
975#define C_028800_STENCILFUNC_BF 0xFF8FFFFF
976#define S_028800_STENCILFAIL_BF(x) (((x) & 0x7) << 23)
977#define G_028800_STENCILFAIL_BF(x) (((x) >> 23) & 0x7)
978#define C_028800_STENCILFAIL_BF 0xFC7FFFFF
979#define S_028800_STENCILZPASS_BF(x) (((x) & 0x7) << 26)
980#define G_028800_STENCILZPASS_BF(x) (((x) >> 26) & 0x7)
981#define C_028800_STENCILZPASS_BF 0xE3FFFFFF
982#define S_028800_STENCILZFAIL_BF(x) (((x) & 0x7) << 29)
983#define G_028800_STENCILZFAIL_BF(x) (((x) >> 29) & 0x7)
984#define C_028800_STENCILZFAIL_BF 0x1FFFFFFF
929#define DB_DEPTH_VIEW 0x28008 985#define DB_DEPTH_VIEW 0x28008
986#define R_028008_DB_DEPTH_VIEW 0x00028008
987#define S_028008_SLICE_START(x) (((x) & 0x7FF) << 0)
988#define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF)
989#define C_028008_SLICE_START 0xFFFFF800
990#define S_028008_SLICE_MAX(x) (((x) & 0x7FF) << 13)
991#define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF)
992#define C_028008_SLICE_MAX 0xFF001FFF
930#define DB_HTILE_DATA_BASE 0x28014 993#define DB_HTILE_DATA_BASE 0x28014
931#define DB_Z_INFO 0x28040 994#define DB_Z_INFO 0x28040
932# define Z_ARRAY_MODE(x) ((x) << 4) 995# define Z_ARRAY_MODE(x) ((x) << 4)
@@ -934,12 +997,59 @@
934# define DB_NUM_BANKS(x) (((x) & 0x3) << 12) 997# define DB_NUM_BANKS(x) (((x) & 0x3) << 12)
935# define DB_BANK_WIDTH(x) (((x) & 0x3) << 16) 998# define DB_BANK_WIDTH(x) (((x) & 0x3) << 16)
936# define DB_BANK_HEIGHT(x) (((x) & 0x3) << 20) 999# define DB_BANK_HEIGHT(x) (((x) & 0x3) << 20)
1000# define DB_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 24)
1001#define R_028040_DB_Z_INFO 0x028040
1002#define S_028040_FORMAT(x) (((x) & 0x3) << 0)
1003#define G_028040_FORMAT(x) (((x) >> 0) & 0x3)
1004#define C_028040_FORMAT 0xFFFFFFFC
1005#define V_028040_Z_INVALID 0x00000000
1006#define V_028040_Z_16 0x00000001
1007#define V_028040_Z_24 0x00000002
1008#define V_028040_Z_32_FLOAT 0x00000003
1009#define S_028040_ARRAY_MODE(x) (((x) & 0xF) << 4)
1010#define G_028040_ARRAY_MODE(x) (((x) >> 4) & 0xF)
1011#define C_028040_ARRAY_MODE 0xFFFFFF0F
1012#define S_028040_READ_SIZE(x) (((x) & 0x1) << 28)
1013#define G_028040_READ_SIZE(x) (((x) >> 28) & 0x1)
1014#define C_028040_READ_SIZE 0xEFFFFFFF
1015#define S_028040_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 29)
1016#define G_028040_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1)
1017#define C_028040_TILE_SURFACE_ENABLE 0xDFFFFFFF
1018#define S_028040_ZRANGE_PRECISION(x) (((x) & 0x1) << 31)
1019#define G_028040_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1)
1020#define C_028040_ZRANGE_PRECISION 0x7FFFFFFF
1021#define S_028040_TILE_SPLIT(x) (((x) & 0x7) << 8)
1022#define G_028040_TILE_SPLIT(x) (((x) >> 8) & 0x7)
1023#define S_028040_NUM_BANKS(x) (((x) & 0x3) << 12)
1024#define G_028040_NUM_BANKS(x) (((x) >> 12) & 0x3)
1025#define S_028040_BANK_WIDTH(x) (((x) & 0x3) << 16)
1026#define G_028040_BANK_WIDTH(x) (((x) >> 16) & 0x3)
1027#define S_028040_BANK_HEIGHT(x) (((x) & 0x3) << 20)
1028#define G_028040_BANK_HEIGHT(x) (((x) >> 20) & 0x3)
1029#define S_028040_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 24)
1030#define G_028040_MACRO_TILE_ASPECT(x) (((x) >> 24) & 0x3)
937#define DB_STENCIL_INFO 0x28044 1031#define DB_STENCIL_INFO 0x28044
1032#define R_028044_DB_STENCIL_INFO 0x028044
1033#define S_028044_FORMAT(x) (((x) & 0x1) << 0)
1034#define G_028044_FORMAT(x) (((x) >> 0) & 0x1)
1035#define C_028044_FORMAT 0xFFFFFFFE
1036#define G_028044_TILE_SPLIT(x) (((x) >> 8) & 0x7)
938#define DB_Z_READ_BASE 0x28048 1037#define DB_Z_READ_BASE 0x28048
939#define DB_STENCIL_READ_BASE 0x2804c 1038#define DB_STENCIL_READ_BASE 0x2804c
940#define DB_Z_WRITE_BASE 0x28050 1039#define DB_Z_WRITE_BASE 0x28050
941#define DB_STENCIL_WRITE_BASE 0x28054 1040#define DB_STENCIL_WRITE_BASE 0x28054
942#define DB_DEPTH_SIZE 0x28058 1041#define DB_DEPTH_SIZE 0x28058
1042#define R_028058_DB_DEPTH_SIZE 0x028058
1043#define S_028058_PITCH_TILE_MAX(x) (((x) & 0x7FF) << 0)
1044#define G_028058_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF)
1045#define C_028058_PITCH_TILE_MAX 0xFFFFF800
1046#define S_028058_HEIGHT_TILE_MAX(x) (((x) & 0x7FF) << 11)
1047#define G_028058_HEIGHT_TILE_MAX(x) (((x) >> 11) & 0x7FF)
1048#define C_028058_HEIGHT_TILE_MAX 0xFFC007FF
1049#define R_02805C_DB_DEPTH_SLICE 0x02805C
1050#define S_02805C_SLICE_TILE_MAX(x) (((x) & 0x3FFFFF) << 0)
1051#define G_02805C_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF)
1052#define C_02805C_SLICE_TILE_MAX 0xFFC00000
943 1053
944#define SQ_PGM_START_PS 0x28840 1054#define SQ_PGM_START_PS 0x28840
945#define SQ_PGM_START_VS 0x2885c 1055#define SQ_PGM_START_VS 0x2885c
@@ -983,6 +1093,114 @@
983#define CB_COLOR0_PITCH 0x28c64 1093#define CB_COLOR0_PITCH 0x28c64
984#define CB_COLOR0_SLICE 0x28c68 1094#define CB_COLOR0_SLICE 0x28c68
985#define CB_COLOR0_VIEW 0x28c6c 1095#define CB_COLOR0_VIEW 0x28c6c
1096#define R_028C6C_CB_COLOR0_VIEW 0x00028C6C
1097#define S_028C6C_SLICE_START(x) (((x) & 0x7FF) << 0)
1098#define G_028C6C_SLICE_START(x) (((x) >> 0) & 0x7FF)
1099#define C_028C6C_SLICE_START 0xFFFFF800
1100#define S_028C6C_SLICE_MAX(x) (((x) & 0x7FF) << 13)
1101#define G_028C6C_SLICE_MAX(x) (((x) >> 13) & 0x7FF)
1102#define C_028C6C_SLICE_MAX 0xFF001FFF
1103#define R_028C70_CB_COLOR0_INFO 0x028C70
1104#define S_028C70_ENDIAN(x) (((x) & 0x3) << 0)
1105#define G_028C70_ENDIAN(x) (((x) >> 0) & 0x3)
1106#define C_028C70_ENDIAN 0xFFFFFFFC
1107#define S_028C70_FORMAT(x) (((x) & 0x3F) << 2)
1108#define G_028C70_FORMAT(x) (((x) >> 2) & 0x3F)
1109#define C_028C70_FORMAT 0xFFFFFF03
1110#define V_028C70_COLOR_INVALID 0x00000000
1111#define V_028C70_COLOR_8 0x00000001
1112#define V_028C70_COLOR_4_4 0x00000002
1113#define V_028C70_COLOR_3_3_2 0x00000003
1114#define V_028C70_COLOR_16 0x00000005
1115#define V_028C70_COLOR_16_FLOAT 0x00000006
1116#define V_028C70_COLOR_8_8 0x00000007
1117#define V_028C70_COLOR_5_6_5 0x00000008
1118#define V_028C70_COLOR_6_5_5 0x00000009
1119#define V_028C70_COLOR_1_5_5_5 0x0000000A
1120#define V_028C70_COLOR_4_4_4_4 0x0000000B
1121#define V_028C70_COLOR_5_5_5_1 0x0000000C
1122#define V_028C70_COLOR_32 0x0000000D
1123#define V_028C70_COLOR_32_FLOAT 0x0000000E
1124#define V_028C70_COLOR_16_16 0x0000000F
1125#define V_028C70_COLOR_16_16_FLOAT 0x00000010
1126#define V_028C70_COLOR_8_24 0x00000011
1127#define V_028C70_COLOR_8_24_FLOAT 0x00000012
1128#define V_028C70_COLOR_24_8 0x00000013
1129#define V_028C70_COLOR_24_8_FLOAT 0x00000014
1130#define V_028C70_COLOR_10_11_11 0x00000015
1131#define V_028C70_COLOR_10_11_11_FLOAT 0x00000016
1132#define V_028C70_COLOR_11_11_10 0x00000017
1133#define V_028C70_COLOR_11_11_10_FLOAT 0x00000018
1134#define V_028C70_COLOR_2_10_10_10 0x00000019
1135#define V_028C70_COLOR_8_8_8_8 0x0000001A
1136#define V_028C70_COLOR_10_10_10_2 0x0000001B
1137#define V_028C70_COLOR_X24_8_32_FLOAT 0x0000001C
1138#define V_028C70_COLOR_32_32 0x0000001D
1139#define V_028C70_COLOR_32_32_FLOAT 0x0000001E
1140#define V_028C70_COLOR_16_16_16_16 0x0000001F
1141#define V_028C70_COLOR_16_16_16_16_FLOAT 0x00000020
1142#define V_028C70_COLOR_32_32_32_32 0x00000022
1143#define V_028C70_COLOR_32_32_32_32_FLOAT 0x00000023
1144#define V_028C70_COLOR_32_32_32_FLOAT 0x00000030
1145#define S_028C70_ARRAY_MODE(x) (((x) & 0xF) << 8)
1146#define G_028C70_ARRAY_MODE(x) (((x) >> 8) & 0xF)
1147#define C_028C70_ARRAY_MODE 0xFFFFF0FF
1148#define V_028C70_ARRAY_LINEAR_GENERAL 0x00000000
1149#define V_028C70_ARRAY_LINEAR_ALIGNED 0x00000001
1150#define V_028C70_ARRAY_1D_TILED_THIN1 0x00000002
1151#define V_028C70_ARRAY_2D_TILED_THIN1 0x00000004
1152#define S_028C70_NUMBER_TYPE(x) (((x) & 0x7) << 12)
1153#define G_028C70_NUMBER_TYPE(x) (((x) >> 12) & 0x7)
1154#define C_028C70_NUMBER_TYPE 0xFFFF8FFF
1155#define V_028C70_NUMBER_UNORM 0x00000000
1156#define V_028C70_NUMBER_SNORM 0x00000001
1157#define V_028C70_NUMBER_USCALED 0x00000002
1158#define V_028C70_NUMBER_SSCALED 0x00000003
1159#define V_028C70_NUMBER_UINT 0x00000004
1160#define V_028C70_NUMBER_SINT 0x00000005
1161#define V_028C70_NUMBER_SRGB 0x00000006
1162#define V_028C70_NUMBER_FLOAT 0x00000007
1163#define S_028C70_COMP_SWAP(x) (((x) & 0x3) << 15)
1164#define G_028C70_COMP_SWAP(x) (((x) >> 15) & 0x3)
1165#define C_028C70_COMP_SWAP 0xFFFE7FFF
1166#define V_028C70_SWAP_STD 0x00000000
1167#define V_028C70_SWAP_ALT 0x00000001
1168#define V_028C70_SWAP_STD_REV 0x00000002
1169#define V_028C70_SWAP_ALT_REV 0x00000003
1170#define S_028C70_FAST_CLEAR(x) (((x) & 0x1) << 17)
1171#define G_028C70_FAST_CLEAR(x) (((x) >> 17) & 0x1)
1172#define C_028C70_FAST_CLEAR 0xFFFDFFFF
1173#define S_028C70_COMPRESSION(x) (((x) & 0x3) << 18)
1174#define G_028C70_COMPRESSION(x) (((x) >> 18) & 0x3)
1175#define C_028C70_COMPRESSION 0xFFF3FFFF
1176#define S_028C70_BLEND_CLAMP(x) (((x) & 0x1) << 19)
1177#define G_028C70_BLEND_CLAMP(x) (((x) >> 19) & 0x1)
1178#define C_028C70_BLEND_CLAMP 0xFFF7FFFF
1179#define S_028C70_BLEND_BYPASS(x) (((x) & 0x1) << 20)
1180#define G_028C70_BLEND_BYPASS(x) (((x) >> 20) & 0x1)
1181#define C_028C70_BLEND_BYPASS 0xFFEFFFFF
1182#define S_028C70_SIMPLE_FLOAT(x) (((x) & 0x1) << 21)
1183#define G_028C70_SIMPLE_FLOAT(x) (((x) >> 21) & 0x1)
1184#define C_028C70_SIMPLE_FLOAT 0xFFDFFFFF
1185#define S_028C70_ROUND_MODE(x) (((x) & 0x1) << 22)
1186#define G_028C70_ROUND_MODE(x) (((x) >> 22) & 0x1)
1187#define C_028C70_ROUND_MODE 0xFFBFFFFF
1188#define S_028C70_TILE_COMPACT(x) (((x) & 0x1) << 23)
1189#define G_028C70_TILE_COMPACT(x) (((x) >> 23) & 0x1)
1190#define C_028C70_TILE_COMPACT 0xFF7FFFFF
1191#define S_028C70_SOURCE_FORMAT(x) (((x) & 0x3) << 24)
1192#define G_028C70_SOURCE_FORMAT(x) (((x) >> 24) & 0x3)
1193#define C_028C70_SOURCE_FORMAT 0xFCFFFFFF
1194#define V_028C70_EXPORT_4C_32BPC 0x0
1195#define V_028C70_EXPORT_4C_16BPC 0x1
1196#define V_028C70_EXPORT_2C_32BPC 0x2 /* Do not use */
1197#define S_028C70_RAT(x) (((x) & 0x1) << 26)
1198#define G_028C70_RAT(x) (((x) >> 26) & 0x1)
1199#define C_028C70_RAT 0xFBFFFFFF
1200#define S_028C70_RESOURCE_TYPE(x) (((x) & 0x7) << 27)
1201#define G_028C70_RESOURCE_TYPE(x) (((x) >> 27) & 0x7)
1202#define C_028C70_RESOURCE_TYPE 0xC7FFFFFF
1203
986#define CB_COLOR0_INFO 0x28c70 1204#define CB_COLOR0_INFO 0x28c70
987# define CB_FORMAT(x) ((x) << 2) 1205# define CB_FORMAT(x) ((x) << 2)
988# define CB_ARRAY_MODE(x) ((x) << 8) 1206# define CB_ARRAY_MODE(x) ((x) << 8)
@@ -993,6 +1211,20 @@
993# define CB_SOURCE_FORMAT(x) ((x) << 24) 1211# define CB_SOURCE_FORMAT(x) ((x) << 24)
994# define CB_SF_EXPORT_FULL 0 1212# define CB_SF_EXPORT_FULL 0
995# define CB_SF_EXPORT_NORM 1 1213# define CB_SF_EXPORT_NORM 1
1214#define R_028C74_CB_COLOR0_ATTRIB 0x028C74
1215#define S_028C74_NON_DISP_TILING_ORDER(x) (((x) & 0x1) << 4)
1216#define G_028C74_NON_DISP_TILING_ORDER(x) (((x) >> 4) & 0x1)
1217#define C_028C74_NON_DISP_TILING_ORDER 0xFFFFFFEF
1218#define S_028C74_TILE_SPLIT(x) (((x) & 0xf) << 5)
1219#define G_028C74_TILE_SPLIT(x) (((x) >> 5) & 0xf)
1220#define S_028C74_NUM_BANKS(x) (((x) & 0x3) << 10)
1221#define G_028C74_NUM_BANKS(x) (((x) >> 10) & 0x3)
1222#define S_028C74_BANK_WIDTH(x) (((x) & 0x3) << 13)
1223#define G_028C74_BANK_WIDTH(x) (((x) >> 13) & 0x3)
1224#define S_028C74_BANK_HEIGHT(x) (((x) & 0x3) << 16)
1225#define G_028C74_BANK_HEIGHT(x) (((x) >> 16) & 0x3)
1226#define S_028C74_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 19)
1227#define G_028C74_MACRO_TILE_ASPECT(x) (((x) >> 19) & 0x3)
996#define CB_COLOR0_ATTRIB 0x28c74 1228#define CB_COLOR0_ATTRIB 0x28c74
997# define CB_TILE_SPLIT(x) (((x) & 0x7) << 5) 1229# define CB_TILE_SPLIT(x) (((x) & 0x7) << 5)
998# define ADDR_SURF_TILE_SPLIT_64B 0 1230# define ADDR_SURF_TILE_SPLIT_64B 0
@@ -1017,6 +1249,7 @@
1017# define ADDR_SURF_BANK_HEIGHT_2 1 1249# define ADDR_SURF_BANK_HEIGHT_2 1
1018# define ADDR_SURF_BANK_HEIGHT_4 2 1250# define ADDR_SURF_BANK_HEIGHT_4 2
1019# define ADDR_SURF_BANK_HEIGHT_8 3 1251# define ADDR_SURF_BANK_HEIGHT_8 3
1252# define CB_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 19)
1020#define CB_COLOR0_DIM 0x28c78 1253#define CB_COLOR0_DIM 0x28c78
1021/* only CB0-7 blocks have these regs */ 1254/* only CB0-7 blocks have these regs */
1022#define CB_COLOR0_CMASK 0x28c7c 1255#define CB_COLOR0_CMASK 0x28c7c
@@ -1205,9 +1438,144 @@
1205#define SQ_TEX_RESOURCE_WORD6_0 0x30018 1438#define SQ_TEX_RESOURCE_WORD6_0 0x30018
1206# define TEX_TILE_SPLIT(x) (((x) & 0x7) << 29) 1439# define TEX_TILE_SPLIT(x) (((x) & 0x7) << 29)
1207#define SQ_TEX_RESOURCE_WORD7_0 0x3001c 1440#define SQ_TEX_RESOURCE_WORD7_0 0x3001c
1441# define MACRO_TILE_ASPECT(x) (((x) & 0x3) << 6)
1208# define TEX_BANK_WIDTH(x) (((x) & 0x3) << 8) 1442# define TEX_BANK_WIDTH(x) (((x) & 0x3) << 8)
1209# define TEX_BANK_HEIGHT(x) (((x) & 0x3) << 10) 1443# define TEX_BANK_HEIGHT(x) (((x) & 0x3) << 10)
1210# define TEX_NUM_BANKS(x) (((x) & 0x3) << 16) 1444# define TEX_NUM_BANKS(x) (((x) & 0x3) << 16)
1445#define R_030000_SQ_TEX_RESOURCE_WORD0_0 0x030000
1446#define S_030000_DIM(x) (((x) & 0x7) << 0)
1447#define G_030000_DIM(x) (((x) >> 0) & 0x7)
1448#define C_030000_DIM 0xFFFFFFF8
1449#define V_030000_SQ_TEX_DIM_1D 0x00000000
1450#define V_030000_SQ_TEX_DIM_2D 0x00000001
1451#define V_030000_SQ_TEX_DIM_3D 0x00000002
1452#define V_030000_SQ_TEX_DIM_CUBEMAP 0x00000003
1453#define V_030000_SQ_TEX_DIM_1D_ARRAY 0x00000004
1454#define V_030000_SQ_TEX_DIM_2D_ARRAY 0x00000005
1455#define V_030000_SQ_TEX_DIM_2D_MSAA 0x00000006
1456#define V_030000_SQ_TEX_DIM_2D_ARRAY_MSAA 0x00000007
1457#define S_030000_NON_DISP_TILING_ORDER(x) (((x) & 0x1) << 5)
1458#define G_030000_NON_DISP_TILING_ORDER(x) (((x) >> 5) & 0x1)
1459#define C_030000_NON_DISP_TILING_ORDER 0xFFFFFFDF
1460#define S_030000_PITCH(x) (((x) & 0xFFF) << 6)
1461#define G_030000_PITCH(x) (((x) >> 6) & 0xFFF)
1462#define C_030000_PITCH 0xFFFC003F
1463#define S_030000_TEX_WIDTH(x) (((x) & 0x3FFF) << 18)
1464#define G_030000_TEX_WIDTH(x) (((x) >> 18) & 0x3FFF)
1465#define C_030000_TEX_WIDTH 0x0003FFFF
1466#define R_030004_SQ_TEX_RESOURCE_WORD1_0 0x030004
1467#define S_030004_TEX_HEIGHT(x) (((x) & 0x3FFF) << 0)
1468#define G_030004_TEX_HEIGHT(x) (((x) >> 0) & 0x3FFF)
1469#define C_030004_TEX_HEIGHT 0xFFFFC000
1470#define S_030004_TEX_DEPTH(x) (((x) & 0x1FFF) << 14)
1471#define G_030004_TEX_DEPTH(x) (((x) >> 14) & 0x1FFF)
1472#define C_030004_TEX_DEPTH 0xF8003FFF
1473#define S_030004_ARRAY_MODE(x) (((x) & 0xF) << 28)
1474#define G_030004_ARRAY_MODE(x) (((x) >> 28) & 0xF)
1475#define C_030004_ARRAY_MODE 0x0FFFFFFF
1476#define R_030008_SQ_TEX_RESOURCE_WORD2_0 0x030008
1477#define S_030008_BASE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0)
1478#define G_030008_BASE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF)
1479#define C_030008_BASE_ADDRESS 0x00000000
1480#define R_03000C_SQ_TEX_RESOURCE_WORD3_0 0x03000C
1481#define S_03000C_MIP_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0)
1482#define G_03000C_MIP_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF)
1483#define C_03000C_MIP_ADDRESS 0x00000000
1484#define R_030010_SQ_TEX_RESOURCE_WORD4_0 0x030010
1485#define S_030010_FORMAT_COMP_X(x) (((x) & 0x3) << 0)
1486#define G_030010_FORMAT_COMP_X(x) (((x) >> 0) & 0x3)
1487#define C_030010_FORMAT_COMP_X 0xFFFFFFFC
1488#define V_030010_SQ_FORMAT_COMP_UNSIGNED 0x00000000
1489#define V_030010_SQ_FORMAT_COMP_SIGNED 0x00000001
1490#define V_030010_SQ_FORMAT_COMP_UNSIGNED_BIASED 0x00000002
1491#define S_030010_FORMAT_COMP_Y(x) (((x) & 0x3) << 2)
1492#define G_030010_FORMAT_COMP_Y(x) (((x) >> 2) & 0x3)
1493#define C_030010_FORMAT_COMP_Y 0xFFFFFFF3
1494#define S_030010_FORMAT_COMP_Z(x) (((x) & 0x3) << 4)
1495#define G_030010_FORMAT_COMP_Z(x) (((x) >> 4) & 0x3)
1496#define C_030010_FORMAT_COMP_Z 0xFFFFFFCF
1497#define S_030010_FORMAT_COMP_W(x) (((x) & 0x3) << 6)
1498#define G_030010_FORMAT_COMP_W(x) (((x) >> 6) & 0x3)
1499#define C_030010_FORMAT_COMP_W 0xFFFFFF3F
1500#define S_030010_NUM_FORMAT_ALL(x) (((x) & 0x3) << 8)
1501#define G_030010_NUM_FORMAT_ALL(x) (((x) >> 8) & 0x3)
1502#define C_030010_NUM_FORMAT_ALL 0xFFFFFCFF
1503#define V_030010_SQ_NUM_FORMAT_NORM 0x00000000
1504#define V_030010_SQ_NUM_FORMAT_INT 0x00000001
1505#define V_030010_SQ_NUM_FORMAT_SCALED 0x00000002
1506#define S_030010_SRF_MODE_ALL(x) (((x) & 0x1) << 10)
1507#define G_030010_SRF_MODE_ALL(x) (((x) >> 10) & 0x1)
1508#define C_030010_SRF_MODE_ALL 0xFFFFFBFF
1509#define V_030010_SRF_MODE_ZERO_CLAMP_MINUS_ONE 0x00000000
1510#define V_030010_SRF_MODE_NO_ZERO 0x00000001
1511#define S_030010_FORCE_DEGAMMA(x) (((x) & 0x1) << 11)
1512#define G_030010_FORCE_DEGAMMA(x) (((x) >> 11) & 0x1)
1513#define C_030010_FORCE_DEGAMMA 0xFFFFF7FF
1514#define S_030010_ENDIAN_SWAP(x) (((x) & 0x3) << 12)
1515#define G_030010_ENDIAN_SWAP(x) (((x) >> 12) & 0x3)
1516#define C_030010_ENDIAN_SWAP 0xFFFFCFFF
1517#define S_030010_DST_SEL_X(x) (((x) & 0x7) << 16)
1518#define G_030010_DST_SEL_X(x) (((x) >> 16) & 0x7)
1519#define C_030010_DST_SEL_X 0xFFF8FFFF
1520#define V_030010_SQ_SEL_X 0x00000000
1521#define V_030010_SQ_SEL_Y 0x00000001
1522#define V_030010_SQ_SEL_Z 0x00000002
1523#define V_030010_SQ_SEL_W 0x00000003
1524#define V_030010_SQ_SEL_0 0x00000004
1525#define V_030010_SQ_SEL_1 0x00000005
1526#define S_030010_DST_SEL_Y(x) (((x) & 0x7) << 19)
1527#define G_030010_DST_SEL_Y(x) (((x) >> 19) & 0x7)
1528#define C_030010_DST_SEL_Y 0xFFC7FFFF
1529#define S_030010_DST_SEL_Z(x) (((x) & 0x7) << 22)
1530#define G_030010_DST_SEL_Z(x) (((x) >> 22) & 0x7)
1531#define C_030010_DST_SEL_Z 0xFE3FFFFF
1532#define S_030010_DST_SEL_W(x) (((x) & 0x7) << 25)
1533#define G_030010_DST_SEL_W(x) (((x) >> 25) & 0x7)
1534#define C_030010_DST_SEL_W 0xF1FFFFFF
1535#define S_030010_BASE_LEVEL(x) (((x) & 0xF) << 28)
1536#define G_030010_BASE_LEVEL(x) (((x) >> 28) & 0xF)
1537#define C_030010_BASE_LEVEL 0x0FFFFFFF
1538#define R_030014_SQ_TEX_RESOURCE_WORD5_0 0x030014
1539#define S_030014_LAST_LEVEL(x) (((x) & 0xF) << 0)
1540#define G_030014_LAST_LEVEL(x) (((x) >> 0) & 0xF)
1541#define C_030014_LAST_LEVEL 0xFFFFFFF0
1542#define S_030014_BASE_ARRAY(x) (((x) & 0x1FFF) << 4)
1543#define G_030014_BASE_ARRAY(x) (((x) >> 4) & 0x1FFF)
1544#define C_030014_BASE_ARRAY 0xFFFE000F
1545#define S_030014_LAST_ARRAY(x) (((x) & 0x1FFF) << 17)
1546#define G_030014_LAST_ARRAY(x) (((x) >> 17) & 0x1FFF)
1547#define C_030014_LAST_ARRAY 0xC001FFFF
1548#define R_030018_SQ_TEX_RESOURCE_WORD6_0 0x030018
1549#define S_030018_MAX_ANISO(x) (((x) & 0x7) << 0)
1550#define G_030018_MAX_ANISO(x) (((x) >> 0) & 0x7)
1551#define C_030018_MAX_ANISO 0xFFFFFFF8
1552#define S_030018_PERF_MODULATION(x) (((x) & 0x7) << 3)
1553#define G_030018_PERF_MODULATION(x) (((x) >> 3) & 0x7)
1554#define C_030018_PERF_MODULATION 0xFFFFFFC7
1555#define S_030018_INTERLACED(x) (((x) & 0x1) << 6)
1556#define G_030018_INTERLACED(x) (((x) >> 6) & 0x1)
1557#define C_030018_INTERLACED 0xFFFFFFBF
1558#define S_030018_TILE_SPLIT(x) (((x) & 0x7) << 29)
1559#define G_030018_TILE_SPLIT(x) (((x) >> 29) & 0x7)
1560#define R_03001C_SQ_TEX_RESOURCE_WORD7_0 0x03001C
1561#define S_03001C_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 6)
1562#define G_03001C_MACRO_TILE_ASPECT(x) (((x) >> 6) & 0x3)
1563#define S_03001C_BANK_WIDTH(x) (((x) & 0x3) << 8)
1564#define G_03001C_BANK_WIDTH(x) (((x) >> 8) & 0x3)
1565#define S_03001C_BANK_HEIGHT(x) (((x) & 0x3) << 10)
1566#define G_03001C_BANK_HEIGHT(x) (((x) >> 10) & 0x3)
1567#define S_03001C_NUM_BANKS(x) (((x) & 0x3) << 16)
1568#define G_03001C_NUM_BANKS(x) (((x) >> 16) & 0x3)
1569#define S_03001C_TYPE(x) (((x) & 0x3) << 30)
1570#define G_03001C_TYPE(x) (((x) >> 30) & 0x3)
1571#define C_03001C_TYPE 0x3FFFFFFF
1572#define V_03001C_SQ_TEX_VTX_INVALID_TEXTURE 0x00000000
1573#define V_03001C_SQ_TEX_VTX_INVALID_BUFFER 0x00000001
1574#define V_03001C_SQ_TEX_VTX_VALID_TEXTURE 0x00000002
1575#define V_03001C_SQ_TEX_VTX_VALID_BUFFER 0x00000003
1576#define S_03001C_DATA_FORMAT(x) (((x) & 0x3F) << 0)
1577#define G_03001C_DATA_FORMAT(x) (((x) >> 0) & 0x3F)
1578#define C_03001C_DATA_FORMAT 0xFFFFFFC0
1211 1579
1212#define SQ_VTX_CONSTANT_WORD0_0 0x30000 1580#define SQ_VTX_CONSTANT_WORD0_0 0x30000
1213#define SQ_VTX_CONSTANT_WORD1_0 0x30004 1581#define SQ_VTX_CONSTANT_WORD1_0 0x30004