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authorSlava Grigorev <slava.grigorev@amd.com>2014-12-02 11:20:48 -0500
committerAlex Deucher <alexander.deucher@amd.com>2015-01-22 10:42:06 -0500
commit87654f87af2a06f325cc1a1a6e6a6a27f8837bf3 (patch)
treed973cd687c2e120ea9ae55c7f9e765f8df0c17bf /drivers/gpu/drm/radeon/evergreen_hdmi.c
parent00a9d4bcf8983a5aefcabf5de26b3cb7f805121c (diff)
radeon/audio: consolidate write_latency_fields() functions
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen_hdmi.c')
-rw-r--r--drivers/gpu/drm/radeon/evergreen_hdmi.c29
1 files changed, 5 insertions, 24 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index 58ff82b94f97..aa8a31b99c6e 100644
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -34,8 +34,6 @@
34#include "atom.h" 34#include "atom.h"
35 35
36extern void dce6_afmt_select_pin(struct drm_encoder *encoder); 36extern void dce6_afmt_select_pin(struct drm_encoder *encoder);
37extern void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
38 struct drm_display_mode *mode);
39 37
40/* enable the audio stream */ 38/* enable the audio stream */
41static void dce4_audio_enable(struct radeon_device *rdev, 39static void dce4_audio_enable(struct radeon_device *rdev,
@@ -90,26 +88,12 @@ static void evergreen_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t cloc
90 WREG32(HDMI_ACR_48_1 + offset, acr.n_48khz); 88 WREG32(HDMI_ACR_48_1 + offset, acr.n_48khz);
91} 89}
92 90
93static void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, 91void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
94 struct drm_display_mode *mode) 92 struct drm_connector *connector, struct drm_display_mode *mode)
95{ 93{
96 struct radeon_device *rdev = encoder->dev->dev_private; 94 struct radeon_device *rdev = encoder->dev->dev_private;
97 struct drm_connector *connector;
98 struct radeon_connector *radeon_connector = NULL;
99 u32 tmp = 0; 95 u32 tmp = 0;
100 96
101 list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
102 if (connector->encoder == encoder) {
103 radeon_connector = to_radeon_connector(connector);
104 break;
105 }
106 }
107
108 if (!radeon_connector) {
109 DRM_ERROR("Couldn't find encoder's connector\n");
110 return;
111 }
112
113 if (mode->flags & DRM_MODE_FLAG_INTERLACE) { 97 if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
114 if (connector->latency_present[1]) 98 if (connector->latency_present[1])
115 tmp = VIDEO_LIPSYNC(connector->video_latency[1]) | 99 tmp = VIDEO_LIPSYNC(connector->video_latency[1]) |
@@ -123,7 +107,7 @@ static void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
123 else 107 else
124 tmp = VIDEO_LIPSYNC(255) | AUDIO_LIPSYNC(255); 108 tmp = VIDEO_LIPSYNC(255) | AUDIO_LIPSYNC(255);
125 } 109 }
126 WREG32(AZ_F0_CODEC_PIN0_CONTROL_RESPONSE_LIPSYNC, tmp); 110 WREG32_ENDPOINT(0, AZ_F0_CODEC_PIN0_CONTROL_RESPONSE_LIPSYNC, tmp);
127} 111}
128 112
129void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 113void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
@@ -418,14 +402,11 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
418 402
419 /* fglrx sets 0x40 in 0x5f80 here */ 403 /* fglrx sets 0x40 in 0x5f80 here */
420 404
421 if (ASIC_IS_DCE6(rdev)) { 405 if (ASIC_IS_DCE6(rdev))
422 dce6_afmt_select_pin(encoder); 406 dce6_afmt_select_pin(encoder);
423 dce6_afmt_write_latency_fields(encoder, mode);
424 } else {
425 dce4_afmt_write_latency_fields(encoder, mode);
426 }
427 407
428 radeon_audio_write_sad_regs(encoder); 408 radeon_audio_write_sad_regs(encoder);
409 radeon_audio_write_latency_fields(encoder, mode);
429 410
430 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode); 411 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
431 if (err < 0) { 412 if (err < 0) {