diff options
author | Slava Grigorev <slava.grigorev@amd.com> | 2014-12-09 16:44:18 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2015-01-22 10:42:14 -0500 |
commit | 1852c9a09a25aad40c80b0012ad19379b1fb78be (patch) | |
tree | f23f88376cea027ed0e0b392b238fe791587eec7 /drivers/gpu/drm/radeon/evergreen_hdmi.c | |
parent | baa7d8e451f030c049f83f943b9995620d6d6bd3 (diff) |
radeon/audio: moved audio packet programming to a separate function
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen_hdmi.c')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen_hdmi.c | 84 |
1 files changed, 42 insertions, 42 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c index 6d22da986aa6..d0155c0a8529 100644 --- a/drivers/gpu/drm/radeon/evergreen_hdmi.c +++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c | |||
@@ -345,6 +345,47 @@ void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, u32 offset, int bpc) | |||
345 | WREG32(HDMI_CONTROL + offset, val); | 345 | WREG32(HDMI_CONTROL + offset, val); |
346 | } | 346 | } |
347 | 347 | ||
348 | void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset) | ||
349 | { | ||
350 | struct drm_device *dev = encoder->dev; | ||
351 | struct radeon_device *rdev = dev->dev_private; | ||
352 | |||
353 | WREG32(HDMI_INFOFRAME_CONTROL0 + offset, | ||
354 | HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */ | ||
355 | HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */ | ||
356 | |||
357 | WREG32(AFMT_INFOFRAME_CONTROL0 + offset, | ||
358 | AFMT_AUDIO_INFO_UPDATE); /* required for audio info values to be updated */ | ||
359 | |||
360 | WREG32(HDMI_INFOFRAME_CONTROL1 + offset, | ||
361 | HDMI_AUDIO_INFO_LINE(2)); /* anything other than 0 */ | ||
362 | |||
363 | WREG32(HDMI_AUDIO_PACKET_CONTROL + offset, | ||
364 | HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */ | ||
365 | HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */ | ||
366 | |||
367 | WREG32(AFMT_60958_0 + offset, | ||
368 | AFMT_60958_CS_CHANNEL_NUMBER_L(1)); | ||
369 | |||
370 | WREG32(AFMT_60958_1 + offset, | ||
371 | AFMT_60958_CS_CHANNEL_NUMBER_R(2)); | ||
372 | |||
373 | WREG32(AFMT_60958_2 + offset, | ||
374 | AFMT_60958_CS_CHANNEL_NUMBER_2(3) | | ||
375 | AFMT_60958_CS_CHANNEL_NUMBER_3(4) | | ||
376 | AFMT_60958_CS_CHANNEL_NUMBER_4(5) | | ||
377 | AFMT_60958_CS_CHANNEL_NUMBER_5(6) | | ||
378 | AFMT_60958_CS_CHANNEL_NUMBER_6(7) | | ||
379 | AFMT_60958_CS_CHANNEL_NUMBER_7(8)); | ||
380 | |||
381 | WREG32(AFMT_AUDIO_PACKET_CONTROL2 + offset, | ||
382 | AFMT_AUDIO_CHANNEL_ENABLE(0xff)); | ||
383 | |||
384 | /* allow 60958 channel status and send audio packets fields to be updated */ | ||
385 | WREG32(AFMT_AUDIO_PACKET_CONTROL + offset, | ||
386 | AFMT_AUDIO_SAMPLE_SEND | AFMT_RESET_FIFO_WHEN_AUDIO_DIS | AFMT_60958_CS_UPDATE); | ||
387 | } | ||
388 | |||
348 | /* | 389 | /* |
349 | * update the info frames with the data from the current display mode | 390 | * update the info frames with the data from the current display mode |
350 | */ | 391 | */ |
@@ -372,49 +413,11 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode | |||
372 | radeon_audio_set_vbi_packet(encoder); | 413 | radeon_audio_set_vbi_packet(encoder); |
373 | radeon_hdmi_set_color_depth(encoder); | 414 | radeon_hdmi_set_color_depth(encoder); |
374 | 415 | ||
375 | WREG32(HDMI_INFOFRAME_CONTROL0 + offset, | ||
376 | HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */ | ||
377 | HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */ | ||
378 | |||
379 | WREG32(AFMT_INFOFRAME_CONTROL0 + offset, | ||
380 | AFMT_AUDIO_INFO_UPDATE); /* required for audio info values to be updated */ | ||
381 | |||
382 | WREG32(HDMI_INFOFRAME_CONTROL1 + offset, | ||
383 | HDMI_AUDIO_INFO_LINE(2)); /* anything other than 0 */ | ||
384 | |||
385 | WREG32(HDMI_GC + offset, 0); /* unset HDMI_GC_AVMUTE */ | 416 | WREG32(HDMI_GC + offset, 0); /* unset HDMI_GC_AVMUTE */ |
386 | 417 | ||
387 | WREG32(HDMI_AUDIO_PACKET_CONTROL + offset, | ||
388 | HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */ | ||
389 | HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */ | ||
390 | |||
391 | WREG32(AFMT_AUDIO_PACKET_CONTROL + offset, | ||
392 | AFMT_60958_CS_UPDATE); /* allow 60958 channel status fields to be updated */ | ||
393 | |||
394 | /* fglrx clears sth in AFMT_AUDIO_PACKET_CONTROL2 here */ | ||
395 | |||
396 | radeon_audio_update_acr(encoder, mode->clock); | 418 | radeon_audio_update_acr(encoder, mode->clock); |
397 | |||
398 | WREG32(AFMT_60958_0 + offset, | ||
399 | AFMT_60958_CS_CHANNEL_NUMBER_L(1)); | ||
400 | |||
401 | WREG32(AFMT_60958_1 + offset, | ||
402 | AFMT_60958_CS_CHANNEL_NUMBER_R(2)); | ||
403 | |||
404 | WREG32(AFMT_60958_2 + offset, | ||
405 | AFMT_60958_CS_CHANNEL_NUMBER_2(3) | | ||
406 | AFMT_60958_CS_CHANNEL_NUMBER_3(4) | | ||
407 | AFMT_60958_CS_CHANNEL_NUMBER_4(5) | | ||
408 | AFMT_60958_CS_CHANNEL_NUMBER_5(6) | | ||
409 | AFMT_60958_CS_CHANNEL_NUMBER_6(7) | | ||
410 | AFMT_60958_CS_CHANNEL_NUMBER_7(8)); | ||
411 | |||
412 | radeon_audio_write_speaker_allocation(encoder); | 419 | radeon_audio_write_speaker_allocation(encoder); |
413 | 420 | radeon_audio_set_audio_packet(encoder); | |
414 | WREG32(AFMT_AUDIO_PACKET_CONTROL2 + offset, | ||
415 | AFMT_AUDIO_CHANNEL_ENABLE(0xff)); | ||
416 | |||
417 | /* fglrx sets 0x40 in 0x5f80 here */ | ||
418 | 421 | ||
419 | radeon_audio_select_pin(encoder); | 422 | radeon_audio_select_pin(encoder); |
420 | radeon_audio_write_sad_regs(encoder); | 423 | radeon_audio_write_sad_regs(encoder); |
@@ -423,9 +426,6 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode | |||
423 | if (radeon_audio_set_avi_packet(encoder, mode) < 0) | 426 | if (radeon_audio_set_avi_packet(encoder, mode) < 0) |
424 | return; | 427 | return; |
425 | 428 | ||
426 | WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + offset, | ||
427 | AFMT_AUDIO_SAMPLE_SEND); /* send audio packets */ | ||
428 | |||
429 | /* it's unknown what these bits do excatly, but it's indeed quite useful for debugging */ | 429 | /* it's unknown what these bits do excatly, but it's indeed quite useful for debugging */ |
430 | WREG32(AFMT_RAMP_CONTROL0 + offset, 0x00FFFFFF); | 430 | WREG32(AFMT_RAMP_CONTROL0 + offset, 0x00FFFFFF); |
431 | WREG32(AFMT_RAMP_CONTROL1 + offset, 0x007FFFFF); | 431 | WREG32(AFMT_RAMP_CONTROL1 + offset, 0x007FFFFF); |