drm/radeon: apply Murphy's law to the kms irq code v3

1. It is really dangerous to have more than one
   spinlock protecting the same information.

2. radeon_irq_set sometimes wasn't called with lock
   protection, so it can happen that more than one
   CPU would tamper with the irq regs at the same
   time.

3. The pm.gui_idle variable was assuming that the 3D
   engine wasn't becoming idle between testing the
   register and setting the variable. So just remove
   it and test the register directly.

v2: Also handle the hpd irq code the same way.
v3: Rename hpd parameter for clarification.

Signed-off-by: Christian Koenig <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 6 insertions, 15 deletions

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 765bd1f2e1ce..bdc1f30d7474 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -428,6 +428,7 @@ void evergreen_hpd_init(struct radeon_device *rdev)
 {
         struct drm_device *dev = rdev->ddev;
         struct drm_connector *connector;
+        unsigned enabled = 0;
         u32 tmp = DC_HPDx_CONNECTION_TIMER(0x9c4) |
                 DC_HPDx_RX_INT_TIMER(0xfa) | DC_HPDx_EN;
 
@@ -436,73 +437,64 @@ void evergreen_hpd_init(struct radeon_device *rdev)
                 switch (radeon_connector->hpd.hpd) {
                 case RADEON_HPD_1:
                         WREG32(DC_HPD1_CONTROL, tmp);
-                        rdev->irq.hpd[0] = true;
                         break;
                 case RADEON_HPD_2:
                         WREG32(DC_HPD2_CONTROL, tmp);
-                        rdev->irq.hpd[1] = true;
                         break;
                 case RADEON_HPD_3:
                         WREG32(DC_HPD3_CONTROL, tmp);
-                        rdev->irq.hpd[2] = true;
                         break;
                 case RADEON_HPD_4:
                         WREG32(DC_HPD4_CONTROL, tmp);
-                        rdev->irq.hpd[3] = true;
                         break;
                 case RADEON_HPD_5:
                         WREG32(DC_HPD5_CONTROL, tmp);
-                        rdev->irq.hpd[4] = true;
                         break;
                 case RADEON_HPD_6:
                         WREG32(DC_HPD6_CONTROL, tmp);
-                        rdev->irq.hpd[5] = true;
                         break;
                 default:
                         break;
                 }
                 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
+                enabled |= 1 << radeon_connector->hpd.hpd;
         }
-        if (rdev->irq.installed)
-                evergreen_irq_set(rdev);
+        radeon_irq_kms_enable_hpd(rdev, enabled);
 }
 
 void evergreen_hpd_fini(struct radeon_device *rdev)
 {
         struct drm_device *dev = rdev->ddev;
         struct drm_connector *connector;
+        unsigned disabled = 0;
 
         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
                 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
                 switch (radeon_connector->hpd.hpd) {
                 case RADEON_HPD_1:
                         WREG32(DC_HPD1_CONTROL, 0);
-                        rdev->irq.hpd[0] = false;
                         break;
                 case RADEON_HPD_2:
                         WREG32(DC_HPD2_CONTROL, 0);
-                        rdev->irq.hpd[1] = false;
                         break;
                 case RADEON_HPD_3:
                         WREG32(DC_HPD3_CONTROL, 0);
-                        rdev->irq.hpd[2] = false;
                         break;
                 case RADEON_HPD_4:
                         WREG32(DC_HPD4_CONTROL, 0);
-                        rdev->irq.hpd[3] = false;
                         break;
                 case RADEON_HPD_5:
                         WREG32(DC_HPD5_CONTROL, 0);
-                        rdev->irq.hpd[4] = false;
                         break;
                 case RADEON_HPD_6:
                         WREG32(DC_HPD6_CONTROL, 0);
-                        rdev->irq.hpd[5] = false;
                         break;
                 default:
                         break;
                 }
+                disabled |= 1 << radeon_connector->hpd.hpd;
         }
+        radeon_irq_kms_disable_hpd(rdev, disabled);
 }
 
 /* watermark setup */
@@ -2984,7 +2976,6 @@ restart_ih:
                         break;
                 case 233: /* GUI IDLE */
                         DRM_DEBUG("IH: GUI idle\n");
-                        rdev->pm.gui_idle = true;
                         wake_up(&rdev->irq.idle_queue);
                         break;
                 default: