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authorAlex Deucher <alexander.deucher@amd.com>2013-12-09 19:44:30 -0500
committerAlex Deucher <alexander.deucher@amd.com>2013-12-24 18:01:10 -0500
commitea31bf697d27270188a93cd78cf9de4bc968aca3 (patch)
treea77d4b86d59b55824e01d73a617f62aa6e28d6c1 /drivers/gpu/drm/radeon/cik.c
parente308b1d375d2fa5389316683ff52f3d9043bf1b8 (diff)
drm/radeon: remove generic rptr/wptr functions (v2)
Fill in asic family specific versions rather than using the generic version. This lets us handle asic specific differences more easily. In this case, we disable sw swapping of the rtpr writeback value on r6xx+ since the hw does it for us. Fixes bogus rptr readback on BE systems. v2: remove missed cpu_to_le32(), add comments Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/cik.c')
-rw-r--r--drivers/gpu/drm/radeon/cik.c56
1 files changed, 39 insertions, 17 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 25a6ef6c7e4c..e66eb4745347 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -4015,15 +4015,43 @@ static int cik_cp_gfx_resume(struct radeon_device *rdev)
4015 return 0; 4015 return 0;
4016} 4016}
4017 4017
4018u32 cik_compute_ring_get_rptr(struct radeon_device *rdev, 4018u32 cik_gfx_get_rptr(struct radeon_device *rdev,
4019 struct radeon_ring *ring) 4019 struct radeon_ring *ring)
4020{ 4020{
4021 u32 rptr; 4021 u32 rptr;
4022 4022
4023 if (rdev->wb.enabled)
4024 rptr = rdev->wb.wb[ring->rptr_offs/4];
4025 else
4026 rptr = RREG32(CP_RB0_RPTR);
4027
4028 return rptr;
4029}
4030
4031u32 cik_gfx_get_wptr(struct radeon_device *rdev,
4032 struct radeon_ring *ring)
4033{
4034 u32 wptr;
4035
4036 wptr = RREG32(CP_RB0_WPTR);
4023 4037
4038 return wptr;
4039}
4040
4041void cik_gfx_set_wptr(struct radeon_device *rdev,
4042 struct radeon_ring *ring)
4043{
4044 WREG32(CP_RB0_WPTR, ring->wptr);
4045 (void)RREG32(CP_RB0_WPTR);
4046}
4047
4048u32 cik_compute_get_rptr(struct radeon_device *rdev,
4049 struct radeon_ring *ring)
4050{
4051 u32 rptr;
4024 4052
4025 if (rdev->wb.enabled) { 4053 if (rdev->wb.enabled) {
4026 rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]); 4054 rptr = rdev->wb.wb[ring->rptr_offs/4];
4027 } else { 4055 } else {
4028 mutex_lock(&rdev->srbm_mutex); 4056 mutex_lock(&rdev->srbm_mutex);
4029 cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0); 4057 cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0);
@@ -4035,13 +4063,14 @@ u32 cik_compute_ring_get_rptr(struct radeon_device *rdev,
4035 return rptr; 4063 return rptr;
4036} 4064}
4037 4065
4038u32 cik_compute_ring_get_wptr(struct radeon_device *rdev, 4066u32 cik_compute_get_wptr(struct radeon_device *rdev,
4039 struct radeon_ring *ring) 4067 struct radeon_ring *ring)
4040{ 4068{
4041 u32 wptr; 4069 u32 wptr;
4042 4070
4043 if (rdev->wb.enabled) { 4071 if (rdev->wb.enabled) {
4044 wptr = le32_to_cpu(rdev->wb.wb[ring->wptr_offs/4]); 4072 /* XXX check if swapping is necessary on BE */
4073 wptr = rdev->wb.wb[ring->wptr_offs/4];
4045 } else { 4074 } else {
4046 mutex_lock(&rdev->srbm_mutex); 4075 mutex_lock(&rdev->srbm_mutex);
4047 cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0); 4076 cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0);
@@ -4053,10 +4082,11 @@ u32 cik_compute_ring_get_wptr(struct radeon_device *rdev,
4053 return wptr; 4082 return wptr;
4054} 4083}
4055 4084
4056void cik_compute_ring_set_wptr(struct radeon_device *rdev, 4085void cik_compute_set_wptr(struct radeon_device *rdev,
4057 struct radeon_ring *ring) 4086 struct radeon_ring *ring)
4058{ 4087{
4059 rdev->wb.wb[ring->wptr_offs/4] = cpu_to_le32(ring->wptr); 4088 /* XXX check if swapping is necessary on BE */
4089 rdev->wb.wb[ring->wptr_offs/4] = ring->wptr;
4060 WDOORBELL32(ring->doorbell_index, ring->wptr); 4090 WDOORBELL32(ring->doorbell_index, ring->wptr);
4061} 4091}
4062 4092
@@ -7606,7 +7636,6 @@ static int cik_startup(struct radeon_device *rdev)
7606 7636
7607 ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; 7637 ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
7608 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, 7638 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET,
7609 CP_RB0_RPTR, CP_RB0_WPTR,
7610 PACKET3(PACKET3_NOP, 0x3FFF)); 7639 PACKET3(PACKET3_NOP, 0x3FFF));
7611 if (r) 7640 if (r)
7612 return r; 7641 return r;
@@ -7615,7 +7644,6 @@ static int cik_startup(struct radeon_device *rdev)
7615 /* type-2 packets are deprecated on MEC, use type-3 instead */ 7644 /* type-2 packets are deprecated on MEC, use type-3 instead */
7616 ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; 7645 ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];
7617 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, 7646 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET,
7618 CP_HQD_PQ_RPTR, CP_HQD_PQ_WPTR,
7619 PACKET3(PACKET3_NOP, 0x3FFF)); 7647 PACKET3(PACKET3_NOP, 0x3FFF));
7620 if (r) 7648 if (r)
7621 return r; 7649 return r;
@@ -7627,7 +7655,6 @@ static int cik_startup(struct radeon_device *rdev)
7627 /* type-2 packets are deprecated on MEC, use type-3 instead */ 7655 /* type-2 packets are deprecated on MEC, use type-3 instead */
7628 ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; 7656 ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX];
7629 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, 7657 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET,
7630 CP_HQD_PQ_RPTR, CP_HQD_PQ_WPTR,
7631 PACKET3(PACKET3_NOP, 0x3FFF)); 7658 PACKET3(PACKET3_NOP, 0x3FFF));
7632 if (r) 7659 if (r)
7633 return r; 7660 return r;
@@ -7639,16 +7666,12 @@ static int cik_startup(struct radeon_device *rdev)
7639 7666
7640 ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; 7667 ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX];
7641 r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, 7668 r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET,
7642 SDMA0_GFX_RB_RPTR + SDMA0_REGISTER_OFFSET,
7643 SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET,
7644 SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); 7669 SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0));
7645 if (r) 7670 if (r)
7646 return r; 7671 return r;
7647 7672
7648 ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; 7673 ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX];
7649 r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, 7674 r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET,
7650 SDMA0_GFX_RB_RPTR + SDMA1_REGISTER_OFFSET,
7651 SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET,
7652 SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); 7675 SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0));
7653 if (r) 7676 if (r)
7654 return r; 7677 return r;
@@ -7664,7 +7687,6 @@ static int cik_startup(struct radeon_device *rdev)
7664 ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; 7687 ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX];
7665 if (ring->ring_size) { 7688 if (ring->ring_size) {
7666 r = radeon_ring_init(rdev, ring, ring->ring_size, 0, 7689 r = radeon_ring_init(rdev, ring, ring->ring_size, 0,
7667 UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR,
7668 RADEON_CP_PACKET2); 7690 RADEON_CP_PACKET2);
7669 if (!r) 7691 if (!r)
7670 r = uvd_v1_0_init(rdev); 7692 r = uvd_v1_0_init(rdev);