drm/radeon: Initialize compute vmid

This patch moves to radeon the initialization of compute vmid.

That initializations was done in kfd-->kgd interface, but doing it in radeon
as part of radeon's H/W initialization routines is more appropriate.

In addition, this simplifies the kfd-->kgd interface.

The patch removes the function from the interface file and from the interface
declaration file.

The function initializes memory apertures to fixed base/limit address and non
cached memory types.

Signed-off-by: Ben Goz <ben.goz@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 24 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 6dcde3798b45..14d173e2a8f7 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -5707,6 +5707,28 @@ void cik_pcie_gart_tlb_flush(struct radeon_device *rdev)
         WREG32(VM_INVALIDATE_REQUEST, 0x1);
 }
 
+static void cik_pcie_init_compute_vmid(struct radeon_device *rdev)
+{
+        int i;
+        uint32_t sh_mem_bases, sh_mem_config;
+
+        sh_mem_bases = 0x6000 | 0x6000 << 16;
+        sh_mem_config = ALIGNMENT_MODE(SH_MEM_ALIGNMENT_MODE_UNALIGNED);
+        sh_mem_config |= DEFAULT_MTYPE(MTYPE_NONCACHED);
+
+        mutex_lock(&rdev->srbm_mutex);
+        for (i = 8; i < 16; i++) {
+                cik_srbm_select(rdev, 0, 0, 0, i);
+                /* CP and shaders */
+                WREG32(SH_MEM_CONFIG, sh_mem_config);
+                WREG32(SH_MEM_APE1_BASE, 1);
+                WREG32(SH_MEM_APE1_LIMIT, 0);
+                WREG32(SH_MEM_BASES, sh_mem_bases);
+        }
+        cik_srbm_select(rdev, 0, 0, 0, 0);
+        mutex_unlock(&rdev->srbm_mutex);
+}
+
 /**
  * cik_pcie_gart_enable - gart enable
  *
@@ -5820,6 +5842,8 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
         cik_srbm_select(rdev, 0, 0, 0, 0);
         mutex_unlock(&rdev->srbm_mutex);
 
+        cik_pcie_init_compute_vmid(rdev);
+
         cik_pcie_gart_tlb_flush(rdev);
         DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
                  (unsigned)(rdev->mc.gtt_size >> 20),