drm/radeon/kms/avivo: add support for new pll selection algo

Supported on all AVIVO-based asics.
Can be disabled via the new_pll module parameter:
new_pll=0 - disable
new_pll=1 - enable
enabled by default

[airlied: fixed to use do_div]
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@linux.ie>

1 files changed, 12 insertions, 2 deletions

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 6d82417fb903..260fcf59f00c 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -499,8 +499,18 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
         else
                 pll = &rdev->clock.p2pll;
 
-        radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
-                           &ref_div, &post_div, pll_flags);
+        if (ASIC_IS_AVIVO(rdev)) {
+                if (radeon_new_pll)
+                        radeon_compute_pll_avivo(pll, adjusted_clock, &pll_clock,
+                                                 &fb_div, &frac_fb_div,
+                                                 &ref_div, &post_div, pll_flags);
+                else
+                        radeon_compute_pll(pll, adjusted_clock, &pll_clock,
+                                           &fb_div, &frac_fb_div,
+                                           &ref_div, &post_div, pll_flags);
+        } else
+                radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
+                                   &ref_div, &post_div, pll_flags);
 
         index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
         atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,