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authorAlex Deucher <alexdeucher@gmail.com>2010-02-01 16:39:11 -0500
committerDave Airlie <airlied@redhat.com>2010-02-08 18:32:22 -0500
commit26b9fc3ab13587d4e86b217be43d1fb7ca934576 (patch)
treea2b8e15fcfaa1a20da4373d0d03bf2f25345b30f /drivers/gpu/drm/radeon/atombios_crtc.c
parent093972788f009cabf8f8fb726dc5267b60b3d09e (diff)
drm/radeon/kms/atom: clean up spread spectrum code
use a union for the atom args. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/atombios_crtc.c')
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c38
1 files changed, 20 insertions, 18 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 4bae5511ea60..bb45517719ae 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -349,6 +349,11 @@ static void atombios_crtc_set_timing(struct drm_crtc *crtc,
349 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 349 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
350} 350}
351 351
352union atom_enable_ss {
353 ENABLE_LVDS_SS_PARAMETERS legacy;
354 ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION v1;
355};
356
352static void atombios_set_ss(struct drm_crtc *crtc, int enable) 357static void atombios_set_ss(struct drm_crtc *crtc, int enable)
353{ 358{
354 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 359 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
@@ -358,8 +363,7 @@ static void atombios_set_ss(struct drm_crtc *crtc, int enable)
358 struct radeon_encoder *radeon_encoder = NULL; 363 struct radeon_encoder *radeon_encoder = NULL;
359 struct radeon_encoder_atom_dig *dig = NULL; 364 struct radeon_encoder_atom_dig *dig = NULL;
360 int index = GetIndexIntoMasterTable(COMMAND, EnableSpreadSpectrumOnPPLL); 365 int index = GetIndexIntoMasterTable(COMMAND, EnableSpreadSpectrumOnPPLL);
361 ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION args; 366 union atom_enable_ss args;
362 ENABLE_LVDS_SS_PARAMETERS legacy_args;
363 uint16_t percentage = 0; 367 uint16_t percentage = 0;
364 uint8_t type = 0, step = 0, delay = 0, range = 0; 368 uint8_t type = 0, step = 0, delay = 0, range = 0;
365 369
@@ -386,25 +390,23 @@ static void atombios_set_ss(struct drm_crtc *crtc, int enable)
386 if (!radeon_encoder) 390 if (!radeon_encoder)
387 return; 391 return;
388 392
393 memset(&args, 0, sizeof(args));
389 if (ASIC_IS_AVIVO(rdev)) { 394 if (ASIC_IS_AVIVO(rdev)) {
390 memset(&args, 0, sizeof(args)); 395 args.v1.usSpreadSpectrumPercentage = cpu_to_le16(percentage);
391 args.usSpreadSpectrumPercentage = cpu_to_le16(percentage); 396 args.v1.ucSpreadSpectrumType = type;
392 args.ucSpreadSpectrumType = type; 397 args.v1.ucSpreadSpectrumStep = step;
393 args.ucSpreadSpectrumStep = step; 398 args.v1.ucSpreadSpectrumDelay = delay;
394 args.ucSpreadSpectrumDelay = delay; 399 args.v1.ucSpreadSpectrumRange = range;
395 args.ucSpreadSpectrumRange = range; 400 args.v1.ucPpll = radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
396 args.ucPpll = radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1; 401 args.v1.ucEnable = enable;
397 args.ucEnable = enable;
398 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
399 } else { 402 } else {
400 memset(&legacy_args, 0, sizeof(legacy_args)); 403 args.legacy.usSpreadSpectrumPercentage = cpu_to_le16(percentage);
401 legacy_args.usSpreadSpectrumPercentage = cpu_to_le16(percentage); 404 args.legacy.ucSpreadSpectrumType = type;
402 legacy_args.ucSpreadSpectrumType = type; 405 args.legacy.ucSpreadSpectrumStepSize_Delay = (step & 3) << 2;
403 legacy_args.ucSpreadSpectrumStepSize_Delay = (step & 3) << 2; 406 args.legacy.ucSpreadSpectrumStepSize_Delay |= (delay & 7) << 4;
404 legacy_args.ucSpreadSpectrumStepSize_Delay |= (delay & 7) << 4; 407 args.legacy.ucEnable = enable;
405 legacy_args.ucEnable = enable;
406 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&legacy_args);
407 } 408 }
409 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
408} 410}
409 411
410union adjust_pixel_clock { 412union adjust_pixel_clock {