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authorBen Skeggs <bskeggs@redhat.com>2012-03-03 23:47:55 -0500
committerBen Skeggs <bskeggs@redhat.com>2012-03-22 10:21:12 -0400
commit68455a43debe26dd1d2a42c0b67dd5697c201420 (patch)
tree692eeca94a4fee9a64dfed910b4a3b1dbd5c1c99 /drivers/gpu/drm/nouveau
parentfa2c113ac1da39f922ab287b75c8d3f21a4b16dd (diff)
drm/nve0: initial modesetting support for kepler chipsets
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h1
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c61
2 files changed, 55 insertions, 7 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 211d8000aac7..3aef353a926c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -701,6 +701,7 @@ enum nouveau_card_type {
701 NV_50 = 0x50, 701 NV_50 = 0x50,
702 NV_C0 = 0xc0, 702 NV_C0 = 0xc0,
703 NV_D0 = 0xd0, 703 NV_D0 = 0xd0,
704 NV_E0 = 0xe0,
704}; 705};
705 706
706struct drm_nouveau_private { 707struct drm_nouveau_private {
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 6476cf604cc4..a3ae91fa8141 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -479,6 +479,47 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
479 engine->pm.voltage_get = nouveau_voltage_gpio_get; 479 engine->pm.voltage_get = nouveau_voltage_gpio_get;
480 engine->pm.voltage_set = nouveau_voltage_gpio_set; 480 engine->pm.voltage_set = nouveau_voltage_gpio_set;
481 break; 481 break;
482 case 0xe0:
483 engine->instmem.init = nvc0_instmem_init;
484 engine->instmem.takedown = nvc0_instmem_takedown;
485 engine->instmem.suspend = nvc0_instmem_suspend;
486 engine->instmem.resume = nvc0_instmem_resume;
487 engine->instmem.get = nv50_instmem_get;
488 engine->instmem.put = nv50_instmem_put;
489 engine->instmem.map = nv50_instmem_map;
490 engine->instmem.unmap = nv50_instmem_unmap;
491 engine->instmem.flush = nv84_instmem_flush;
492 engine->mc.init = nv50_mc_init;
493 engine->mc.takedown = nv50_mc_takedown;
494 engine->timer.init = nv04_timer_init;
495 engine->timer.read = nv04_timer_read;
496 engine->timer.takedown = nv04_timer_takedown;
497 engine->fb.init = nvc0_fb_init;
498 engine->fb.takedown = nvc0_fb_takedown;
499 engine->fifo.channels = 0;
500 engine->fifo.init = nouveau_stub_init;
501 engine->fifo.takedown = nouveau_stub_takedown;
502 engine->fifo.disable = nvc0_fifo_disable;
503 engine->fifo.enable = nvc0_fifo_enable;
504 engine->fifo.reassign = nvc0_fifo_reassign;
505 engine->fifo.unload_context = nouveau_stub_init;
506 engine->display.early_init = nouveau_stub_init;
507 engine->display.late_takedown = nouveau_stub_takedown;
508 engine->display.create = nvd0_display_create;
509 engine->display.destroy = nvd0_display_destroy;
510 engine->display.init = nvd0_display_init;
511 engine->display.fini = nvd0_display_fini;
512 engine->gpio.init = nv50_gpio_init;
513 engine->gpio.fini = nv50_gpio_fini;
514 engine->gpio.drive = nvd0_gpio_drive;
515 engine->gpio.sense = nvd0_gpio_sense;
516 engine->gpio.irq_enable = nv50_gpio_irq_enable;
517 engine->vram.init = nvc0_vram_init;
518 engine->vram.takedown = nv50_vram_fini;
519 engine->vram.get = nvc0_vram_new;
520 engine->vram.put = nv50_vram_del;
521 engine->vram.flags_valid = nvc0_vram_flags_valid;
522 break;
482 default: 523 default:
483 NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset); 524 NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset);
484 return 1; 525 return 1;
@@ -1056,8 +1097,8 @@ static int nouveau_remove_conflicting_drivers(struct drm_device *dev)
1056int nouveau_load(struct drm_device *dev, unsigned long flags) 1097int nouveau_load(struct drm_device *dev, unsigned long flags)
1057{ 1098{
1058 struct drm_nouveau_private *dev_priv; 1099 struct drm_nouveau_private *dev_priv;
1100 unsigned long long offset, length;
1059 uint32_t reg0 = ~0, strap; 1101 uint32_t reg0 = ~0, strap;
1060 resource_size_t mmio_start_offs;
1061 int ret; 1102 int ret;
1062 1103
1063 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL); 1104 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
@@ -1111,6 +1152,9 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
1111 case 0xd0: 1152 case 0xd0:
1112 dev_priv->card_type = NV_D0; 1153 dev_priv->card_type = NV_D0;
1113 break; 1154 break;
1155 case 0xe0:
1156 dev_priv->card_type = NV_E0;
1157 break;
1114 default: 1158 default:
1115 break; 1159 break;
1116 } 1160 }
@@ -1135,17 +1179,20 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
1135 NV_INFO(dev, "Detected an NV%2x generation card (0x%08x)\n", 1179 NV_INFO(dev, "Detected an NV%2x generation card (0x%08x)\n",
1136 dev_priv->card_type, reg0); 1180 dev_priv->card_type, reg0);
1137 1181
1138 /* map the mmio regs */ 1182 /* map the mmio regs, limiting the amount to preserve vmap space */
1139 mmio_start_offs = pci_resource_start(dev->pdev, 0); 1183 offset = pci_resource_start(dev->pdev, 0);
1140 dev_priv->mmio = ioremap(mmio_start_offs, 0x00800000); 1184 length = pci_resource_len(dev->pdev, 0);
1185 if (dev_priv->card_type < NV_E0)
1186 length = min(length, (unsigned long long)0x00800000);
1187
1188 dev_priv->mmio = ioremap(offset, length);
1141 if (!dev_priv->mmio) { 1189 if (!dev_priv->mmio) {
1142 NV_ERROR(dev, "Unable to initialize the mmio mapping. " 1190 NV_ERROR(dev, "Unable to initialize the mmio mapping. "
1143 "Please report your setup to " DRIVER_EMAIL "\n"); 1191 "Please report your setup to " DRIVER_EMAIL "\n");
1144 ret = -EINVAL; 1192 ret = -EINVAL;
1145 goto err_priv; 1193 goto err_priv;
1146 } 1194 }
1147 NV_DEBUG(dev, "regs mapped ok at 0x%llx\n", 1195 NV_DEBUG(dev, "regs mapped ok at 0x%llx\n", offset);
1148 (unsigned long long)mmio_start_offs);
1149 1196
1150 /* determine frequency of timing crystal */ 1197 /* determine frequency of timing crystal */
1151 strap = nv_rd32(dev, 0x101000); 1198 strap = nv_rd32(dev, 0x101000);
@@ -1203,7 +1250,7 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
1203 } 1250 }
1204 } else { 1251 } else {
1205 dev_priv->ramin_size = 1 * 1024 * 1024; 1252 dev_priv->ramin_size = 1 * 1024 * 1024;
1206 dev_priv->ramin = ioremap(mmio_start_offs + NV_RAMIN, 1253 dev_priv->ramin = ioremap(offset + NV_RAMIN,
1207 dev_priv->ramin_size); 1254 dev_priv->ramin_size);
1208 if (!dev_priv->ramin) { 1255 if (!dev_priv->ramin) {
1209 NV_ERROR(dev, "Failed to map BAR0 PRAMIN.\n"); 1256 NV_ERROR(dev, "Failed to map BAR0 PRAMIN.\n");