diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2010-11-22 19:10:24 -0500 |
---|---|---|
committer | Francisco Jerez <currojerez@riseup.net> | 2010-12-07 21:00:35 -0500 |
commit | ceac30999dfb00ee7b56cfea8b28ef50999a3c95 (patch) | |
tree | b0295cf2caf466d94e35103a3c1b6d4baf57f4eb /drivers/gpu/drm/nouveau | |
parent | d908175cca901b95ba1628428b216e6e7188e8fb (diff) |
drm/nouveau: implicitly insert non-DMA objects into RAMHT
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_dma.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.h | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_fence.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_object.c | 59 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv04_fbcon.c | 34 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_fbcon.c | 10 |
6 files changed, 43 insertions, 80 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c index 82581e600dcd..6ff77cedc008 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.c +++ b/drivers/gpu/drm/nouveau/nouveau_dma.c | |||
@@ -59,17 +59,11 @@ nouveau_dma_init(struct nouveau_channel *chan) | |||
59 | { | 59 | { |
60 | struct drm_device *dev = chan->dev; | 60 | struct drm_device *dev = chan->dev; |
61 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 61 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
62 | struct nouveau_gpuobj *obj = NULL; | ||
63 | int ret, i; | 62 | int ret, i; |
64 | 63 | ||
65 | /* Create NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */ | 64 | /* Create NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */ |
66 | ret = nouveau_gpuobj_gr_new(chan, dev_priv->card_type < NV_50 ? | 65 | ret = nouveau_gpuobj_gr_new(chan, NvM2MF, dev_priv->card_type < NV_50 ? |
67 | 0x0039 : 0x5039, &obj); | 66 | 0x0039 : 0x5039); |
68 | if (ret) | ||
69 | return ret; | ||
70 | |||
71 | ret = nouveau_ramht_insert(chan, NvM2MF, obj); | ||
72 | nouveau_gpuobj_ref(NULL, &obj); | ||
73 | if (ret) | 67 | if (ret) |
74 | return ret; | 68 | return ret; |
75 | 69 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index d001453e857b..bbf19861b6c8 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h | |||
@@ -887,8 +887,7 @@ extern int nouveau_gpuobj_new_fake(struct drm_device *, u32 pinst, u64 vinst, | |||
887 | extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class, | 887 | extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class, |
888 | uint64_t offset, uint64_t size, int access, | 888 | uint64_t offset, uint64_t size, int access, |
889 | int target, struct nouveau_gpuobj **); | 889 | int target, struct nouveau_gpuobj **); |
890 | extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class, | 890 | extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, u32 handle, int class); |
891 | struct nouveau_gpuobj **); | ||
892 | extern int nv50_gpuobj_dma_new(struct nouveau_channel *, int class, u64 base, | 891 | extern int nv50_gpuobj_dma_new(struct nouveau_channel *, int class, u64 base, |
893 | u64 size, int target, int access, u32 type, | 892 | u64 size, int target, int access, u32 type, |
894 | u32 comp, struct nouveau_gpuobj **pobj); | 893 | u32 comp, struct nouveau_gpuobj **pobj); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c index abfeff19488e..3d50d5c3b0fe 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fence.c +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c | |||
@@ -438,12 +438,7 @@ nouveau_fence_channel_init(struct nouveau_channel *chan) | |||
438 | int ret; | 438 | int ret; |
439 | 439 | ||
440 | /* Create an NV_SW object for various sync purposes */ | 440 | /* Create an NV_SW object for various sync purposes */ |
441 | ret = nouveau_gpuobj_gr_new(chan, NV_SW, &obj); | 441 | ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW); |
442 | if (ret) | ||
443 | return ret; | ||
444 | |||
445 | ret = nouveau_ramht_insert(chan, NvSw, obj); | ||
446 | nouveau_gpuobj_ref(NULL, &obj); | ||
447 | if (ret) | 442 | if (ret) |
448 | return ret; | 443 | return ret; |
449 | 444 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c index 24540862a23f..3518ebba6fbd 100644 --- a/drivers/gpu/drm/nouveau/nouveau_object.c +++ b/drivers/gpu/drm/nouveau/nouveau_object.c | |||
@@ -608,13 +608,9 @@ static int | |||
608 | nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class, | 608 | nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class, |
609 | struct nouveau_gpuobj **gpuobj_ret) | 609 | struct nouveau_gpuobj **gpuobj_ret) |
610 | { | 610 | { |
611 | struct drm_nouveau_private *dev_priv; | 611 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
612 | struct nouveau_gpuobj *gpuobj; | 612 | struct nouveau_gpuobj *gpuobj; |
613 | 613 | ||
614 | if (!chan || !gpuobj_ret || *gpuobj_ret != NULL) | ||
615 | return -EINVAL; | ||
616 | dev_priv = chan->dev->dev_private; | ||
617 | |||
618 | gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL); | 614 | gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL); |
619 | if (!gpuobj) | 615 | if (!gpuobj) |
620 | return -ENOMEM; | 616 | return -ENOMEM; |
@@ -632,12 +628,12 @@ nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class, | |||
632 | } | 628 | } |
633 | 629 | ||
634 | int | 630 | int |
635 | nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class, | 631 | nouveau_gpuobj_gr_new(struct nouveau_channel *chan, u32 handle, int class) |
636 | struct nouveau_gpuobj **gpuobj) | ||
637 | { | 632 | { |
638 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; | 633 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
639 | struct drm_device *dev = chan->dev; | 634 | struct drm_device *dev = chan->dev; |
640 | struct nouveau_gpuobj_class *oc; | 635 | struct nouveau_gpuobj_class *oc; |
636 | struct nouveau_gpuobj *gpuobj; | ||
641 | int ret; | 637 | int ret; |
642 | 638 | ||
643 | NV_DEBUG(dev, "ch%d class=0x%04x\n", chan->id, class); | 639 | NV_DEBUG(dev, "ch%d class=0x%04x\n", chan->id, class); |
@@ -651,10 +647,12 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class, | |||
651 | return -EINVAL; | 647 | return -EINVAL; |
652 | 648 | ||
653 | found: | 649 | found: |
654 | if (oc->engine == NVOBJ_ENGINE_SW) | ||
655 | return nouveau_gpuobj_sw_new(chan, class, gpuobj); | ||
656 | |||
657 | switch (oc->engine) { | 650 | switch (oc->engine) { |
651 | case NVOBJ_ENGINE_SW: | ||
652 | ret = nouveau_gpuobj_sw_new(chan, class, &gpuobj); | ||
653 | if (ret) | ||
654 | return ret; | ||
655 | goto insert; | ||
658 | case NVOBJ_ENGINE_GR: | 656 | case NVOBJ_ENGINE_GR: |
659 | if (dev_priv->card_type >= NV_50 && !chan->ramin_grctx) { | 657 | if (dev_priv->card_type >= NV_50 && !chan->ramin_grctx) { |
660 | struct nouveau_pgraph_engine *pgraph = | 658 | struct nouveau_pgraph_engine *pgraph = |
@@ -681,41 +679,47 @@ found: | |||
681 | nouveau_gpuobj_class_instmem_size(dev, class), | 679 | nouveau_gpuobj_class_instmem_size(dev, class), |
682 | 16, | 680 | 16, |
683 | NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE, | 681 | NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE, |
684 | gpuobj); | 682 | &gpuobj); |
685 | if (ret) { | 683 | if (ret) { |
686 | NV_ERROR(dev, "error creating gpuobj: %d\n", ret); | 684 | NV_ERROR(dev, "error creating gpuobj: %d\n", ret); |
687 | return ret; | 685 | return ret; |
688 | } | 686 | } |
689 | 687 | ||
690 | if (dev_priv->card_type >= NV_50) { | 688 | if (dev_priv->card_type >= NV_50) { |
691 | nv_wo32(*gpuobj, 0, class); | 689 | nv_wo32(gpuobj, 0, class); |
692 | nv_wo32(*gpuobj, 20, 0x00010000); | 690 | nv_wo32(gpuobj, 20, 0x00010000); |
693 | } else { | 691 | } else { |
694 | switch (class) { | 692 | switch (class) { |
695 | case NV_CLASS_NULL: | 693 | case NV_CLASS_NULL: |
696 | nv_wo32(*gpuobj, 0, 0x00001030); | 694 | nv_wo32(gpuobj, 0, 0x00001030); |
697 | nv_wo32(*gpuobj, 4, 0xFFFFFFFF); | 695 | nv_wo32(gpuobj, 4, 0xFFFFFFFF); |
698 | break; | 696 | break; |
699 | default: | 697 | default: |
700 | if (dev_priv->card_type >= NV_40) { | 698 | if (dev_priv->card_type >= NV_40) { |
701 | nv_wo32(*gpuobj, 0, class); | 699 | nv_wo32(gpuobj, 0, class); |
702 | #ifdef __BIG_ENDIAN | 700 | #ifdef __BIG_ENDIAN |
703 | nv_wo32(*gpuobj, 8, 0x01000000); | 701 | nv_wo32(gpuobj, 8, 0x01000000); |
704 | #endif | 702 | #endif |
705 | } else { | 703 | } else { |
706 | #ifdef __BIG_ENDIAN | 704 | #ifdef __BIG_ENDIAN |
707 | nv_wo32(*gpuobj, 0, class | 0x00080000); | 705 | nv_wo32(gpuobj, 0, class | 0x00080000); |
708 | #else | 706 | #else |
709 | nv_wo32(*gpuobj, 0, class); | 707 | nv_wo32(gpuobj, 0, class); |
710 | #endif | 708 | #endif |
711 | } | 709 | } |
712 | } | 710 | } |
713 | } | 711 | } |
714 | dev_priv->engine.instmem.flush(dev); | 712 | dev_priv->engine.instmem.flush(dev); |
715 | 713 | ||
716 | (*gpuobj)->engine = oc->engine; | 714 | gpuobj->engine = oc->engine; |
717 | (*gpuobj)->class = oc->id; | 715 | gpuobj->class = oc->id; |
718 | return 0; | 716 | |
717 | insert: | ||
718 | ret = nouveau_ramht_insert(chan, handle, gpuobj); | ||
719 | if (ret) | ||
720 | NV_ERROR(dev, "error adding gpuobj to RAMHT: %d\n", ret); | ||
721 | nouveau_gpuobj_ref(NULL, &gpuobj); | ||
722 | return ret; | ||
719 | } | 723 | } |
720 | 724 | ||
721 | static int | 725 | static int |
@@ -971,7 +975,6 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data, | |||
971 | struct drm_file *file_priv) | 975 | struct drm_file *file_priv) |
972 | { | 976 | { |
973 | struct drm_nouveau_grobj_alloc *init = data; | 977 | struct drm_nouveau_grobj_alloc *init = data; |
974 | struct nouveau_gpuobj *gr = NULL; | ||
975 | struct nouveau_channel *chan; | 978 | struct nouveau_channel *chan; |
976 | int ret; | 979 | int ret; |
977 | 980 | ||
@@ -987,18 +990,10 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data, | |||
987 | goto out; | 990 | goto out; |
988 | } | 991 | } |
989 | 992 | ||
990 | ret = nouveau_gpuobj_gr_new(chan, init->class, &gr); | 993 | ret = nouveau_gpuobj_gr_new(chan, init->handle, init->class); |
991 | if (ret) { | 994 | if (ret) { |
992 | NV_ERROR(dev, "Error creating object: %d (%d/0x%08x)\n", | 995 | NV_ERROR(dev, "Error creating object: %d (%d/0x%08x)\n", |
993 | ret, init->channel, init->handle); | 996 | ret, init->channel, init->handle); |
994 | goto out; | ||
995 | } | ||
996 | |||
997 | ret = nouveau_ramht_insert(chan, init->handle, gr); | ||
998 | nouveau_gpuobj_ref(NULL, &gr); | ||
999 | if (ret) { | ||
1000 | NV_ERROR(dev, "Error referencing object: %d (%d/0x%08x)\n", | ||
1001 | ret, init->channel, init->handle); | ||
1002 | } | 997 | } |
1003 | 998 | ||
1004 | out: | 999 | out: |
diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c index a32804e7d202..7a1189371096 100644 --- a/drivers/gpu/drm/nouveau/nv04_fbcon.c +++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c | |||
@@ -137,22 +137,6 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) | |||
137 | return 0; | 137 | return 0; |
138 | } | 138 | } |
139 | 139 | ||
140 | static int | ||
141 | nv04_fbcon_grobj_new(struct drm_device *dev, int class, uint32_t handle) | ||
142 | { | ||
143 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
144 | struct nouveau_gpuobj *obj = NULL; | ||
145 | int ret; | ||
146 | |||
147 | ret = nouveau_gpuobj_gr_new(dev_priv->channel, class, &obj); | ||
148 | if (ret) | ||
149 | return ret; | ||
150 | |||
151 | ret = nouveau_ramht_insert(dev_priv->channel, handle, obj); | ||
152 | nouveau_gpuobj_ref(NULL, &obj); | ||
153 | return ret; | ||
154 | } | ||
155 | |||
156 | int | 140 | int |
157 | nv04_fbcon_accel_init(struct fb_info *info) | 141 | nv04_fbcon_accel_init(struct fb_info *info) |
158 | { | 142 | { |
@@ -192,29 +176,31 @@ nv04_fbcon_accel_init(struct fb_info *info) | |||
192 | return -EINVAL; | 176 | return -EINVAL; |
193 | } | 177 | } |
194 | 178 | ||
195 | ret = nv04_fbcon_grobj_new(dev, dev_priv->card_type >= NV_10 ? | 179 | ret = nouveau_gpuobj_gr_new(chan, NvCtxSurf2D, |
196 | 0x0062 : 0x0042, NvCtxSurf2D); | 180 | dev_priv->card_type >= NV_10 ? |
181 | 0x0062 : 0x0042); | ||
197 | if (ret) | 182 | if (ret) |
198 | return ret; | 183 | return ret; |
199 | 184 | ||
200 | ret = nv04_fbcon_grobj_new(dev, 0x0019, NvClipRect); | 185 | ret = nouveau_gpuobj_gr_new(chan, NvClipRect, 0x0019); |
201 | if (ret) | 186 | if (ret) |
202 | return ret; | 187 | return ret; |
203 | 188 | ||
204 | ret = nv04_fbcon_grobj_new(dev, 0x0043, NvRop); | 189 | ret = nouveau_gpuobj_gr_new(chan, NvRop, 0x0043); |
205 | if (ret) | 190 | if (ret) |
206 | return ret; | 191 | return ret; |
207 | 192 | ||
208 | ret = nv04_fbcon_grobj_new(dev, 0x0044, NvImagePatt); | 193 | ret = nouveau_gpuobj_gr_new(chan, NvImagePatt, 0x0044); |
209 | if (ret) | 194 | if (ret) |
210 | return ret; | 195 | return ret; |
211 | 196 | ||
212 | ret = nv04_fbcon_grobj_new(dev, 0x004a, NvGdiRect); | 197 | ret = nouveau_gpuobj_gr_new(chan, NvGdiRect, 0x004a); |
213 | if (ret) | 198 | if (ret) |
214 | return ret; | 199 | return ret; |
215 | 200 | ||
216 | ret = nv04_fbcon_grobj_new(dev, dev_priv->chipset >= 0x11 ? | 201 | ret = nouveau_gpuobj_gr_new(chan, NvImageBlit, |
217 | 0x009f : 0x005f, NvImageBlit); | 202 | dev_priv->chipset >= 0x11 ? |
203 | 0x009f : 0x005f); | ||
218 | if (ret) | 204 | if (ret) |
219 | return ret; | 205 | return ret; |
220 | 206 | ||
diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c index 6edf9dca35ca..156731993907 100644 --- a/drivers/gpu/drm/nouveau/nv50_fbcon.c +++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c | |||
@@ -134,9 +134,8 @@ nv50_fbcon_accel_init(struct fb_info *info) | |||
134 | struct drm_device *dev = nfbdev->dev; | 134 | struct drm_device *dev = nfbdev->dev; |
135 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 135 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
136 | struct nouveau_channel *chan = dev_priv->channel; | 136 | struct nouveau_channel *chan = dev_priv->channel; |
137 | struct nouveau_gpuobj *eng2d = NULL; | ||
138 | uint64_t fb; | ||
139 | int ret, format; | 137 | int ret, format; |
138 | uint64_t fb; | ||
140 | 139 | ||
141 | fb = info->fix.smem_start - dev_priv->fb_phys + dev_priv->vm_vram_base; | 140 | fb = info->fix.smem_start - dev_priv->fb_phys + dev_priv->vm_vram_base; |
142 | 141 | ||
@@ -167,12 +166,7 @@ nv50_fbcon_accel_init(struct fb_info *info) | |||
167 | return -EINVAL; | 166 | return -EINVAL; |
168 | } | 167 | } |
169 | 168 | ||
170 | ret = nouveau_gpuobj_gr_new(dev_priv->channel, 0x502d, &eng2d); | 169 | ret = nouveau_gpuobj_gr_new(dev_priv->channel, Nv2D, 0x502d); |
171 | if (ret) | ||
172 | return ret; | ||
173 | |||
174 | ret = nouveau_ramht_insert(dev_priv->channel, Nv2D, eng2d); | ||
175 | nouveau_gpuobj_ref(NULL, &eng2d); | ||
176 | if (ret) | 170 | if (ret) |
177 | return ret; | 171 | return ret; |
178 | 172 | ||