diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2011-04-12 01:19:54 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2011-05-15 20:49:04 -0400 |
commit | 93187450fade03e5de977af9a879683edda64a97 (patch) | |
tree | 8c928def839ca48d9b83b3706f3100695703c3b9 /drivers/gpu/drm/nouveau | |
parent | c0924326c8306249aaae27016b80f3c07bb51705 (diff) |
drm/nv50: rename nv84_mpeg to nv50_mpeg
In preparation for adding 0x50 support.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r-- | drivers/gpu/drm/nouveau/Makefile | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_state.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_mpeg.c (renamed from drivers/gpu/drm/nouveau/nv84_mpeg.c) | 40 |
4 files changed, 24 insertions, 24 deletions
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile index 7b3f23a58993..0583677e4581 100644 --- a/drivers/gpu/drm/nouveau/Makefile +++ b/drivers/gpu/drm/nouveau/Makefile | |||
@@ -21,7 +21,7 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \ | |||
21 | nv40_grctx.o nv50_grctx.o nvc0_grctx.o \ | 21 | nv40_grctx.o nv50_grctx.o nvc0_grctx.o \ |
22 | nv84_crypt.o \ | 22 | nv84_crypt.o \ |
23 | nva3_copy.o nvc0_copy.o \ | 23 | nva3_copy.o nvc0_copy.o \ |
24 | nv40_mpeg.o nv84_mpeg.o \ | 24 | nv40_mpeg.o nv50_mpeg.o \ |
25 | nv04_instmem.o nv50_instmem.o nvc0_instmem.o \ | 25 | nv04_instmem.o nv50_instmem.o nvc0_instmem.o \ |
26 | nv50_evo.o nv50_crtc.o nv50_dac.o nv50_sor.o \ | 26 | nv50_evo.o nv50_crtc.o nv50_dac.o nv50_sor.o \ |
27 | nv50_cursor.o nv50_display.o \ | 27 | nv50_cursor.o nv50_display.o \ |
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 39cbb5179b36..e4c26a2df02a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h | |||
@@ -1158,8 +1158,8 @@ extern int nvc0_copy_create(struct drm_device *dev, int engine); | |||
1158 | /* nv40_mpeg.c */ | 1158 | /* nv40_mpeg.c */ |
1159 | extern int nv40_mpeg_create(struct drm_device *dev); | 1159 | extern int nv40_mpeg_create(struct drm_device *dev); |
1160 | 1160 | ||
1161 | /* nv84_mpeg.c */ | 1161 | /* nv50_mpeg.c */ |
1162 | extern int nv84_mpeg_create(struct drm_device *dev); | 1162 | extern int nv50_mpeg_create(struct drm_device *dev); |
1163 | 1163 | ||
1164 | /* nv04_instmem.c */ | 1164 | /* nv04_instmem.c */ |
1165 | extern int nv04_instmem_init(struct drm_device *); | 1165 | extern int nv04_instmem_init(struct drm_device *); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index f2855b688095..3999f2526179 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c | |||
@@ -622,7 +622,7 @@ nouveau_card_init(struct drm_device *dev) | |||
622 | else | 622 | else |
623 | if (dev_priv->card_type == NV_50 && dev_priv->chipset > 0x50 && | 623 | if (dev_priv->card_type == NV_50 && dev_priv->chipset > 0x50 && |
624 | (dev_priv->chipset < 0x98 || dev_priv->chipset == 0xa0)) | 624 | (dev_priv->chipset < 0x98 || dev_priv->chipset == 0xa0)) |
625 | nv84_mpeg_create(dev); | 625 | nv50_mpeg_create(dev); |
626 | 626 | ||
627 | if (!nouveau_noaccel) { | 627 | if (!nouveau_noaccel) { |
628 | for (e = 0; e < NVOBJ_ENGINE_NR; e++) { | 628 | for (e = 0; e < NVOBJ_ENGINE_NR; e++) { |
diff --git a/drivers/gpu/drm/nouveau/nv84_mpeg.c b/drivers/gpu/drm/nouveau/nv50_mpeg.c index 6c073edacbeb..82666bc69a2c 100644 --- a/drivers/gpu/drm/nouveau/nv84_mpeg.c +++ b/drivers/gpu/drm/nouveau/nv50_mpeg.c | |||
@@ -26,12 +26,12 @@ | |||
26 | #include "nouveau_drv.h" | 26 | #include "nouveau_drv.h" |
27 | #include "nouveau_ramht.h" | 27 | #include "nouveau_ramht.h" |
28 | 28 | ||
29 | struct nv84_mpeg_engine { | 29 | struct nv50_mpeg_engine { |
30 | struct nouveau_exec_engine base; | 30 | struct nouveau_exec_engine base; |
31 | }; | 31 | }; |
32 | 32 | ||
33 | static int | 33 | static int |
34 | nv84_mpeg_context_new(struct nouveau_channel *chan, int engine) | 34 | nv50_mpeg_context_new(struct nouveau_channel *chan, int engine) |
35 | { | 35 | { |
36 | struct drm_device *dev = chan->dev; | 36 | struct drm_device *dev = chan->dev; |
37 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 37 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
@@ -62,7 +62,7 @@ nv84_mpeg_context_new(struct nouveau_channel *chan, int engine) | |||
62 | } | 62 | } |
63 | 63 | ||
64 | static void | 64 | static void |
65 | nv84_mpeg_context_del(struct nouveau_channel *chan, int engine) | 65 | nv50_mpeg_context_del(struct nouveau_channel *chan, int engine) |
66 | { | 66 | { |
67 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; | 67 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
68 | struct nouveau_gpuobj *ctx = chan->engctx[engine]; | 68 | struct nouveau_gpuobj *ctx = chan->engctx[engine]; |
@@ -90,7 +90,7 @@ nv84_mpeg_context_del(struct nouveau_channel *chan, int engine) | |||
90 | } | 90 | } |
91 | 91 | ||
92 | static int | 92 | static int |
93 | nv84_mpeg_object_new(struct nouveau_channel *chan, int engine, | 93 | nv50_mpeg_object_new(struct nouveau_channel *chan, int engine, |
94 | u32 handle, u16 class) | 94 | u32 handle, u16 class) |
95 | { | 95 | { |
96 | struct drm_device *dev = chan->dev; | 96 | struct drm_device *dev = chan->dev; |
@@ -116,13 +116,13 @@ nv84_mpeg_object_new(struct nouveau_channel *chan, int engine, | |||
116 | } | 116 | } |
117 | 117 | ||
118 | static void | 118 | static void |
119 | nv84_mpeg_tlb_flush(struct drm_device *dev, int engine) | 119 | nv50_mpeg_tlb_flush(struct drm_device *dev, int engine) |
120 | { | 120 | { |
121 | nv50_vm_flush_engine(dev, 0x08); | 121 | nv50_vm_flush_engine(dev, 0x08); |
122 | } | 122 | } |
123 | 123 | ||
124 | static int | 124 | static int |
125 | nv84_mpeg_init(struct drm_device *dev, int engine) | 125 | nv50_mpeg_init(struct drm_device *dev, int engine) |
126 | { | 126 | { |
127 | nv_wr32(dev, 0x00b32c, 0x00000000); | 127 | nv_wr32(dev, 0x00b32c, 0x00000000); |
128 | nv_wr32(dev, 0x00b314, 0x00000100); | 128 | nv_wr32(dev, 0x00b314, 0x00000100); |
@@ -147,7 +147,7 @@ nv84_mpeg_init(struct drm_device *dev, int engine) | |||
147 | } | 147 | } |
148 | 148 | ||
149 | static int | 149 | static int |
150 | nv84_mpeg_fini(struct drm_device *dev, int engine) | 150 | nv50_mpeg_fini(struct drm_device *dev, int engine) |
151 | { | 151 | { |
152 | /*XXX: context save for s/r */ | 152 | /*XXX: context save for s/r */ |
153 | nv_mask(dev, 0x00b32c, 0x00000001, 0x00000000); | 153 | nv_mask(dev, 0x00b32c, 0x00000001, 0x00000000); |
@@ -156,7 +156,7 @@ nv84_mpeg_fini(struct drm_device *dev, int engine) | |||
156 | } | 156 | } |
157 | 157 | ||
158 | static void | 158 | static void |
159 | nv84_mpeg_isr(struct drm_device *dev) | 159 | nv50_mpeg_isr(struct drm_device *dev) |
160 | { | 160 | { |
161 | u32 stat = nv_rd32(dev, 0x00b100); | 161 | u32 stat = nv_rd32(dev, 0x00b100); |
162 | u32 type = nv_rd32(dev, 0x00b230); | 162 | u32 type = nv_rd32(dev, 0x00b230); |
@@ -183,9 +183,9 @@ nv84_mpeg_isr(struct drm_device *dev) | |||
183 | } | 183 | } |
184 | 184 | ||
185 | static void | 185 | static void |
186 | nv84_mpeg_destroy(struct drm_device *dev, int engine) | 186 | nv50_mpeg_destroy(struct drm_device *dev, int engine) |
187 | { | 187 | { |
188 | struct nv84_mpeg_engine *pmpeg = nv_engine(dev, engine); | 188 | struct nv50_mpeg_engine *pmpeg = nv_engine(dev, engine); |
189 | 189 | ||
190 | nouveau_irq_unregister(dev, 0); | 190 | nouveau_irq_unregister(dev, 0); |
191 | 191 | ||
@@ -194,23 +194,23 @@ nv84_mpeg_destroy(struct drm_device *dev, int engine) | |||
194 | } | 194 | } |
195 | 195 | ||
196 | int | 196 | int |
197 | nv84_mpeg_create(struct drm_device *dev) | 197 | nv50_mpeg_create(struct drm_device *dev) |
198 | { | 198 | { |
199 | struct nv84_mpeg_engine *pmpeg; | 199 | struct nv50_mpeg_engine *pmpeg; |
200 | 200 | ||
201 | pmpeg = kzalloc(sizeof(*pmpeg), GFP_KERNEL); | 201 | pmpeg = kzalloc(sizeof(*pmpeg), GFP_KERNEL); |
202 | if (!pmpeg) | 202 | if (!pmpeg) |
203 | return -ENOMEM; | 203 | return -ENOMEM; |
204 | 204 | ||
205 | pmpeg->base.destroy = nv84_mpeg_destroy; | 205 | pmpeg->base.destroy = nv50_mpeg_destroy; |
206 | pmpeg->base.init = nv84_mpeg_init; | 206 | pmpeg->base.init = nv50_mpeg_init; |
207 | pmpeg->base.fini = nv84_mpeg_fini; | 207 | pmpeg->base.fini = nv50_mpeg_fini; |
208 | pmpeg->base.context_new = nv84_mpeg_context_new; | 208 | pmpeg->base.context_new = nv50_mpeg_context_new; |
209 | pmpeg->base.context_del = nv84_mpeg_context_del; | 209 | pmpeg->base.context_del = nv50_mpeg_context_del; |
210 | pmpeg->base.object_new = nv84_mpeg_object_new; | 210 | pmpeg->base.object_new = nv50_mpeg_object_new; |
211 | pmpeg->base.tlb_flush = nv84_mpeg_tlb_flush; | 211 | pmpeg->base.tlb_flush = nv50_mpeg_tlb_flush; |
212 | 212 | ||
213 | nouveau_irq_register(dev, 0, nv84_mpeg_isr); | 213 | nouveau_irq_register(dev, 0, nv50_mpeg_isr); |
214 | 214 | ||
215 | NVOBJ_ENGINE_ADD(dev, MPEG, &pmpeg->base); | 215 | NVOBJ_ENGINE_ADD(dev, MPEG, &pmpeg->base); |
216 | NVOBJ_CLASS(dev, 0x8274, MPEG); | 216 | NVOBJ_CLASS(dev, 0x8274, MPEG); |