diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-05 19:02:01 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-05 19:02:01 -0400 |
| commit | fc1caf6eafb30ea185720e29f7f5eccca61ecd60 (patch) | |
| tree | 666dabc25a9b02e5c05f9eba32fa6b0d8027341a /drivers/gpu/drm/nouveau/nvreg.h | |
| parent | 9779714c8af09d57527f18d9aa2207dcc27a8687 (diff) | |
| parent | 96576a9e1a0cdb8a43d3af5846be0948f52b4460 (diff) | |
Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (204 commits)
agp: intel-agp: do not use PCI resources before pci_enable_device()
agp: efficeon-agp: do not use PCI resources before pci_enable_device()
drm: kill BKL from common code
drm/kms: Simplify setup of the initial I2C encoder config.
drm,io-mapping: Specify slot to use for atomic mappings
drm/radeon/kms: only expose underscan on avivo chips
drm/radeon: add new pci ids
drm: Cleanup after failing to create master->unique and dev->name
drm/radeon: tone down overchatty acpi debug messages.
drm/radeon/kms: enable underscan option for digital connectors
drm/radeon/kms: fix calculation of h/v scaling factors
drm/radeon/kms/igp: sideport is AMD only
drm/radeon/kms: handle the case of no active displays properly in the bandwidth code
drm: move ttm global code to core drm
drm/i915: Clear the Ironlake dithering flags when the pipe doesn't want it.
drm/radeon/kms: make sure HPD is set to NONE on analog-only connectors
drm/radeon/kms: make sure rio_mem is valid before unmapping it
drm/agp/i915: trim stolen space to 32M
drm/i915: Unset cursor if out-of-bounds upon mode change (v4)
drm/i915: Unreference object not handle on creation
...
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvreg.h')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvreg.h | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/drivers/gpu/drm/nouveau/nvreg.h b/drivers/gpu/drm/nouveau/nvreg.h index 5998c35237b0..ad64673ace1f 100644 --- a/drivers/gpu/drm/nouveau/nvreg.h +++ b/drivers/gpu/drm/nouveau/nvreg.h | |||
| @@ -147,28 +147,6 @@ | |||
| 147 | # define NV_VIO_GX_DONT_CARE_INDEX 0x07 | 147 | # define NV_VIO_GX_DONT_CARE_INDEX 0x07 |
| 148 | # define NV_VIO_GX_BIT_MASK_INDEX 0x08 | 148 | # define NV_VIO_GX_BIT_MASK_INDEX 0x08 |
| 149 | 149 | ||
| 150 | #define NV_PFB_BOOT_0 0x00100000 | ||
| 151 | #define NV_PFB_CFG0 0x00100200 | ||
| 152 | #define NV_PFB_CFG1 0x00100204 | ||
| 153 | #define NV_PFB_CSTATUS 0x0010020C | ||
| 154 | #define NV_PFB_REFCTRL 0x00100210 | ||
| 155 | # define NV_PFB_REFCTRL_VALID_1 (1 << 31) | ||
| 156 | #define NV_PFB_PAD 0x0010021C | ||
| 157 | # define NV_PFB_PAD_CKE_NORMAL (1 << 0) | ||
| 158 | #define NV_PFB_TILE_NV10 0x00100240 | ||
| 159 | #define NV_PFB_TILE_SIZE_NV10 0x00100244 | ||
| 160 | #define NV_PFB_REF 0x001002D0 | ||
| 161 | # define NV_PFB_REF_CMD_REFRESH (1 << 0) | ||
| 162 | #define NV_PFB_PRE 0x001002D4 | ||
| 163 | # define NV_PFB_PRE_CMD_PRECHARGE (1 << 0) | ||
| 164 | #define NV_PFB_CLOSE_PAGE2 0x0010033C | ||
| 165 | #define NV_PFB_TILE_NV40 0x00100600 | ||
| 166 | #define NV_PFB_TILE_SIZE_NV40 0x00100604 | ||
| 167 | |||
| 168 | #define NV_PEXTDEV_BOOT_0 0x00101000 | ||
| 169 | # define NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT (8 << 12) | ||
| 170 | #define NV_PEXTDEV_BOOT_3 0x0010100c | ||
| 171 | |||
| 172 | #define NV_PCRTC_INTR_0 0x00600100 | 150 | #define NV_PCRTC_INTR_0 0x00600100 |
| 173 | # define NV_PCRTC_INTR_0_VBLANK (1 << 0) | 151 | # define NV_PCRTC_INTR_0_VBLANK (1 << 0) |
| 174 | #define NV_PCRTC_INTR_EN_0 0x00600140 | 152 | #define NV_PCRTC_INTR_EN_0 0x00600140 |