Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6

Conflicts:
	drivers/net/stmmac/stmmac_main.c
	drivers/net/wireless/wl12xx/wl1271_cmd.c
	drivers/net/wireless/wl12xx/wl1271_main.c
	drivers/net/wireless/wl12xx/wl1271_spi.c
	net/core/ethtool.c
	net/mac80211/scan.c

1 files changed, 22 insertions, 7 deletions

diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index 857a09671a39..b203d06f601f 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -56,6 +56,10 @@ nv50_graph_init_intr(struct drm_device *dev)
 static void
 nv50_graph_init_regs__nv(struct drm_device *dev)
 {
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        uint32_t units = nv_rd32(dev, 0x1540);
+        int i;
+
         NV_DEBUG(dev, "\n");
 
         nv_wr32(dev, 0x400804, 0xc0000000);
@@ -65,6 +69,20 @@ nv50_graph_init_regs__nv(struct drm_device *dev)
         nv_wr32(dev, 0x405018, 0xc0000000);
         nv_wr32(dev, 0x402000, 0xc0000000);
 
+        for (i = 0; i < 16; i++) {
+                if (units & 1 << i) {
+                        if (dev_priv->chipset < 0xa0) {
+                                nv_wr32(dev, 0x408900 + (i << 12), 0xc0000000);
+                                nv_wr32(dev, 0x408e08 + (i << 12), 0xc0000000);
+                                nv_wr32(dev, 0x408314 + (i << 12), 0xc0000000);
+                        } else {
+                                nv_wr32(dev, 0x408600 + (i << 11), 0xc0000000);
+                                nv_wr32(dev, 0x408708 + (i << 11), 0xc0000000);
+                                nv_wr32(dev, 0x40831c + (i << 11), 0xc0000000);
+                        }
+                }
+        }
+
         nv_wr32(dev, 0x400108, 0xffffffff);
 
         nv_wr32(dev, 0x400824, 0x00004000);
@@ -229,10 +247,6 @@ nv50_graph_create_context(struct nouveau_channel *chan)
                 nouveau_grctx_vals_load(dev, ctx);
         }
         nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12);
-        if ((dev_priv->chipset & 0xf0) == 0xa0)
-                nv_wo32(dev, ctx, 0x00004/4, 0x00000000);
-        else
-                nv_wo32(dev, ctx, 0x0011c/4, 0x00000000);
         dev_priv->engine.instmem.finish_access(dev);
 
         return 0;
@@ -396,9 +410,10 @@ struct nouveau_pgraph_object_class nv50_graph_grclass[] = {
         { 0x5039, false, NULL }, /* m2mf */
         { 0x502d, false, NULL }, /* 2d */
         { 0x50c0, false, NULL }, /* compute */
+        { 0x85c0, false, NULL }, /* compute (nva3, nva5, nva8) */
         { 0x5097, false, NULL }, /* tesla (nv50) */
-        { 0x8297, false, NULL }, /* tesla (nv80/nv90) */
-        { 0x8397, false, NULL }, /* tesla (nva0) */
-        { 0x8597, false, NULL }, /* tesla (nva8) */
+        { 0x8297, false, NULL }, /* tesla (nv8x/nv9x) */
+        { 0x8397, false, NULL }, /* tesla (nva0, nvaa, nvac) */
+        { 0x8597, false, NULL }, /* tesla (nva3, nva5, nva8) */
         {}
 };