drm/nouveau: protect channel create/destroy and irq handler with a spinlock

The nv50 pgraph handler (for example) could reenable pgraph fifo access
and that would be bad when pgraph context is being unloaded (we need the
guarantee a ctxprog isn't running).

Signed-off-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

1 files changed, 5 insertions, 0 deletions

diff --git a/drivers/gpu/drm/nouveau/nv40_fifo.c b/drivers/gpu/drm/nouveau/nv40_fifo.c
index b4f19ccb8b41..6b2ef4a9fce1 100644
--- a/drivers/gpu/drm/nouveau/nv40_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv40_fifo.c
@@ -37,6 +37,7 @@ nv40_fifo_create_context(struct nouveau_channel *chan)
         struct drm_device *dev = chan->dev;
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         uint32_t fc = NV40_RAMFC(chan->id);
+        unsigned long flags;
         int ret;
 
         ret = nouveau_gpuobj_new_fake(dev, NV40_RAMFC(chan->id), ~0,
@@ -45,6 +46,8 @@ nv40_fifo_create_context(struct nouveau_channel *chan)
         if (ret)
                 return ret;
 
+        spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
+
         dev_priv->engine.instmem.prepare_access(dev, true);
         nv_wi32(dev, fc +  0, chan->pushbuf_base);
         nv_wi32(dev, fc +  4, chan->pushbuf_base);
@@ -63,6 +66,8 @@ nv40_fifo_create_context(struct nouveau_channel *chan)
         /* enable the fifo dma operation */
         nv_wr32(dev, NV04_PFIFO_MODE,
                 nv_rd32(dev, NV04_PFIFO_MODE) | (1 << chan->id));
+
+        spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
         return 0;
 }