diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2012-07-31 02:16:21 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2012-10-02 23:12:59 -0400 |
commit | 77145f1cbdf8d28b46ff8070ca749bad821e0774 (patch) | |
tree | b496d5d69ce4f5753028b07b09d8cf12025310f2 /drivers/gpu/drm/nouveau/nv17_tv.c | |
parent | 2094dd82eddc468b53ee99d92c38b23a65efac03 (diff) |
drm/nouveau: port remainder of drm code, and rip out compat layer
v2: Ben Skeggs <bskeggs@redhat.com>
- fill in nouveau_pm.dev to prevent oops
- fix ppc issues (build + OF shadow)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv17_tv.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv17_tv.c | 79 |
1 files changed, 48 insertions, 31 deletions
diff --git a/drivers/gpu/drm/nouveau/nv17_tv.c b/drivers/gpu/drm/nouveau/nv17_tv.c index 5d1f6f6de257..dd85f0f79acf 100644 --- a/drivers/gpu/drm/nouveau/nv17_tv.c +++ b/drivers/gpu/drm/nouveau/nv17_tv.c | |||
@@ -26,19 +26,32 @@ | |||
26 | 26 | ||
27 | #include "drmP.h" | 27 | #include "drmP.h" |
28 | #include "drm_crtc_helper.h" | 28 | #include "drm_crtc_helper.h" |
29 | #include "nouveau_drv.h" | 29 | #include "nouveau_drm.h" |
30 | #include "nouveau_reg.h" | ||
30 | #include "nouveau_encoder.h" | 31 | #include "nouveau_encoder.h" |
31 | #include "nouveau_connector.h" | 32 | #include "nouveau_connector.h" |
32 | #include "nouveau_crtc.h" | 33 | #include "nouveau_crtc.h" |
33 | #include "nouveau_hw.h" | 34 | #include "nouveau_hw.h" |
34 | #include "nv17_tv.h" | 35 | #include "nv17_tv.h" |
35 | 36 | ||
37 | #include <core/device.h> | ||
38 | |||
36 | #include <subdev/bios/gpio.h> | 39 | #include <subdev/bios/gpio.h> |
40 | #include <subdev/gpio.h> | ||
41 | |||
42 | MODULE_PARM_DESC(tv_norm, "Default TV norm.\n" | ||
43 | "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n" | ||
44 | "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n" | ||
45 | "\t\tDefault: PAL\n" | ||
46 | "\t\t*NOTE* Ignored for cards with external TV encoders."); | ||
47 | static char *nouveau_tv_norm; | ||
48 | module_param_named(tv_norm, nouveau_tv_norm, charp, 0400); | ||
37 | 49 | ||
38 | static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder) | 50 | static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder) |
39 | { | 51 | { |
40 | struct drm_device *dev = encoder->dev; | 52 | struct drm_device *dev = encoder->dev; |
41 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 53 | struct nouveau_drm *drm = nouveau_drm(dev); |
54 | struct nouveau_gpio *gpio = nouveau_gpio(drm->device); | ||
42 | uint32_t testval, regoffset = nv04_dac_output_offset(encoder); | 55 | uint32_t testval, regoffset = nv04_dac_output_offset(encoder); |
43 | uint32_t gpio0, gpio1, fp_htotal, fp_hsync_start, fp_hsync_end, | 56 | uint32_t gpio0, gpio1, fp_htotal, fp_hsync_start, fp_hsync_end, |
44 | fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c; | 57 | fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c; |
@@ -47,15 +60,15 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder) | |||
47 | 60 | ||
48 | #define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20) | 61 | #define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20) |
49 | testval = RGB_TEST_DATA(0x82, 0xeb, 0x82); | 62 | testval = RGB_TEST_DATA(0x82, 0xeb, 0x82); |
50 | if (dev_priv->vbios.tvdactestval) | 63 | if (drm->vbios.tvdactestval) |
51 | testval = dev_priv->vbios.tvdactestval; | 64 | testval = drm->vbios.tvdactestval; |
52 | 65 | ||
53 | dacclk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); | 66 | dacclk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); |
54 | head = (dacclk & 0x100) >> 8; | 67 | head = (dacclk & 0x100) >> 8; |
55 | 68 | ||
56 | /* Save the previous state. */ | 69 | /* Save the previous state. */ |
57 | gpio1 = nouveau_gpio_func_get(dev, DCB_GPIO_TVDAC1); | 70 | gpio1 = gpio->get(gpio, 0, DCB_GPIO_TVDAC1, 0xff); |
58 | gpio0 = nouveau_gpio_func_get(dev, DCB_GPIO_TVDAC0); | 71 | gpio0 = gpio->get(gpio, 0, DCB_GPIO_TVDAC0, 0xff); |
59 | fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL); | 72 | fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL); |
60 | fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START); | 73 | fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START); |
61 | fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END); | 74 | fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END); |
@@ -66,8 +79,8 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder) | |||
66 | ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c); | 79 | ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c); |
67 | 80 | ||
68 | /* Prepare the DAC for load detection. */ | 81 | /* Prepare the DAC for load detection. */ |
69 | nouveau_gpio_func_set(dev, DCB_GPIO_TVDAC1, true); | 82 | gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, true); |
70 | nouveau_gpio_func_set(dev, DCB_GPIO_TVDAC0, true); | 83 | gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, true); |
71 | 84 | ||
72 | NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343); | 85 | NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343); |
73 | NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047); | 86 | NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047); |
@@ -112,8 +125,8 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder) | |||
112 | NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end); | 125 | NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end); |
113 | NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start); | 126 | NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start); |
114 | NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal); | 127 | NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal); |
115 | nouveau_gpio_func_set(dev, DCB_GPIO_TVDAC1, gpio1); | 128 | gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, gpio1); |
116 | nouveau_gpio_func_set(dev, DCB_GPIO_TVDAC0, gpio0); | 129 | gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, gpio0); |
117 | 130 | ||
118 | return sample; | 131 | return sample; |
119 | } | 132 | } |
@@ -121,15 +134,18 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder) | |||
121 | static bool | 134 | static bool |
122 | get_tv_detect_quirks(struct drm_device *dev, uint32_t *pin_mask) | 135 | get_tv_detect_quirks(struct drm_device *dev, uint32_t *pin_mask) |
123 | { | 136 | { |
137 | struct nouveau_drm *drm = nouveau_drm(dev); | ||
138 | struct nouveau_object *device = drm->device; | ||
139 | |||
124 | /* Zotac FX5200 */ | 140 | /* Zotac FX5200 */ |
125 | if (nv_match_device(dev, 0x0322, 0x19da, 0x1035) || | 141 | if (nv_device_match(device, 0x0322, 0x19da, 0x1035) || |
126 | nv_match_device(dev, 0x0322, 0x19da, 0x2035)) { | 142 | nv_device_match(device, 0x0322, 0x19da, 0x2035)) { |
127 | *pin_mask = 0xc; | 143 | *pin_mask = 0xc; |
128 | return false; | 144 | return false; |
129 | } | 145 | } |
130 | 146 | ||
131 | /* MSI nForce2 IGP */ | 147 | /* MSI nForce2 IGP */ |
132 | if (nv_match_device(dev, 0x01f0, 0x1462, 0x5710)) { | 148 | if (nv_device_match(device, 0x01f0, 0x1462, 0x5710)) { |
133 | *pin_mask = 0xc; | 149 | *pin_mask = 0xc; |
134 | return false; | 150 | return false; |
135 | } | 151 | } |
@@ -141,7 +157,7 @@ static enum drm_connector_status | |||
141 | nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector) | 157 | nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector) |
142 | { | 158 | { |
143 | struct drm_device *dev = encoder->dev; | 159 | struct drm_device *dev = encoder->dev; |
144 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 160 | struct nouveau_drm *drm = nouveau_drm(dev); |
145 | struct drm_mode_config *conf = &dev->mode_config; | 161 | struct drm_mode_config *conf = &dev->mode_config; |
146 | struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder); | 162 | struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder); |
147 | struct dcb_output *dcb = tv_enc->base.dcb; | 163 | struct dcb_output *dcb = tv_enc->base.dcb; |
@@ -151,8 +167,8 @@ nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector) | |||
151 | return connector_status_disconnected; | 167 | return connector_status_disconnected; |
152 | 168 | ||
153 | if (reliable) { | 169 | if (reliable) { |
154 | if (dev_priv->chipset == 0x42 || | 170 | if (nv_device(drm->device)->chipset == 0x42 || |
155 | dev_priv->chipset == 0x43) | 171 | nv_device(drm->device)->chipset == 0x43) |
156 | tv_enc->pin_mask = | 172 | tv_enc->pin_mask = |
157 | nv42_tv_sample_load(encoder) >> 28 & 0xe; | 173 | nv42_tv_sample_load(encoder) >> 28 & 0xe; |
158 | else | 174 | else |
@@ -186,7 +202,7 @@ nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector) | |||
186 | if (!reliable) { | 202 | if (!reliable) { |
187 | return connector_status_unknown; | 203 | return connector_status_unknown; |
188 | } else if (tv_enc->subconnector) { | 204 | } else if (tv_enc->subconnector) { |
189 | NV_INFO(dev, "Load detected on output %c\n", | 205 | NV_INFO(drm, "Load detected on output %c\n", |
190 | '@' + ffs(dcb->or)); | 206 | '@' + ffs(dcb->or)); |
191 | return connector_status_connected; | 207 | return connector_status_connected; |
192 | } else { | 208 | } else { |
@@ -358,6 +374,8 @@ static bool nv17_tv_mode_fixup(struct drm_encoder *encoder, | |||
358 | static void nv17_tv_dpms(struct drm_encoder *encoder, int mode) | 374 | static void nv17_tv_dpms(struct drm_encoder *encoder, int mode) |
359 | { | 375 | { |
360 | struct drm_device *dev = encoder->dev; | 376 | struct drm_device *dev = encoder->dev; |
377 | struct nouveau_drm *drm = nouveau_drm(dev); | ||
378 | struct nouveau_gpio *gpio = nouveau_gpio(drm->device); | ||
361 | struct nv17_tv_state *regs = &to_tv_enc(encoder)->state; | 379 | struct nv17_tv_state *regs = &to_tv_enc(encoder)->state; |
362 | struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder); | 380 | struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder); |
363 | 381 | ||
@@ -365,7 +383,7 @@ static void nv17_tv_dpms(struct drm_encoder *encoder, int mode) | |||
365 | return; | 383 | return; |
366 | nouveau_encoder(encoder)->last_dpms = mode; | 384 | nouveau_encoder(encoder)->last_dpms = mode; |
367 | 385 | ||
368 | NV_INFO(dev, "Setting dpms mode %d on TV encoder (output %d)\n", | 386 | NV_INFO(drm, "Setting dpms mode %d on TV encoder (output %d)\n", |
369 | mode, nouveau_encoder(encoder)->dcb->index); | 387 | mode, nouveau_encoder(encoder)->dcb->index); |
370 | 388 | ||
371 | regs->ptv_200 &= ~1; | 389 | regs->ptv_200 &= ~1; |
@@ -382,8 +400,8 @@ static void nv17_tv_dpms(struct drm_encoder *encoder, int mode) | |||
382 | 400 | ||
383 | nv_load_ptv(dev, regs, 200); | 401 | nv_load_ptv(dev, regs, 200); |
384 | 402 | ||
385 | nouveau_gpio_func_set(dev, DCB_GPIO_TVDAC1, mode == DRM_MODE_DPMS_ON); | 403 | gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, mode == DRM_MODE_DPMS_ON); |
386 | nouveau_gpio_func_set(dev, DCB_GPIO_TVDAC0, mode == DRM_MODE_DPMS_ON); | 404 | gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, mode == DRM_MODE_DPMS_ON); |
387 | 405 | ||
388 | nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON); | 406 | nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON); |
389 | } | 407 | } |
@@ -391,7 +409,7 @@ static void nv17_tv_dpms(struct drm_encoder *encoder, int mode) | |||
391 | static void nv17_tv_prepare(struct drm_encoder *encoder) | 409 | static void nv17_tv_prepare(struct drm_encoder *encoder) |
392 | { | 410 | { |
393 | struct drm_device *dev = encoder->dev; | 411 | struct drm_device *dev = encoder->dev; |
394 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 412 | struct nouveau_drm *drm = nouveau_drm(dev); |
395 | struct drm_encoder_helper_funcs *helper = encoder->helper_private; | 413 | struct drm_encoder_helper_funcs *helper = encoder->helper_private; |
396 | struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder); | 414 | struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder); |
397 | int head = nouveau_crtc(encoder->crtc)->index; | 415 | int head = nouveau_crtc(encoder->crtc)->index; |
@@ -418,7 +436,7 @@ static void nv17_tv_prepare(struct drm_encoder *encoder) | |||
418 | !enc->crtc && | 436 | !enc->crtc && |
419 | nv04_dfp_get_bound_head(dev, dcb) == head) { | 437 | nv04_dfp_get_bound_head(dev, dcb) == head) { |
420 | nv04_dfp_bind_head(dev, dcb, head ^ 1, | 438 | nv04_dfp_bind_head(dev, dcb, head ^ 1, |
421 | dev_priv->vbios.fp.dual_link); | 439 | drm->vbios.fp.dual_link); |
422 | } | 440 | } |
423 | } | 441 | } |
424 | 442 | ||
@@ -430,7 +448,7 @@ static void nv17_tv_prepare(struct drm_encoder *encoder) | |||
430 | /* Set the DACCLK register */ | 448 | /* Set the DACCLK register */ |
431 | dacclk = (NVReadRAMDAC(dev, 0, dacclk_off) & ~0x30) | 0x1; | 449 | dacclk = (NVReadRAMDAC(dev, 0, dacclk_off) & ~0x30) | 0x1; |
432 | 450 | ||
433 | if (dev_priv->card_type == NV_40) | 451 | if (nv_device(drm->device)->card_type == NV_40) |
434 | dacclk |= 0x1a << 16; | 452 | dacclk |= 0x1a << 16; |
435 | 453 | ||
436 | if (tv_norm->kind == CTV_ENC_MODE) { | 454 | if (tv_norm->kind == CTV_ENC_MODE) { |
@@ -454,7 +472,7 @@ static void nv17_tv_mode_set(struct drm_encoder *encoder, | |||
454 | struct drm_display_mode *adjusted_mode) | 472 | struct drm_display_mode *adjusted_mode) |
455 | { | 473 | { |
456 | struct drm_device *dev = encoder->dev; | 474 | struct drm_device *dev = encoder->dev; |
457 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 475 | struct nouveau_drm *drm = nouveau_drm(dev); |
458 | int head = nouveau_crtc(encoder->crtc)->index; | 476 | int head = nouveau_crtc(encoder->crtc)->index; |
459 | struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head]; | 477 | struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head]; |
460 | struct nv17_tv_state *tv_regs = &to_tv_enc(encoder)->state; | 478 | struct nv17_tv_state *tv_regs = &to_tv_enc(encoder)->state; |
@@ -487,7 +505,7 @@ static void nv17_tv_mode_set(struct drm_encoder *encoder, | |||
487 | tv_regs->ptv_614 = 0x13; | 505 | tv_regs->ptv_614 = 0x13; |
488 | } | 506 | } |
489 | 507 | ||
490 | if (dev_priv->card_type >= NV_30) { | 508 | if (nv_device(drm->device)->card_type >= NV_30) { |
491 | tv_regs->ptv_500 = 0xe8e0; | 509 | tv_regs->ptv_500 = 0xe8e0; |
492 | tv_regs->ptv_504 = 0x1710; | 510 | tv_regs->ptv_504 = 0x1710; |
493 | tv_regs->ptv_604 = 0x0; | 511 | tv_regs->ptv_604 = 0x0; |
@@ -567,7 +585,7 @@ static void nv17_tv_mode_set(struct drm_encoder *encoder, | |||
567 | static void nv17_tv_commit(struct drm_encoder *encoder) | 585 | static void nv17_tv_commit(struct drm_encoder *encoder) |
568 | { | 586 | { |
569 | struct drm_device *dev = encoder->dev; | 587 | struct drm_device *dev = encoder->dev; |
570 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 588 | struct nouveau_drm *drm = nouveau_drm(dev); |
571 | struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); | 589 | struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); |
572 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); | 590 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
573 | struct drm_encoder_helper_funcs *helper = encoder->helper_private; | 591 | struct drm_encoder_helper_funcs *helper = encoder->helper_private; |
@@ -582,7 +600,7 @@ static void nv17_tv_commit(struct drm_encoder *encoder) | |||
582 | nv17_tv_state_load(dev, &to_tv_enc(encoder)->state); | 600 | nv17_tv_state_load(dev, &to_tv_enc(encoder)->state); |
583 | 601 | ||
584 | /* This could use refinement for flatpanels, but it should work */ | 602 | /* This could use refinement for flatpanels, but it should work */ |
585 | if (dev_priv->chipset < 0x44) | 603 | if (nv_device(drm->device)->chipset < 0x44) |
586 | NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + | 604 | NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + |
587 | nv04_dac_output_offset(encoder), | 605 | nv04_dac_output_offset(encoder), |
588 | 0xf0000000); | 606 | 0xf0000000); |
@@ -593,7 +611,7 @@ static void nv17_tv_commit(struct drm_encoder *encoder) | |||
593 | 611 | ||
594 | helper->dpms(encoder, DRM_MODE_DPMS_ON); | 612 | helper->dpms(encoder, DRM_MODE_DPMS_ON); |
595 | 613 | ||
596 | NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n", | 614 | NV_INFO(drm, "Output %s is running on CRTC %d using output %c\n", |
597 | drm_get_connector_name( | 615 | drm_get_connector_name( |
598 | &nouveau_encoder_connector_get(nv_encoder)->base), | 616 | &nouveau_encoder_connector_get(nv_encoder)->base), |
599 | nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); | 617 | nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); |
@@ -631,6 +649,7 @@ static int nv17_tv_create_resources(struct drm_encoder *encoder, | |||
631 | struct drm_connector *connector) | 649 | struct drm_connector *connector) |
632 | { | 650 | { |
633 | struct drm_device *dev = encoder->dev; | 651 | struct drm_device *dev = encoder->dev; |
652 | struct nouveau_drm *drm = nouveau_drm(dev); | ||
634 | struct drm_mode_config *conf = &dev->mode_config; | 653 | struct drm_mode_config *conf = &dev->mode_config; |
635 | struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder); | 654 | struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder); |
636 | struct dcb_output *dcb = nouveau_encoder(encoder)->dcb; | 655 | struct dcb_output *dcb = nouveau_encoder(encoder)->dcb; |
@@ -647,7 +666,7 @@ static int nv17_tv_create_resources(struct drm_encoder *encoder, | |||
647 | } | 666 | } |
648 | 667 | ||
649 | if (i == num_tv_norms) | 668 | if (i == num_tv_norms) |
650 | NV_WARN(dev, "Invalid TV norm setting \"%s\"\n", | 669 | NV_WARN(drm, "Invalid TV norm setting \"%s\"\n", |
651 | nouveau_tv_norm); | 670 | nouveau_tv_norm); |
652 | } | 671 | } |
653 | 672 | ||
@@ -760,8 +779,6 @@ static void nv17_tv_destroy(struct drm_encoder *encoder) | |||
760 | { | 779 | { |
761 | struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder); | 780 | struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder); |
762 | 781 | ||
763 | NV_DEBUG_KMS(encoder->dev, "\n"); | ||
764 | |||
765 | drm_encoder_cleanup(encoder); | 782 | drm_encoder_cleanup(encoder); |
766 | kfree(tv_enc); | 783 | kfree(tv_enc); |
767 | } | 784 | } |