diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2012-04-29 23:55:29 -0400 |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2012-05-24 02:55:53 -0400 |
commit | 5e120f6e4b3f35b741c5445dfc755f50128c3c44 (patch) | |
tree | 210b2bb8f5dccfcb4a6c134341fa31a633ba5243 /drivers/gpu/drm/nouveau/nv04_fence.c | |
parent | d375e7d56dffa564a6c337d2ed3217fb94826100 (diff) |
drm/nouveau/fence: convert to exec engine, and improve channel sync
Now have a somewhat simpler semaphore sync implementation for nv17:nv84,
and a switched to using semaphores as fences on nv84+ and making use of
the hardware's >= acquire operation.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv04_fence.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv04_fence.c | 139 |
1 files changed, 139 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_fence.c b/drivers/gpu/drm/nouveau/nv04_fence.c new file mode 100644 index 000000000000..08bd2ceaefef --- /dev/null +++ b/drivers/gpu/drm/nouveau/nv04_fence.c | |||
@@ -0,0 +1,139 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Red Hat Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | * Authors: Ben Skeggs | ||
23 | */ | ||
24 | |||
25 | #include "drmP.h" | ||
26 | #include "nouveau_drv.h" | ||
27 | #include "nouveau_dma.h" | ||
28 | #include "nouveau_ramht.h" | ||
29 | #include "nouveau_fence.h" | ||
30 | |||
31 | struct nv04_fence_chan { | ||
32 | struct nouveau_fence_chan base; | ||
33 | atomic_t sequence; | ||
34 | }; | ||
35 | |||
36 | struct nv04_fence_priv { | ||
37 | struct nouveau_fence_priv base; | ||
38 | }; | ||
39 | |||
40 | static int | ||
41 | nv04_fence_emit(struct nouveau_fence *fence) | ||
42 | { | ||
43 | struct nouveau_channel *chan = fence->channel; | ||
44 | int ret = RING_SPACE(chan, 2); | ||
45 | if (ret == 0) { | ||
46 | BEGIN_NV04(chan, NvSubSw, 0x0150, 1); | ||
47 | OUT_RING (chan, fence->sequence); | ||
48 | FIRE_RING (chan); | ||
49 | } | ||
50 | return ret; | ||
51 | } | ||
52 | |||
53 | static int | ||
54 | nv04_fence_sync(struct nouveau_fence *fence, struct nouveau_channel *chan) | ||
55 | { | ||
56 | return -ENODEV; | ||
57 | } | ||
58 | |||
59 | int | ||
60 | nv04_fence_mthd(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data) | ||
61 | { | ||
62 | struct nv04_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; | ||
63 | atomic_set(&fctx->sequence, data); | ||
64 | return 0; | ||
65 | } | ||
66 | |||
67 | static u32 | ||
68 | nv04_fence_read(struct nouveau_channel *chan) | ||
69 | { | ||
70 | struct nv04_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; | ||
71 | return atomic_read(&fctx->sequence); | ||
72 | } | ||
73 | |||
74 | static void | ||
75 | nv04_fence_context_del(struct nouveau_channel *chan, int engine) | ||
76 | { | ||
77 | struct nv04_fence_chan *fctx = chan->engctx[engine]; | ||
78 | nouveau_fence_context_del(&fctx->base); | ||
79 | chan->engctx[engine] = NULL; | ||
80 | kfree(fctx); | ||
81 | } | ||
82 | |||
83 | static int | ||
84 | nv04_fence_context_new(struct nouveau_channel *chan, int engine) | ||
85 | { | ||
86 | struct nv04_fence_chan *fctx = kzalloc(sizeof(*fctx), GFP_KERNEL); | ||
87 | if (fctx) { | ||
88 | nouveau_fence_context_new(&fctx->base); | ||
89 | atomic_set(&fctx->sequence, 0); | ||
90 | chan->engctx[engine] = fctx; | ||
91 | return 0; | ||
92 | } | ||
93 | return -ENOMEM; | ||
94 | } | ||
95 | |||
96 | static int | ||
97 | nv04_fence_fini(struct drm_device *dev, int engine, bool suspend) | ||
98 | { | ||
99 | return 0; | ||
100 | } | ||
101 | |||
102 | static int | ||
103 | nv04_fence_init(struct drm_device *dev, int engine) | ||
104 | { | ||
105 | return 0; | ||
106 | } | ||
107 | |||
108 | static void | ||
109 | nv04_fence_destroy(struct drm_device *dev, int engine) | ||
110 | { | ||
111 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
112 | struct nv04_fence_priv *priv = nv_engine(dev, engine); | ||
113 | |||
114 | dev_priv->eng[engine] = NULL; | ||
115 | kfree(priv); | ||
116 | } | ||
117 | |||
118 | int | ||
119 | nv04_fence_create(struct drm_device *dev) | ||
120 | { | ||
121 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
122 | struct nv04_fence_priv *priv; | ||
123 | int ret; | ||
124 | |||
125 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | ||
126 | if (!priv) | ||
127 | return -ENOMEM; | ||
128 | |||
129 | priv->base.engine.destroy = nv04_fence_destroy; | ||
130 | priv->base.engine.init = nv04_fence_init; | ||
131 | priv->base.engine.fini = nv04_fence_fini; | ||
132 | priv->base.engine.context_new = nv04_fence_context_new; | ||
133 | priv->base.engine.context_del = nv04_fence_context_del; | ||
134 | priv->base.emit = nv04_fence_emit; | ||
135 | priv->base.sync = nv04_fence_sync; | ||
136 | priv->base.read = nv04_fence_read; | ||
137 | dev_priv->eng[NVOBJ_ENGINE_FENCE] = &priv->base.engine; | ||
138 | return ret; | ||
139 | } | ||