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authorBen Skeggs <bskeggs@redhat.com>2012-04-01 07:09:13 -0400
committerBen Skeggs <bskeggs@redhat.com>2012-05-24 02:31:49 -0400
commit6d597027755b2eed4298b85ebe3cb5c93b29d1a9 (patch)
tree827e189534f285c2bbf4c96e627685d27937b4db /drivers/gpu/drm/nouveau/nv04_fbcon.c
parent78339fb75c21403677f61a02e1839b626a79325b (diff)
drm/nouveau: use the same packet header macros as userspace
Cosmetic cleanup only. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv04_fbcon.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fbcon.c48
1 files changed, 24 insertions, 24 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c
index 7a1189371096..7cd7857347ef 100644
--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -41,7 +41,7 @@ nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
41 if (ret) 41 if (ret)
42 return ret; 42 return ret;
43 43
44 BEGIN_RING(chan, NvSubImageBlit, 0x0300, 3); 44 BEGIN_NV04(chan, NvSubImageBlit, 0x0300, 3);
45 OUT_RING(chan, (region->sy << 16) | region->sx); 45 OUT_RING(chan, (region->sy << 16) | region->sx);
46 OUT_RING(chan, (region->dy << 16) | region->dx); 46 OUT_RING(chan, (region->dy << 16) | region->dx);
47 OUT_RING(chan, (region->height << 16) | region->width); 47 OUT_RING(chan, (region->height << 16) | region->width);
@@ -62,15 +62,15 @@ nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
62 if (ret) 62 if (ret)
63 return ret; 63 return ret;
64 64
65 BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1); 65 BEGIN_NV04(chan, NvSubGdiRect, 0x02fc, 1);
66 OUT_RING(chan, (rect->rop != ROP_COPY) ? 1 : 3); 66 OUT_RING(chan, (rect->rop != ROP_COPY) ? 1 : 3);
67 BEGIN_RING(chan, NvSubGdiRect, 0x03fc, 1); 67 BEGIN_NV04(chan, NvSubGdiRect, 0x03fc, 1);
68 if (info->fix.visual == FB_VISUAL_TRUECOLOR || 68 if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
69 info->fix.visual == FB_VISUAL_DIRECTCOLOR) 69 info->fix.visual == FB_VISUAL_DIRECTCOLOR)
70 OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]); 70 OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
71 else 71 else
72 OUT_RING(chan, rect->color); 72 OUT_RING(chan, rect->color);
73 BEGIN_RING(chan, NvSubGdiRect, 0x0400, 2); 73 BEGIN_NV04(chan, NvSubGdiRect, 0x0400, 2);
74 OUT_RING(chan, (rect->dx << 16) | rect->dy); 74 OUT_RING(chan, (rect->dx << 16) | rect->dy);
75 OUT_RING(chan, (rect->width << 16) | rect->height); 75 OUT_RING(chan, (rect->width << 16) | rect->height);
76 FIRE_RING(chan); 76 FIRE_RING(chan);
@@ -110,7 +110,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
110 bg = image->bg_color; 110 bg = image->bg_color;
111 } 111 }
112 112
113 BEGIN_RING(chan, NvSubGdiRect, 0x0be4, 7); 113 BEGIN_NV04(chan, NvSubGdiRect, 0x0be4, 7);
114 OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff)); 114 OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
115 OUT_RING(chan, ((image->dy + image->height) << 16) | 115 OUT_RING(chan, ((image->dy + image->height) << 16) |
116 ((image->dx + image->width) & 0xffff)); 116 ((image->dx + image->width) & 0xffff));
@@ -127,7 +127,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
127 if (ret) 127 if (ret)
128 return ret; 128 return ret;
129 129
130 BEGIN_RING(chan, NvSubGdiRect, 0x0c00, iter_len); 130 BEGIN_NV04(chan, NvSubGdiRect, 0x0c00, iter_len);
131 OUT_RINGp(chan, data, iter_len); 131 OUT_RINGp(chan, data, iter_len);
132 data += iter_len; 132 data += iter_len;
133 dsize -= iter_len; 133 dsize -= iter_len;
@@ -209,25 +209,25 @@ nv04_fbcon_accel_init(struct fb_info *info)
209 return 0; 209 return 0;
210 } 210 }
211 211
212 BEGIN_RING(chan, sub, 0x0000, 1); 212 BEGIN_NV04(chan, sub, 0x0000, 1);
213 OUT_RING(chan, NvCtxSurf2D); 213 OUT_RING(chan, NvCtxSurf2D);
214 BEGIN_RING(chan, sub, 0x0184, 2); 214 BEGIN_NV04(chan, sub, 0x0184, 2);
215 OUT_RING(chan, NvDmaFB); 215 OUT_RING(chan, NvDmaFB);
216 OUT_RING(chan, NvDmaFB); 216 OUT_RING(chan, NvDmaFB);
217 BEGIN_RING(chan, sub, 0x0300, 4); 217 BEGIN_NV04(chan, sub, 0x0300, 4);
218 OUT_RING(chan, surface_fmt); 218 OUT_RING(chan, surface_fmt);
219 OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16)); 219 OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16));
220 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base); 220 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
221 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base); 221 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
222 222
223 BEGIN_RING(chan, sub, 0x0000, 1); 223 BEGIN_NV04(chan, sub, 0x0000, 1);
224 OUT_RING(chan, NvRop); 224 OUT_RING(chan, NvRop);
225 BEGIN_RING(chan, sub, 0x0300, 1); 225 BEGIN_NV04(chan, sub, 0x0300, 1);
226 OUT_RING(chan, 0x55); 226 OUT_RING(chan, 0x55);
227 227
228 BEGIN_RING(chan, sub, 0x0000, 1); 228 BEGIN_NV04(chan, sub, 0x0000, 1);
229 OUT_RING(chan, NvImagePatt); 229 OUT_RING(chan, NvImagePatt);
230 BEGIN_RING(chan, sub, 0x0300, 8); 230 BEGIN_NV04(chan, sub, 0x0300, 8);
231 OUT_RING(chan, pattern_fmt); 231 OUT_RING(chan, pattern_fmt);
232#ifdef __BIG_ENDIAN 232#ifdef __BIG_ENDIAN
233 OUT_RING(chan, 2); 233 OUT_RING(chan, 2);
@@ -241,31 +241,31 @@ nv04_fbcon_accel_init(struct fb_info *info)
241 OUT_RING(chan, ~0); 241 OUT_RING(chan, ~0);
242 OUT_RING(chan, ~0); 242 OUT_RING(chan, ~0);
243 243
244 BEGIN_RING(chan, sub, 0x0000, 1); 244 BEGIN_NV04(chan, sub, 0x0000, 1);
245 OUT_RING(chan, NvClipRect); 245 OUT_RING(chan, NvClipRect);
246 BEGIN_RING(chan, sub, 0x0300, 2); 246 BEGIN_NV04(chan, sub, 0x0300, 2);
247 OUT_RING(chan, 0); 247 OUT_RING(chan, 0);
248 OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual); 248 OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual);
249 249
250 BEGIN_RING(chan, NvSubImageBlit, 0x0000, 1); 250 BEGIN_NV04(chan, NvSubImageBlit, 0x0000, 1);
251 OUT_RING(chan, NvImageBlit); 251 OUT_RING(chan, NvImageBlit);
252 BEGIN_RING(chan, NvSubImageBlit, 0x019c, 1); 252 BEGIN_NV04(chan, NvSubImageBlit, 0x019c, 1);
253 OUT_RING(chan, NvCtxSurf2D); 253 OUT_RING(chan, NvCtxSurf2D);
254 BEGIN_RING(chan, NvSubImageBlit, 0x02fc, 1); 254 BEGIN_NV04(chan, NvSubImageBlit, 0x02fc, 1);
255 OUT_RING(chan, 3); 255 OUT_RING(chan, 3);
256 256
257 BEGIN_RING(chan, NvSubGdiRect, 0x0000, 1); 257 BEGIN_NV04(chan, NvSubGdiRect, 0x0000, 1);
258 OUT_RING(chan, NvGdiRect); 258 OUT_RING(chan, NvGdiRect);
259 BEGIN_RING(chan, NvSubGdiRect, 0x0198, 1); 259 BEGIN_NV04(chan, NvSubGdiRect, 0x0198, 1);
260 OUT_RING(chan, NvCtxSurf2D); 260 OUT_RING(chan, NvCtxSurf2D);
261 BEGIN_RING(chan, NvSubGdiRect, 0x0188, 2); 261 BEGIN_NV04(chan, NvSubGdiRect, 0x0188, 2);
262 OUT_RING(chan, NvImagePatt); 262 OUT_RING(chan, NvImagePatt);
263 OUT_RING(chan, NvRop); 263 OUT_RING(chan, NvRop);
264 BEGIN_RING(chan, NvSubGdiRect, 0x0304, 1); 264 BEGIN_NV04(chan, NvSubGdiRect, 0x0304, 1);
265 OUT_RING(chan, 1); 265 OUT_RING(chan, 1);
266 BEGIN_RING(chan, NvSubGdiRect, 0x0300, 1); 266 BEGIN_NV04(chan, NvSubGdiRect, 0x0300, 1);
267 OUT_RING(chan, rect_fmt); 267 OUT_RING(chan, rect_fmt);
268 BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1); 268 BEGIN_NV04(chan, NvSubGdiRect, 0x02fc, 1);
269 OUT_RING(chan, 3); 269 OUT_RING(chan, 3);
270 270
271 FIRE_RING(chan); 271 FIRE_RING(chan);