diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2010-11-22 19:10:24 -0500 |
---|---|---|
committer | Francisco Jerez <currojerez@riseup.net> | 2010-12-07 21:00:35 -0500 |
commit | ceac30999dfb00ee7b56cfea8b28ef50999a3c95 (patch) | |
tree | b0295cf2caf466d94e35103a3c1b6d4baf57f4eb /drivers/gpu/drm/nouveau/nouveau_object.c | |
parent | d908175cca901b95ba1628428b216e6e7188e8fb (diff) |
drm/nouveau: implicitly insert non-DMA objects into RAMHT
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_object.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_object.c | 59 |
1 files changed, 27 insertions, 32 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c index 24540862a23f..3518ebba6fbd 100644 --- a/drivers/gpu/drm/nouveau/nouveau_object.c +++ b/drivers/gpu/drm/nouveau/nouveau_object.c | |||
@@ -608,13 +608,9 @@ static int | |||
608 | nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class, | 608 | nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class, |
609 | struct nouveau_gpuobj **gpuobj_ret) | 609 | struct nouveau_gpuobj **gpuobj_ret) |
610 | { | 610 | { |
611 | struct drm_nouveau_private *dev_priv; | 611 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
612 | struct nouveau_gpuobj *gpuobj; | 612 | struct nouveau_gpuobj *gpuobj; |
613 | 613 | ||
614 | if (!chan || !gpuobj_ret || *gpuobj_ret != NULL) | ||
615 | return -EINVAL; | ||
616 | dev_priv = chan->dev->dev_private; | ||
617 | |||
618 | gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL); | 614 | gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL); |
619 | if (!gpuobj) | 615 | if (!gpuobj) |
620 | return -ENOMEM; | 616 | return -ENOMEM; |
@@ -632,12 +628,12 @@ nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class, | |||
632 | } | 628 | } |
633 | 629 | ||
634 | int | 630 | int |
635 | nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class, | 631 | nouveau_gpuobj_gr_new(struct nouveau_channel *chan, u32 handle, int class) |
636 | struct nouveau_gpuobj **gpuobj) | ||
637 | { | 632 | { |
638 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; | 633 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
639 | struct drm_device *dev = chan->dev; | 634 | struct drm_device *dev = chan->dev; |
640 | struct nouveau_gpuobj_class *oc; | 635 | struct nouveau_gpuobj_class *oc; |
636 | struct nouveau_gpuobj *gpuobj; | ||
641 | int ret; | 637 | int ret; |
642 | 638 | ||
643 | NV_DEBUG(dev, "ch%d class=0x%04x\n", chan->id, class); | 639 | NV_DEBUG(dev, "ch%d class=0x%04x\n", chan->id, class); |
@@ -651,10 +647,12 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class, | |||
651 | return -EINVAL; | 647 | return -EINVAL; |
652 | 648 | ||
653 | found: | 649 | found: |
654 | if (oc->engine == NVOBJ_ENGINE_SW) | ||
655 | return nouveau_gpuobj_sw_new(chan, class, gpuobj); | ||
656 | |||
657 | switch (oc->engine) { | 650 | switch (oc->engine) { |
651 | case NVOBJ_ENGINE_SW: | ||
652 | ret = nouveau_gpuobj_sw_new(chan, class, &gpuobj); | ||
653 | if (ret) | ||
654 | return ret; | ||
655 | goto insert; | ||
658 | case NVOBJ_ENGINE_GR: | 656 | case NVOBJ_ENGINE_GR: |
659 | if (dev_priv->card_type >= NV_50 && !chan->ramin_grctx) { | 657 | if (dev_priv->card_type >= NV_50 && !chan->ramin_grctx) { |
660 | struct nouveau_pgraph_engine *pgraph = | 658 | struct nouveau_pgraph_engine *pgraph = |
@@ -681,41 +679,47 @@ found: | |||
681 | nouveau_gpuobj_class_instmem_size(dev, class), | 679 | nouveau_gpuobj_class_instmem_size(dev, class), |
682 | 16, | 680 | 16, |
683 | NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE, | 681 | NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE, |
684 | gpuobj); | 682 | &gpuobj); |
685 | if (ret) { | 683 | if (ret) { |
686 | NV_ERROR(dev, "error creating gpuobj: %d\n", ret); | 684 | NV_ERROR(dev, "error creating gpuobj: %d\n", ret); |
687 | return ret; | 685 | return ret; |
688 | } | 686 | } |
689 | 687 | ||
690 | if (dev_priv->card_type >= NV_50) { | 688 | if (dev_priv->card_type >= NV_50) { |
691 | nv_wo32(*gpuobj, 0, class); | 689 | nv_wo32(gpuobj, 0, class); |
692 | nv_wo32(*gpuobj, 20, 0x00010000); | 690 | nv_wo32(gpuobj, 20, 0x00010000); |
693 | } else { | 691 | } else { |
694 | switch (class) { | 692 | switch (class) { |
695 | case NV_CLASS_NULL: | 693 | case NV_CLASS_NULL: |
696 | nv_wo32(*gpuobj, 0, 0x00001030); | 694 | nv_wo32(gpuobj, 0, 0x00001030); |
697 | nv_wo32(*gpuobj, 4, 0xFFFFFFFF); | 695 | nv_wo32(gpuobj, 4, 0xFFFFFFFF); |
698 | break; | 696 | break; |
699 | default: | 697 | default: |
700 | if (dev_priv->card_type >= NV_40) { | 698 | if (dev_priv->card_type >= NV_40) { |
701 | nv_wo32(*gpuobj, 0, class); | 699 | nv_wo32(gpuobj, 0, class); |
702 | #ifdef __BIG_ENDIAN | 700 | #ifdef __BIG_ENDIAN |
703 | nv_wo32(*gpuobj, 8, 0x01000000); | 701 | nv_wo32(gpuobj, 8, 0x01000000); |
704 | #endif | 702 | #endif |
705 | } else { | 703 | } else { |
706 | #ifdef __BIG_ENDIAN | 704 | #ifdef __BIG_ENDIAN |
707 | nv_wo32(*gpuobj, 0, class | 0x00080000); | 705 | nv_wo32(gpuobj, 0, class | 0x00080000); |
708 | #else | 706 | #else |
709 | nv_wo32(*gpuobj, 0, class); | 707 | nv_wo32(gpuobj, 0, class); |
710 | #endif | 708 | #endif |
711 | } | 709 | } |
712 | } | 710 | } |
713 | } | 711 | } |
714 | dev_priv->engine.instmem.flush(dev); | 712 | dev_priv->engine.instmem.flush(dev); |
715 | 713 | ||
716 | (*gpuobj)->engine = oc->engine; | 714 | gpuobj->engine = oc->engine; |
717 | (*gpuobj)->class = oc->id; | 715 | gpuobj->class = oc->id; |
718 | return 0; | 716 | |
717 | insert: | ||
718 | ret = nouveau_ramht_insert(chan, handle, gpuobj); | ||
719 | if (ret) | ||
720 | NV_ERROR(dev, "error adding gpuobj to RAMHT: %d\n", ret); | ||
721 | nouveau_gpuobj_ref(NULL, &gpuobj); | ||
722 | return ret; | ||
719 | } | 723 | } |
720 | 724 | ||
721 | static int | 725 | static int |
@@ -971,7 +975,6 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data, | |||
971 | struct drm_file *file_priv) | 975 | struct drm_file *file_priv) |
972 | { | 976 | { |
973 | struct drm_nouveau_grobj_alloc *init = data; | 977 | struct drm_nouveau_grobj_alloc *init = data; |
974 | struct nouveau_gpuobj *gr = NULL; | ||
975 | struct nouveau_channel *chan; | 978 | struct nouveau_channel *chan; |
976 | int ret; | 979 | int ret; |
977 | 980 | ||
@@ -987,18 +990,10 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data, | |||
987 | goto out; | 990 | goto out; |
988 | } | 991 | } |
989 | 992 | ||
990 | ret = nouveau_gpuobj_gr_new(chan, init->class, &gr); | 993 | ret = nouveau_gpuobj_gr_new(chan, init->handle, init->class); |
991 | if (ret) { | 994 | if (ret) { |
992 | NV_ERROR(dev, "Error creating object: %d (%d/0x%08x)\n", | 995 | NV_ERROR(dev, "Error creating object: %d (%d/0x%08x)\n", |
993 | ret, init->channel, init->handle); | 996 | ret, init->channel, init->handle); |
994 | goto out; | ||
995 | } | ||
996 | |||
997 | ret = nouveau_ramht_insert(chan, init->handle, gr); | ||
998 | nouveau_gpuobj_ref(NULL, &gr); | ||
999 | if (ret) { | ||
1000 | NV_ERROR(dev, "Error referencing object: %d (%d/0x%08x)\n", | ||
1001 | ret, init->channel, init->handle); | ||
1002 | } | 997 | } |
1003 | 998 | ||
1004 | out: | 999 | out: |