diff options
author | Dan Williams <dan.j.williams@intel.com> | 2010-05-17 19:30:58 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2010-05-17 19:30:58 -0400 |
commit | 0b28330e39bbe0ffee4c56b09fc415fcec595ea3 (patch) | |
tree | fcf504879883763557e696eff81427b1ab78f76b /drivers/gpu/drm/nouveau/nouveau_drv.h | |
parent | 058276303dbc4ed089c1f7dad0871810b1f5ddf1 (diff) | |
parent | caa20d974c86af496b419eef70010e63b7fab7ac (diff) |
Merge branch 'ioat' into dmaengine
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_drv.h')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.h | 46 |
1 files changed, 25 insertions, 21 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 4b9aaf2a8d0f..ace630aa89e1 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h | |||
@@ -76,6 +76,7 @@ struct nouveau_bo { | |||
76 | struct ttm_buffer_object bo; | 76 | struct ttm_buffer_object bo; |
77 | struct ttm_placement placement; | 77 | struct ttm_placement placement; |
78 | u32 placements[3]; | 78 | u32 placements[3]; |
79 | u32 busy_placements[3]; | ||
79 | struct ttm_bo_kmap_obj kmap; | 80 | struct ttm_bo_kmap_obj kmap; |
80 | struct list_head head; | 81 | struct list_head head; |
81 | 82 | ||
@@ -519,6 +520,7 @@ struct drm_nouveau_private { | |||
519 | 520 | ||
520 | struct workqueue_struct *wq; | 521 | struct workqueue_struct *wq; |
521 | struct work_struct irq_work; | 522 | struct work_struct irq_work; |
523 | struct work_struct hpd_work; | ||
522 | 524 | ||
523 | struct list_head vbl_waiting; | 525 | struct list_head vbl_waiting; |
524 | 526 | ||
@@ -533,7 +535,6 @@ struct drm_nouveau_private { | |||
533 | 535 | ||
534 | struct fb_info *fbdev_info; | 536 | struct fb_info *fbdev_info; |
535 | 537 | ||
536 | int fifo_alloc_count; | ||
537 | struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR]; | 538 | struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR]; |
538 | 539 | ||
539 | struct nouveau_engine engine; | 540 | struct nouveau_engine engine; |
@@ -553,12 +554,6 @@ struct drm_nouveau_private { | |||
553 | uint32_t ramro_offset; | 554 | uint32_t ramro_offset; |
554 | uint32_t ramro_size; | 555 | uint32_t ramro_size; |
555 | 556 | ||
556 | /* base physical addresses */ | ||
557 | uint64_t fb_phys; | ||
558 | uint64_t fb_available_size; | ||
559 | uint64_t fb_mappable_pages; | ||
560 | uint64_t fb_aper_free; | ||
561 | |||
562 | struct { | 557 | struct { |
563 | enum { | 558 | enum { |
564 | NOUVEAU_GART_NONE = 0, | 559 | NOUVEAU_GART_NONE = 0, |
@@ -572,10 +567,6 @@ struct drm_nouveau_private { | |||
572 | struct nouveau_gpuobj *sg_ctxdma; | 567 | struct nouveau_gpuobj *sg_ctxdma; |
573 | struct page *sg_dummy_page; | 568 | struct page *sg_dummy_page; |
574 | dma_addr_t sg_dummy_bus; | 569 | dma_addr_t sg_dummy_bus; |
575 | |||
576 | /* nottm hack */ | ||
577 | struct drm_ttm_backend *sg_be; | ||
578 | unsigned long sg_handle; | ||
579 | } gart_info; | 570 | } gart_info; |
580 | 571 | ||
581 | /* nv10-nv40 tiling regions */ | 572 | /* nv10-nv40 tiling regions */ |
@@ -584,6 +575,16 @@ struct drm_nouveau_private { | |||
584 | spinlock_t lock; | 575 | spinlock_t lock; |
585 | } tile; | 576 | } tile; |
586 | 577 | ||
578 | /* VRAM/fb configuration */ | ||
579 | uint64_t vram_size; | ||
580 | uint64_t vram_sys_base; | ||
581 | |||
582 | uint64_t fb_phys; | ||
583 | uint64_t fb_available_size; | ||
584 | uint64_t fb_mappable_pages; | ||
585 | uint64_t fb_aper_free; | ||
586 | int fb_mtrr; | ||
587 | |||
587 | /* G8x/G9x virtual address space */ | 588 | /* G8x/G9x virtual address space */ |
588 | uint64_t vm_gart_base; | 589 | uint64_t vm_gart_base; |
589 | uint64_t vm_gart_size; | 590 | uint64_t vm_gart_size; |
@@ -592,10 +593,6 @@ struct drm_nouveau_private { | |||
592 | uint64_t vm_end; | 593 | uint64_t vm_end; |
593 | struct nouveau_gpuobj *vm_vram_pt[NV50_VM_VRAM_NR]; | 594 | struct nouveau_gpuobj *vm_vram_pt[NV50_VM_VRAM_NR]; |
594 | int vm_vram_pt_nr; | 595 | int vm_vram_pt_nr; |
595 | uint64_t vram_sys_base; | ||
596 | |||
597 | /* the mtrr covering the FB */ | ||
598 | int fb_mtrr; | ||
599 | 596 | ||
600 | struct mem_block *ramin_heap; | 597 | struct mem_block *ramin_heap; |
601 | 598 | ||
@@ -614,11 +611,7 @@ struct drm_nouveau_private { | |||
614 | uint32_t dac_users[4]; | 611 | uint32_t dac_users[4]; |
615 | 612 | ||
616 | struct nouveau_suspend_resume { | 613 | struct nouveau_suspend_resume { |
617 | uint32_t fifo_mode; | ||
618 | uint32_t graph_ctx_control; | ||
619 | uint32_t graph_state; | ||
620 | uint32_t *ramin_copy; | 614 | uint32_t *ramin_copy; |
621 | uint64_t ramin_size; | ||
622 | } susres; | 615 | } susres; |
623 | 616 | ||
624 | struct backlight_device *backlight; | 617 | struct backlight_device *backlight; |
@@ -681,6 +674,7 @@ extern int nouveau_uscript_tmds; | |||
681 | extern int nouveau_vram_pushbuf; | 674 | extern int nouveau_vram_pushbuf; |
682 | extern int nouveau_vram_notify; | 675 | extern int nouveau_vram_notify; |
683 | extern int nouveau_fbpercrtc; | 676 | extern int nouveau_fbpercrtc; |
677 | extern int nouveau_tv_disable; | ||
684 | extern char *nouveau_tv_norm; | 678 | extern char *nouveau_tv_norm; |
685 | extern int nouveau_reg_debug; | 679 | extern int nouveau_reg_debug; |
686 | extern char *nouveau_vbios; | 680 | extern char *nouveau_vbios; |
@@ -688,6 +682,7 @@ extern int nouveau_ctxfw; | |||
688 | extern int nouveau_ignorelid; | 682 | extern int nouveau_ignorelid; |
689 | extern int nouveau_nofbaccel; | 683 | extern int nouveau_nofbaccel; |
690 | extern int nouveau_noaccel; | 684 | extern int nouveau_noaccel; |
685 | extern int nouveau_override_conntype; | ||
691 | 686 | ||
692 | extern int nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state); | 687 | extern int nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state); |
693 | extern int nouveau_pci_resume(struct pci_dev *pdev); | 688 | extern int nouveau_pci_resume(struct pci_dev *pdev); |
@@ -715,7 +710,7 @@ extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *, | |||
715 | struct drm_file *, int tail); | 710 | struct drm_file *, int tail); |
716 | extern void nouveau_mem_takedown(struct mem_block **heap); | 711 | extern void nouveau_mem_takedown(struct mem_block **heap); |
717 | extern void nouveau_mem_free_block(struct mem_block *); | 712 | extern void nouveau_mem_free_block(struct mem_block *); |
718 | extern uint64_t nouveau_mem_fb_amount(struct drm_device *); | 713 | extern int nouveau_mem_detect(struct drm_device *dev); |
719 | extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap); | 714 | extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap); |
720 | extern int nouveau_mem_init(struct drm_device *); | 715 | extern int nouveau_mem_init(struct drm_device *); |
721 | extern int nouveau_mem_init_agp(struct drm_device *); | 716 | extern int nouveau_mem_init_agp(struct drm_device *); |
@@ -926,6 +921,10 @@ extern void nv40_fb_takedown(struct drm_device *); | |||
926 | extern void nv40_fb_set_region_tiling(struct drm_device *, int, uint32_t, | 921 | extern void nv40_fb_set_region_tiling(struct drm_device *, int, uint32_t, |
927 | uint32_t, uint32_t); | 922 | uint32_t, uint32_t); |
928 | 923 | ||
924 | /* nv50_fb.c */ | ||
925 | extern int nv50_fb_init(struct drm_device *); | ||
926 | extern void nv50_fb_takedown(struct drm_device *); | ||
927 | |||
929 | /* nv04_fifo.c */ | 928 | /* nv04_fifo.c */ |
930 | extern int nv04_fifo_init(struct drm_device *); | 929 | extern int nv04_fifo_init(struct drm_device *); |
931 | extern void nv04_fifo_disable(struct drm_device *); | 930 | extern void nv04_fifo_disable(struct drm_device *); |
@@ -1118,7 +1117,8 @@ extern int nouveau_bo_pin(struct nouveau_bo *, uint32_t flags); | |||
1118 | extern int nouveau_bo_unpin(struct nouveau_bo *); | 1117 | extern int nouveau_bo_unpin(struct nouveau_bo *); |
1119 | extern int nouveau_bo_map(struct nouveau_bo *); | 1118 | extern int nouveau_bo_map(struct nouveau_bo *); |
1120 | extern void nouveau_bo_unmap(struct nouveau_bo *); | 1119 | extern void nouveau_bo_unmap(struct nouveau_bo *); |
1121 | extern void nouveau_bo_placement_set(struct nouveau_bo *, uint32_t memtype); | 1120 | extern void nouveau_bo_placement_set(struct nouveau_bo *, uint32_t type, |
1121 | uint32_t busy); | ||
1122 | extern u16 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index); | 1122 | extern u16 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index); |
1123 | extern void nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val); | 1123 | extern void nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val); |
1124 | extern u32 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index); | 1124 | extern u32 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index); |
@@ -1162,6 +1162,10 @@ extern int nouveau_gem_ioctl_info(struct drm_device *, void *, | |||
1162 | int nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); | 1162 | int nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); |
1163 | int nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); | 1163 | int nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); |
1164 | 1164 | ||
1165 | /* nv50_gpio.c */ | ||
1166 | int nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); | ||
1167 | int nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); | ||
1168 | |||
1165 | #ifndef ioread32_native | 1169 | #ifndef ioread32_native |
1166 | #ifdef __BIG_ENDIAN | 1170 | #ifdef __BIG_ENDIAN |
1167 | #define ioread16_native ioread16be | 1171 | #define ioread16_native ioread16be |