diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2010-08-04 20:48:18 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2010-10-04 20:01:20 -0400 |
commit | d961db75ce86a84f1f04e91ad1014653ed7d9f46 (patch) | |
tree | a827b77524fdc0c37da70936fbb0627ac7e4b492 /drivers/gpu/drm/nouveau/nouveau_channel.c | |
parent | 42311ff90dc8746bd81427b2ed6efda9af791b77 (diff) |
drm/ttm: restructure to allow driver to plug in alternate memory manager
Nouveau will need this on GeForce 8 and up to account for the GPU
reordering physical VRAM for some memory types.
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Acked-by: Thomas Hellström <thellstrom@vmware.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_channel.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_channel.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c index 5eb4c966273f..373950e34814 100644 --- a/drivers/gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c | |||
@@ -48,14 +48,14 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan) | |||
48 | dev_priv->gart_info.aper_size, | 48 | dev_priv->gart_info.aper_size, |
49 | NV_DMA_ACCESS_RO, &pushbuf, | 49 | NV_DMA_ACCESS_RO, &pushbuf, |
50 | NULL); | 50 | NULL); |
51 | chan->pushbuf_base = pb->bo.mem.mm_node->start << PAGE_SHIFT; | 51 | chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT; |
52 | } else | 52 | } else |
53 | if (dev_priv->card_type != NV_04) { | 53 | if (dev_priv->card_type != NV_04) { |
54 | ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0, | 54 | ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0, |
55 | dev_priv->fb_available_size, | 55 | dev_priv->fb_available_size, |
56 | NV_DMA_ACCESS_RO, | 56 | NV_DMA_ACCESS_RO, |
57 | NV_DMA_TARGET_VIDMEM, &pushbuf); | 57 | NV_DMA_TARGET_VIDMEM, &pushbuf); |
58 | chan->pushbuf_base = pb->bo.mem.mm_node->start << PAGE_SHIFT; | 58 | chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT; |
59 | } else { | 59 | } else { |
60 | /* NV04 cmdbuf hack, from original ddx.. not sure of it's | 60 | /* NV04 cmdbuf hack, from original ddx.. not sure of it's |
61 | * exact reason for existing :) PCI access to cmdbuf in | 61 | * exact reason for existing :) PCI access to cmdbuf in |
@@ -67,7 +67,7 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan) | |||
67 | dev_priv->fb_available_size, | 67 | dev_priv->fb_available_size, |
68 | NV_DMA_ACCESS_RO, | 68 | NV_DMA_ACCESS_RO, |
69 | NV_DMA_TARGET_PCI, &pushbuf); | 69 | NV_DMA_TARGET_PCI, &pushbuf); |
70 | chan->pushbuf_base = pb->bo.mem.mm_node->start << PAGE_SHIFT; | 70 | chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT; |
71 | } | 71 | } |
72 | 72 | ||
73 | nouveau_gpuobj_ref(pushbuf, &chan->pushbuf); | 73 | nouveau_gpuobj_ref(pushbuf, &chan->pushbuf); |