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authorStephane Viau <sviau@codeaurora.org>2015-03-09 09:11:06 -0400
committerRob Clark <robdclark@gmail.com>2015-04-01 19:29:36 -0400
commit6fa6acdfa37737fce6f69a7aa50606825ccea5ea (patch)
treeb1fcfa280738f4bde8d8d0c2c7816454e622641d /drivers/gpu/drm/msm
parentde50d351b37ba43a8d9e944e78c4df37f88d4ae2 (diff)
drm/msm/mdp5: Get SMP client list from mdp5_cfg
SMP blocks are configured for specific client IDs (ports). These client IDs can be different from one chip to another for a given pipe. e.g.: DMA0 pipe fetch Y component is connected to: - port #10 for MDP5 v1.3 - port #4 for MDP5 v1.6 In order to be compatible for upcoming versions of MDP5, the client ID list is passed through the MDP5 config module rather than using a list of hard-coded enum values. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm')
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c20
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h1
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c44
3 files changed, 41 insertions, 24 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
index 4c570e646b74..9626951bb896 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
@@ -31,6 +31,11 @@ const struct mdp5_cfg_hw msm8x74_config = {
31 .smp = { 31 .smp = {
32 .mmb_count = 22, 32 .mmb_count = 22,
33 .mmb_size = 4096, 33 .mmb_size = 4096,
34 .clients = {
35 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, [SSPP_VIG2] = 7,
36 [SSPP_DMA0] = 10, [SSPP_DMA1] = 13,
37 [SSPP_RGB0] = 16, [SSPP_RGB1] = 17, [SSPP_RGB2] = 18,
38 },
34 }, 39 },
35 .ctl = { 40 .ctl = {
36 .count = 5, 41 .count = 5,
@@ -86,11 +91,18 @@ const struct mdp5_cfg_hw apq8084_config = {
86 .smp = { 91 .smp = {
87 .mmb_count = 44, 92 .mmb_count = 44,
88 .mmb_size = 8192, 93 .mmb_size = 8192,
94 .clients = {
95 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4,
96 [SSPP_VIG2] = 7, [SSPP_VIG3] = 19,
97 [SSPP_DMA0] = 10, [SSPP_DMA1] = 13,
98 [SSPP_RGB0] = 16, [SSPP_RGB1] = 17,
99 [SSPP_RGB2] = 18, [SSPP_RGB3] = 22,
100 },
89 .reserved_state[0] = GENMASK(7, 0), /* first 8 MMBs */ 101 .reserved_state[0] = GENMASK(7, 0), /* first 8 MMBs */
90 .reserved[CID_RGB0] = 2, 102 .reserved = {
91 .reserved[CID_RGB1] = 2, 103 /* Two SMP blocks are statically tied to RGB pipes: */
92 .reserved[CID_RGB2] = 2, 104 [16] = 2, [17] = 2, [18] = 2, [22] = 2,
93 .reserved[CID_RGB3] = 2, 105 },
94 }, 106 },
95 .ctl = { 107 .ctl = {
96 .count = 5, 108 .count = 5,
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
index 11f3e869e880..3a551b0892d8 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
@@ -52,6 +52,7 @@ struct mdp5_ctl_block {
52struct mdp5_smp_block { 52struct mdp5_smp_block {
53 int mmb_count; /* number of SMP MMBs */ 53 int mmb_count; /* number of SMP MMBs */
54 int mmb_size; /* MMB: size in bytes */ 54 int mmb_size; /* MMB: size in bytes */
55 uint32_t clients[MAX_CLIENTS]; /* SMP port allocation /pipe */
55 mdp5_smp_state_t reserved_state;/* SMP MMBs statically allocated */ 56 mdp5_smp_state_t reserved_state;/* SMP MMBs statically allocated */
56 int reserved[MAX_CLIENTS]; /* # of MMBs allocated per client */ 57 int reserved[MAX_CLIENTS]; /* # of MMBs allocated per client */
57}; 58};
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c
index 361c064ba44c..16702aecf0df 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c
@@ -74,7 +74,7 @@ struct mdp5_smp {
74 spinlock_t state_lock; 74 spinlock_t state_lock;
75 mdp5_smp_state_t state; /* to track smp allocation amongst pipes: */ 75 mdp5_smp_state_t state; /* to track smp allocation amongst pipes: */
76 76
77 struct mdp5_client_smp_state client_state[CID_MAX]; 77 struct mdp5_client_smp_state client_state[MAX_CLIENTS];
78}; 78};
79 79
80static inline 80static inline
@@ -85,27 +85,31 @@ struct mdp5_kms *get_kms(struct mdp5_smp *smp)
85 return to_mdp5_kms(to_mdp_kms(priv->kms)); 85 return to_mdp5_kms(to_mdp_kms(priv->kms));
86} 86}
87 87
88static inline enum mdp5_client_id pipe2client(enum mdp5_pipe pipe, int plane) 88static inline u32 pipe2client(enum mdp5_pipe pipe, int plane)
89{ 89{
90 WARN_ON(plane >= pipe2nclients(pipe)); 90#define CID_UNUSED 0
91 switch (pipe) { 91
92 case SSPP_VIG0: return CID_VIG0_Y + plane; 92 if (WARN_ON(plane >= pipe2nclients(pipe)))
93 case SSPP_VIG1: return CID_VIG1_Y + plane; 93 return CID_UNUSED;
94 case SSPP_VIG2: return CID_VIG2_Y + plane; 94
95 case SSPP_RGB0: return CID_RGB0; 95 /*
96 case SSPP_RGB1: return CID_RGB1; 96 * Note on SMP clients:
97 case SSPP_RGB2: return CID_RGB2; 97 * For ViG pipes, fetch Y/Cr/Cb-components clients are always
98 case SSPP_DMA0: return CID_DMA0_Y + plane; 98 * consecutive, and in that order.
99 case SSPP_DMA1: return CID_DMA1_Y + plane; 99 *
100 case SSPP_VIG3: return CID_VIG3_Y + plane; 100 * e.g.:
101 case SSPP_RGB3: return CID_RGB3; 101 * if mdp5_cfg->smp.clients[SSPP_VIG0] = N,
102 default: return CID_UNUSED; 102 * Y plane's client ID is N
103 } 103 * Cr plane's client ID is N + 1
104 * Cb plane's client ID is N + 2
105 */
106
107 return mdp5_cfg->smp.clients[pipe] + plane;
104} 108}
105 109
106/* step #1: update # of blocks pending for the client: */ 110/* step #1: update # of blocks pending for the client: */
107static int smp_request_block(struct mdp5_smp *smp, 111static int smp_request_block(struct mdp5_smp *smp,
108 enum mdp5_client_id cid, int nblks) 112 u32 cid, int nblks)
109{ 113{
110 struct mdp5_kms *mdp5_kms = get_kms(smp); 114 struct mdp5_kms *mdp5_kms = get_kms(smp);
111 const struct mdp5_cfg_hw *hw_cfg; 115 const struct mdp5_cfg_hw *hw_cfg;
@@ -227,7 +231,7 @@ void mdp5_smp_release(struct mdp5_smp *smp, enum mdp5_pipe pipe)
227} 231}
228 232
229static void update_smp_state(struct mdp5_smp *smp, 233static void update_smp_state(struct mdp5_smp *smp,
230 enum mdp5_client_id cid, mdp5_smp_state_t *assigned) 234 u32 cid, mdp5_smp_state_t *assigned)
231{ 235{
232 struct mdp5_kms *mdp5_kms = get_kms(smp); 236 struct mdp5_kms *mdp5_kms = get_kms(smp);
233 int cnt = smp->blk_cnt; 237 int cnt = smp->blk_cnt;
@@ -267,7 +271,7 @@ void mdp5_smp_configure(struct mdp5_smp *smp, enum mdp5_pipe pipe)
267 int i; 271 int i;
268 272
269 for (i = 0; i < pipe2nclients(pipe); i++) { 273 for (i = 0; i < pipe2nclients(pipe); i++) {
270 enum mdp5_client_id cid = pipe2client(pipe, i); 274 u32 cid = pipe2client(pipe, i);
271 struct mdp5_client_smp_state *ps = &smp->client_state[cid]; 275 struct mdp5_client_smp_state *ps = &smp->client_state[cid];
272 276
273 bitmap_or(assigned, ps->inuse, ps->pending, cnt); 277 bitmap_or(assigned, ps->inuse, ps->pending, cnt);
@@ -283,7 +287,7 @@ void mdp5_smp_commit(struct mdp5_smp *smp, enum mdp5_pipe pipe)
283 int i; 287 int i;
284 288
285 for (i = 0; i < pipe2nclients(pipe); i++) { 289 for (i = 0; i < pipe2nclients(pipe); i++) {
286 enum mdp5_client_id cid = pipe2client(pipe, i); 290 u32 cid = pipe2client(pipe, i);
287 struct mdp5_client_smp_state *ps = &smp->client_state[cid]; 291 struct mdp5_client_smp_state *ps = &smp->client_state[cid];
288 292
289 /* 293 /*