drm/i915: make DP work on LPT-LP machines

We need to enable a special bit, otherwise none of the DP functions
requiring the PCH will work.

Version 2: store the PCH ID inside dev_priv, as suggested by Daniel
Vetter.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

4 files changed, 26 insertions, 8 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f7aef97290bc..d5d8f2f2ed09 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -396,13 +396,6 @@ static const struct pci_device_id pciidlist[] = {		/* aka */
 MODULE_DEVICE_TABLE(pci, pciidlist);
 #endif
 
-#define INTEL_PCH_DEVICE_ID_MASK        0xff00
-#define INTEL_PCH_IBX_DEVICE_ID_TYPE    0x3b00
-#define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
-#define INTEL_PCH_PPT_DEVICE_ID_TYPE    0x1e00
-#define INTEL_PCH_LPT_DEVICE_ID_TYPE    0x8c00
-#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE 0x9c00
-
 void intel_detect_pch(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
@@ -417,8 +410,9 @@ void intel_detect_pch(struct drm_device *dev)
         pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
         if (pch) {
                 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
-                        int id;
+                        unsigned short id;
                         id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
+                        dev_priv->pch_id = id;
 
                         if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
                                 dev_priv->pch_type = PCH_IBX;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b25df10b0b5c..669afcabe3b1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -737,6 +737,7 @@ typedef struct drm_i915_private {
 
         /* PCH chipset type */
         enum intel_pch pch_type;
+        unsigned short pch_id;
 
         unsigned long quirks;
 
@@ -1205,6 +1206,13 @@ struct drm_i915_file_private {
 
 #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)
 
+#define INTEL_PCH_DEVICE_ID_MASK                0xff00
+#define INTEL_PCH_IBX_DEVICE_ID_TYPE            0x3b00
+#define INTEL_PCH_CPT_DEVICE_ID_TYPE            0x1c00
+#define INTEL_PCH_PPT_DEVICE_ID_TYPE            0x1e00
+#define INTEL_PCH_LPT_DEVICE_ID_TYPE            0x8c00
+#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE         0x9c00
+
 #define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)
 #define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)
 #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9118bd112589..2d838766418b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3851,6 +3851,7 @@
 
 #define SOUTH_DSPCLK_GATE_D     0xc2020
 #define  PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29)
+#define  PCH_LP_PARTITION_LEVEL_DISABLE  (1<<12)
 
 /* CPU: FDI_TX */
 #define _FDI_TXA_CTL             0x60100
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0edb549d1434..647dfcc26c4e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3549,6 +3549,20 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv)
         I915_WRITE(GEN7_FF_THREAD_MODE, reg);
 }
 
+static void lpt_init_clock_gating(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+
+        /*
+         * TODO: this bit should only be enabled when really needed, then
+         * disabled when not needed anymore in order to save power.
+         */
+        if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
+                I915_WRITE(SOUTH_DSPCLK_GATE_D,
+                           I915_READ(SOUTH_DSPCLK_GATE_D) |
+                           PCH_LP_PARTITION_LEVEL_DISABLE);
+}
+
 static void haswell_init_clock_gating(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
@@ -3600,6 +3614,7 @@ static void haswell_init_clock_gating(struct drm_device *dev)
                         WM_DBG_DISALLOW_SPRITE |
                         WM_DBG_DISALLOW_MAXFIFO);
 
+        lpt_init_clock_gating(dev);
 }
 
 static void ivybridge_init_clock_gating(struct drm_device *dev)