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authorChris Wilson <chris@chris-wilson.co.uk>2010-08-04 08:50:23 -0400
committerEric Anholt <eric@anholt.net>2010-08-09 14:24:28 -0400
commitea5b213ad4b161463e76b63dbb115ea20e2200f0 (patch)
treeb6d07b00b479fcc3849e0fdc4c98f498aa3645bf /drivers/gpu/drm/i915
parent94113cecaea5067a0f7e1135abbd92cf2c297d42 (diff)
drm/i915: Subclass intel_encoder.
Subclass intel_encoder to reduce the pointer dance through intel_encoder->dev_priv. 10 files changed, 896 insertions(+), 997 deletions(-) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/dvo.h7
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c11
-rw-r--r--drivers/gpu/drm/i915/intel_display.c14
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c462
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h2
-rw-r--r--drivers/gpu/drm/i915/intel_dvo.c136
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c77
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c62
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c972
-rw-r--r--drivers/gpu/drm/i915/intel_tv.c150
10 files changed, 896 insertions, 997 deletions
diff --git a/drivers/gpu/drm/i915/dvo.h b/drivers/gpu/drm/i915/dvo.h
index 0d6ff640e1c6..8c2ad014c47f 100644
--- a/drivers/gpu/drm/i915/dvo.h
+++ b/drivers/gpu/drm/i915/dvo.h
@@ -30,20 +30,17 @@
30#include "intel_drv.h" 30#include "intel_drv.h"
31 31
32struct intel_dvo_device { 32struct intel_dvo_device {
33 char *name; 33 const char *name;
34 int type; 34 int type;
35 /* DVOA/B/C output register */ 35 /* DVOA/B/C output register */
36 u32 dvo_reg; 36 u32 dvo_reg;
37 /* GPIO register used for i2c bus to control this device */ 37 /* GPIO register used for i2c bus to control this device */
38 u32 gpio; 38 u32 gpio;
39 int slave_addr; 39 int slave_addr;
40 struct i2c_adapter *i2c_bus;
41 40
42 const struct intel_dvo_dev_ops *dev_ops; 41 const struct intel_dvo_dev_ops *dev_ops;
43 void *dev_priv; 42 void *dev_priv;
44 43 struct i2c_adapter *i2c_bus;
45 struct drm_display_mode *panel_fixed_mode;
46 bool panel_wants_dither;
47}; 44};
48 45
49struct intel_dvo_dev_ops { 46struct intel_dvo_dev_ops {
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index ee0732b222a1..cfcf85496e30 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -508,17 +508,8 @@ static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
508 .best_encoder = intel_attached_encoder, 508 .best_encoder = intel_attached_encoder,
509}; 509};
510 510
511static void intel_crt_enc_destroy(struct drm_encoder *encoder)
512{
513 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
514
515 intel_i2c_destroy(intel_encoder->ddc_bus);
516 drm_encoder_cleanup(encoder);
517 kfree(intel_encoder);
518}
519
520static const struct drm_encoder_funcs intel_crt_enc_funcs = { 511static const struct drm_encoder_funcs intel_crt_enc_funcs = {
521 .destroy = intel_crt_enc_destroy, 512 .destroy = intel_encoder_destroy,
522}; 513};
523 514
524void intel_crt_init(struct drm_device *dev) 515void intel_crt_init(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c7f19ec88f98..9839494528ae 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2537,6 +2537,20 @@ void intel_encoder_commit (struct drm_encoder *encoder)
2537 encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON); 2537 encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
2538} 2538}
2539 2539
2540void intel_encoder_destroy(struct drm_encoder *encoder)
2541{
2542 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
2543
2544 if (intel_encoder->ddc_bus)
2545 intel_i2c_destroy(intel_encoder->ddc_bus);
2546
2547 if (intel_encoder->i2c_bus)
2548 intel_i2c_destroy(intel_encoder->i2c_bus);
2549
2550 drm_encoder_cleanup(encoder);
2551 kfree(intel_encoder);
2552}
2553
2540static bool intel_crtc_mode_fixup(struct drm_crtc *crtc, 2554static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,
2541 struct drm_display_mode *mode, 2555 struct drm_display_mode *mode,
2542 struct drm_display_mode *adjusted_mode) 2556 struct drm_display_mode *adjusted_mode)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 40be1fa65be1..c4c5868a8aa0 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -42,10 +42,11 @@
42 42
43#define DP_LINK_CONFIGURATION_SIZE 9 43#define DP_LINK_CONFIGURATION_SIZE 9
44 44
45#define IS_eDP(i) ((i)->type == INTEL_OUTPUT_EDP) 45#define IS_eDP(i) ((i)->base.type == INTEL_OUTPUT_EDP)
46#define IS_PCH_eDP(dp_priv) ((dp_priv)->is_pch_edp) 46#define IS_PCH_eDP(i) ((i)->is_pch_edp)
47 47
48struct intel_dp_priv { 48struct intel_dp {
49 struct intel_encoder base;
49 uint32_t output_reg; 50 uint32_t output_reg;
50 uint32_t DP; 51 uint32_t DP;
51 uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]; 52 uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE];
@@ -54,40 +55,39 @@ struct intel_dp_priv {
54 uint8_t link_bw; 55 uint8_t link_bw;
55 uint8_t lane_count; 56 uint8_t lane_count;
56 uint8_t dpcd[4]; 57 uint8_t dpcd[4];
57 struct intel_encoder *intel_encoder;
58 struct i2c_adapter adapter; 58 struct i2c_adapter adapter;
59 struct i2c_algo_dp_aux_data algo; 59 struct i2c_algo_dp_aux_data algo;
60 bool is_pch_edp; 60 bool is_pch_edp;
61}; 61};
62 62
63static void 63static struct intel_dp *enc_to_intel_dp(struct drm_encoder *encoder)
64intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP, 64{
65 uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]); 65 return container_of(enc_to_intel_encoder(encoder), struct intel_dp, base);
66}
66 67
67static void 68static void intel_dp_link_train(struct intel_dp *intel_dp);
68intel_dp_link_down(struct intel_encoder *intel_encoder, uint32_t DP); 69static void intel_dp_link_down(struct intel_dp *intel_dp);
69 70
70void 71void
71intel_edp_link_config (struct intel_encoder *intel_encoder, 72intel_edp_link_config (struct intel_encoder *intel_encoder,
72 int *lane_num, int *link_bw) 73 int *lane_num, int *link_bw)
73{ 74{
74 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; 75 struct intel_dp *intel_dp = container_of(intel_encoder, struct intel_dp, base);
75 76
76 *lane_num = dp_priv->lane_count; 77 *lane_num = intel_dp->lane_count;
77 if (dp_priv->link_bw == DP_LINK_BW_1_62) 78 if (intel_dp->link_bw == DP_LINK_BW_1_62)
78 *link_bw = 162000; 79 *link_bw = 162000;
79 else if (dp_priv->link_bw == DP_LINK_BW_2_7) 80 else if (intel_dp->link_bw == DP_LINK_BW_2_7)
80 *link_bw = 270000; 81 *link_bw = 270000;
81} 82}
82 83
83static int 84static int
84intel_dp_max_lane_count(struct intel_encoder *intel_encoder) 85intel_dp_max_lane_count(struct intel_dp *intel_dp)
85{ 86{
86 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
87 int max_lane_count = 4; 87 int max_lane_count = 4;
88 88
89 if (dp_priv->dpcd[0] >= 0x11) { 89 if (intel_dp->dpcd[0] >= 0x11) {
90 max_lane_count = dp_priv->dpcd[2] & 0x1f; 90 max_lane_count = intel_dp->dpcd[2] & 0x1f;
91 switch (max_lane_count) { 91 switch (max_lane_count) {
92 case 1: case 2: case 4: 92 case 1: case 2: case 4:
93 break; 93 break;
@@ -99,10 +99,9 @@ intel_dp_max_lane_count(struct intel_encoder *intel_encoder)
99} 99}
100 100
101static int 101static int
102intel_dp_max_link_bw(struct intel_encoder *intel_encoder) 102intel_dp_max_link_bw(struct intel_dp *intel_dp)
103{ 103{
104 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; 104 int max_link_bw = intel_dp->dpcd[1];
105 int max_link_bw = dp_priv->dpcd[1];
106 105
107 switch (max_link_bw) { 106 switch (max_link_bw) {
108 case DP_LINK_BW_1_62: 107 case DP_LINK_BW_1_62:
@@ -126,13 +125,11 @@ intel_dp_link_clock(uint8_t link_bw)
126 125
127/* I think this is a fiction */ 126/* I think this is a fiction */
128static int 127static int
129intel_dp_link_required(struct drm_device *dev, 128intel_dp_link_required(struct drm_device *dev, struct intel_dp *intel_dp, int pixel_clock)
130 struct intel_encoder *intel_encoder, int pixel_clock)
131{ 129{
132 struct drm_i915_private *dev_priv = dev->dev_private; 130 struct drm_i915_private *dev_priv = dev->dev_private;
133 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
134 131
135 if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) 132 if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp))
136 return (pixel_clock * dev_priv->edp_bpp) / 8; 133 return (pixel_clock * dev_priv->edp_bpp) / 8;
137 else 134 else
138 return pixel_clock * 3; 135 return pixel_clock * 3;
@@ -149,14 +146,13 @@ intel_dp_mode_valid(struct drm_connector *connector,
149 struct drm_display_mode *mode) 146 struct drm_display_mode *mode)
150{ 147{
151 struct drm_encoder *encoder = intel_attached_encoder(connector); 148 struct drm_encoder *encoder = intel_attached_encoder(connector);
152 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 149 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
153 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
154 struct drm_device *dev = connector->dev; 150 struct drm_device *dev = connector->dev;
155 struct drm_i915_private *dev_priv = dev->dev_private; 151 struct drm_i915_private *dev_priv = dev->dev_private;
156 int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_encoder)); 152 int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp));
157 int max_lanes = intel_dp_max_lane_count(intel_encoder); 153 int max_lanes = intel_dp_max_lane_count(intel_dp);
158 154
159 if ((IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) && 155 if ((IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) &&
160 dev_priv->panel_fixed_mode) { 156 dev_priv->panel_fixed_mode) {
161 if (mode->hdisplay > dev_priv->panel_fixed_mode->hdisplay) 157 if (mode->hdisplay > dev_priv->panel_fixed_mode->hdisplay)
162 return MODE_PANEL; 158 return MODE_PANEL;
@@ -167,8 +163,8 @@ intel_dp_mode_valid(struct drm_connector *connector,
167 163
168 /* only refuse the mode on non eDP since we have seen some wierd eDP panels 164 /* only refuse the mode on non eDP since we have seen some wierd eDP panels
169 which are outside spec tolerances but somehow work by magic */ 165 which are outside spec tolerances but somehow work by magic */
170 if (!IS_eDP(intel_encoder) && 166 if (!IS_eDP(intel_dp) &&
171 (intel_dp_link_required(connector->dev, intel_encoder, mode->clock) 167 (intel_dp_link_required(connector->dev, intel_dp, mode->clock)
172 > intel_dp_max_data_rate(max_link_clock, max_lanes))) 168 > intel_dp_max_data_rate(max_link_clock, max_lanes)))
173 return MODE_CLOCK_HIGH; 169 return MODE_CLOCK_HIGH;
174 170
@@ -232,13 +228,12 @@ intel_hrawclk(struct drm_device *dev)
232} 228}
233 229
234static int 230static int
235intel_dp_aux_ch(struct intel_encoder *intel_encoder, 231intel_dp_aux_ch(struct intel_dp *intel_dp,
236 uint8_t *send, int send_bytes, 232 uint8_t *send, int send_bytes,
237 uint8_t *recv, int recv_size) 233 uint8_t *recv, int recv_size)
238{ 234{
239 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; 235 uint32_t output_reg = intel_dp->output_reg;
240 uint32_t output_reg = dp_priv->output_reg; 236 struct drm_device *dev = intel_dp->base.enc.dev;
241 struct drm_device *dev = intel_encoder->enc.dev;
242 struct drm_i915_private *dev_priv = dev->dev_private; 237 struct drm_i915_private *dev_priv = dev->dev_private;
243 uint32_t ch_ctl = output_reg + 0x10; 238 uint32_t ch_ctl = output_reg + 0x10;
244 uint32_t ch_data = ch_ctl + 4; 239 uint32_t ch_data = ch_ctl + 4;
@@ -253,7 +248,7 @@ intel_dp_aux_ch(struct intel_encoder *intel_encoder,
253 * and would like to run at 2MHz. So, take the 248 * and would like to run at 2MHz. So, take the
254 * hrawclk value and divide by 2 and use that 249 * hrawclk value and divide by 2 and use that
255 */ 250 */
256 if (IS_eDP(intel_encoder)) { 251 if (IS_eDP(intel_dp)) {
257 if (IS_GEN6(dev)) 252 if (IS_GEN6(dev))
258 aux_clock_divider = 200; /* SNB eDP input clock at 400Mhz */ 253 aux_clock_divider = 200; /* SNB eDP input clock at 400Mhz */
259 else 254 else
@@ -344,7 +339,7 @@ intel_dp_aux_ch(struct intel_encoder *intel_encoder,
344 339
345/* Write data to the aux channel in native mode */ 340/* Write data to the aux channel in native mode */
346static int 341static int
347intel_dp_aux_native_write(struct intel_encoder *intel_encoder, 342intel_dp_aux_native_write(struct intel_dp *intel_dp,
348 uint16_t address, uint8_t *send, int send_bytes) 343 uint16_t address, uint8_t *send, int send_bytes)
349{ 344{
350 int ret; 345 int ret;
@@ -361,7 +356,7 @@ intel_dp_aux_native_write(struct intel_encoder *intel_encoder,
361 memcpy(&msg[4], send, send_bytes); 356 memcpy(&msg[4], send, send_bytes);
362 msg_bytes = send_bytes + 4; 357 msg_bytes = send_bytes + 4;
363 for (;;) { 358 for (;;) {
364 ret = intel_dp_aux_ch(intel_encoder, msg, msg_bytes, &ack, 1); 359 ret = intel_dp_aux_ch(intel_dp, msg, msg_bytes, &ack, 1);
365 if (ret < 0) 360 if (ret < 0)
366 return ret; 361 return ret;
367 if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) 362 if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK)
@@ -376,15 +371,15 @@ intel_dp_aux_native_write(struct intel_encoder *intel_encoder,
376 371
377/* Write a single byte to the aux channel in native mode */ 372/* Write a single byte to the aux channel in native mode */
378static int 373static int
379intel_dp_aux_native_write_1(struct intel_encoder *intel_encoder, 374intel_dp_aux_native_write_1(struct intel_dp *intel_dp,
380 uint16_t address, uint8_t byte) 375 uint16_t address, uint8_t byte)
381{ 376{
382 return intel_dp_aux_native_write(intel_encoder, address, &byte, 1); 377 return intel_dp_aux_native_write(intel_dp, address, &byte, 1);
383} 378}
384 379
385/* read bytes from a native aux channel */ 380/* read bytes from a native aux channel */
386static int 381static int
387intel_dp_aux_native_read(struct intel_encoder *intel_encoder, 382intel_dp_aux_native_read(struct intel_dp *intel_dp,
388 uint16_t address, uint8_t *recv, int recv_bytes) 383 uint16_t address, uint8_t *recv, int recv_bytes)
389{ 384{
390 uint8_t msg[4]; 385 uint8_t msg[4];
@@ -403,7 +398,7 @@ intel_dp_aux_native_read(struct intel_encoder *intel_encoder,
403 reply_bytes = recv_bytes + 1; 398 reply_bytes = recv_bytes + 1;
404 399
405 for (;;) { 400 for (;;) {
406 ret = intel_dp_aux_ch(intel_encoder, msg, msg_bytes, 401 ret = intel_dp_aux_ch(intel_dp, msg, msg_bytes,
407 reply, reply_bytes); 402 reply, reply_bytes);
408 if (ret == 0) 403 if (ret == 0)
409 return -EPROTO; 404 return -EPROTO;
@@ -426,10 +421,9 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
426 uint8_t write_byte, uint8_t *read_byte) 421 uint8_t write_byte, uint8_t *read_byte)
427{ 422{
428 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; 423 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
429 struct intel_dp_priv *dp_priv = container_of(adapter, 424 struct intel_dp *intel_dp = container_of(adapter,
430 struct intel_dp_priv, 425 struct intel_dp,
431 adapter); 426 adapter);
432 struct intel_encoder *intel_encoder = dp_priv->intel_encoder;
433 uint16_t address = algo_data->address; 427 uint16_t address = algo_data->address;
434 uint8_t msg[5]; 428 uint8_t msg[5];
435 uint8_t reply[2]; 429 uint8_t reply[2];
@@ -468,7 +462,7 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
468 } 462 }
469 463
470 for (;;) { 464 for (;;) {
471 ret = intel_dp_aux_ch(intel_encoder, 465 ret = intel_dp_aux_ch(intel_dp,
472 msg, msg_bytes, 466 msg, msg_bytes,
473 reply, reply_bytes); 467 reply, reply_bytes);
474 if (ret < 0) { 468 if (ret < 0) {
@@ -496,41 +490,38 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
496} 490}
497 491
498static int 492static int
499intel_dp_i2c_init(struct intel_encoder *intel_encoder, 493intel_dp_i2c_init(struct intel_dp *intel_dp,
500 struct intel_connector *intel_connector, const char *name) 494 struct intel_connector *intel_connector, const char *name)
501{ 495{
502 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
503
504 DRM_DEBUG_KMS("i2c_init %s\n", name); 496 DRM_DEBUG_KMS("i2c_init %s\n", name);
505 dp_priv->algo.running = false; 497 intel_dp->algo.running = false;
506 dp_priv->algo.address = 0; 498 intel_dp->algo.address = 0;
507 dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch; 499 intel_dp->algo.aux_ch = intel_dp_i2c_aux_ch;
508 500
509 memset(&dp_priv->adapter, '\0', sizeof (dp_priv->adapter)); 501 memset(&intel_dp->adapter, '\0', sizeof (intel_dp->adapter));
510 dp_priv->adapter.owner = THIS_MODULE; 502 intel_dp->adapter.owner = THIS_MODULE;
511 dp_priv->adapter.class = I2C_CLASS_DDC; 503 intel_dp->adapter.class = I2C_CLASS_DDC;
512 strncpy (dp_priv->adapter.name, name, sizeof(dp_priv->adapter.name) - 1); 504 strncpy (intel_dp->adapter.name, name, sizeof(intel_dp->adapter.name) - 1);
513 dp_priv->adapter.name[sizeof(dp_priv->adapter.name) - 1] = '\0'; 505 intel_dp->adapter.name[sizeof(intel_dp->adapter.name) - 1] = '\0';
514 dp_priv->adapter.algo_data = &dp_priv->algo; 506 intel_dp->adapter.algo_data = &intel_dp->algo;
515 dp_priv->adapter.dev.parent = &intel_connector->base.kdev; 507 intel_dp->adapter.dev.parent = &intel_connector->base.kdev;
516 508
517 return i2c_dp_aux_add_bus(&dp_priv->adapter); 509 return i2c_dp_aux_add_bus(&intel_dp->adapter);
518} 510}
519 511
520static bool 512static bool
521intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, 513intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
522 struct drm_display_mode *adjusted_mode) 514 struct drm_display_mode *adjusted_mode)
523{ 515{
524 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
525 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
526 struct drm_device *dev = encoder->dev; 516 struct drm_device *dev = encoder->dev;
527 struct drm_i915_private *dev_priv = dev->dev_private; 517 struct drm_i915_private *dev_priv = dev->dev_private;
518 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
528 int lane_count, clock; 519 int lane_count, clock;
529 int max_lane_count = intel_dp_max_lane_count(intel_encoder); 520 int max_lane_count = intel_dp_max_lane_count(intel_dp);
530 int max_clock = intel_dp_max_link_bw(intel_encoder) == DP_LINK_BW_2_7 ? 1 : 0; 521 int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0;
531 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; 522 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
532 523
533 if ((IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) && 524 if ((IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) &&
534 dev_priv->panel_fixed_mode) { 525 dev_priv->panel_fixed_mode) {
535 struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode; 526 struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
536 527
@@ -558,28 +549,28 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
558 for (clock = 0; clock <= max_clock; clock++) { 549 for (clock = 0; clock <= max_clock; clock++) {
559 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); 550 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
560 551
561 if (intel_dp_link_required(encoder->dev, intel_encoder, mode->clock) 552 if (intel_dp_link_required(encoder->dev, intel_dp, mode->clock)
562 <= link_avail) { 553 <= link_avail) {
563 dp_priv->link_bw = bws[clock]; 554 intel_dp->link_bw = bws[clock];
564 dp_priv->lane_count = lane_count; 555 intel_dp->lane_count = lane_count;
565 adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw); 556 adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw);
566 DRM_DEBUG_KMS("Display port link bw %02x lane " 557 DRM_DEBUG_KMS("Display port link bw %02x lane "
567 "count %d clock %d\n", 558 "count %d clock %d\n",
568 dp_priv->link_bw, dp_priv->lane_count, 559 intel_dp->link_bw, intel_dp->lane_count,
569 adjusted_mode->clock); 560 adjusted_mode->clock);
570 return true; 561 return true;
571 } 562 }
572 } 563 }
573 } 564 }
574 565
575 if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) { 566 if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) {
576 /* okay we failed just pick the highest */ 567 /* okay we failed just pick the highest */
577 dp_priv->lane_count = max_lane_count; 568 intel_dp->lane_count = max_lane_count;
578 dp_priv->link_bw = bws[max_clock]; 569 intel_dp->link_bw = bws[max_clock];
579 adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw); 570 adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw);
580 DRM_DEBUG_KMS("Force picking display port link bw %02x lane " 571 DRM_DEBUG_KMS("Force picking display port link bw %02x lane "
581 "count %d clock %d\n", 572 "count %d clock %d\n",
582 dp_priv->link_bw, dp_priv->lane_count, 573 intel_dp->link_bw, intel_dp->lane_count,
583 adjusted_mode->clock); 574 adjusted_mode->clock);
584 return true; 575 return true;
585 } 576 }
@@ -626,17 +617,14 @@ bool intel_pch_has_edp(struct drm_crtc *crtc)
626 struct drm_encoder *encoder; 617 struct drm_encoder *encoder;
627 618
628 list_for_each_entry(encoder, &mode_config->encoder_list, head) { 619 list_for_each_entry(encoder, &mode_config->encoder_list, head) {
629 struct intel_encoder *intel_encoder; 620 struct intel_dp *intel_dp;
630 struct intel_dp_priv *dp_priv;
631 621
632 if (!encoder || encoder->crtc != crtc) 622 if (encoder->crtc != crtc)
633 continue; 623 continue;
634 624
635 intel_encoder = enc_to_intel_encoder(encoder); 625 intel_dp = enc_to_intel_dp(encoder);
636 dp_priv = intel_encoder->dev_priv; 626 if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT)
637 627 return intel_dp->is_pch_edp;
638 if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT)
639 return dp_priv->is_pch_edp;
640 } 628 }
641 return false; 629 return false;
642} 630}
@@ -657,18 +645,15 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
657 * Find the lane count in the intel_encoder private 645 * Find the lane count in the intel_encoder private
658 */ 646 */
659 list_for_each_entry(encoder, &mode_config->encoder_list, head) { 647 list_for_each_entry(encoder, &mode_config->encoder_list, head) {
660 struct intel_encoder *intel_encoder; 648 struct intel_dp *intel_dp;
661 struct intel_dp_priv *dp_priv;
662 649
663 if (encoder->crtc != crtc) 650 if (encoder->crtc != crtc)
664 continue; 651 continue;
665 652
666 intel_encoder = enc_to_intel_encoder(encoder); 653 intel_dp = enc_to_intel_dp(encoder);
667 dp_priv = intel_encoder->dev_priv; 654 if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT) {
668 655 lane_count = intel_dp->lane_count;
669 if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) { 656 if (IS_PCH_eDP(intel_dp))
670 lane_count = dp_priv->lane_count;
671 if (IS_PCH_eDP(dp_priv))
672 bpp = dev_priv->edp_bpp; 657 bpp = dev_priv->edp_bpp;
673 break; 658 break;
674 } 659 }
@@ -724,61 +709,60 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
724 struct drm_display_mode *adjusted_mode) 709 struct drm_display_mode *adjusted_mode)
725{ 710{
726 struct drm_device *dev = encoder->dev; 711 struct drm_device *dev = encoder->dev;
727 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 712 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
728 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; 713 struct drm_crtc *crtc = intel_dp->base.enc.crtc;
729 struct drm_crtc *crtc = intel_encoder->enc.crtc;
730 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 714 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
731 715
732 dp_priv->DP = (DP_VOLTAGE_0_4 | 716 intel_dp->DP = (DP_VOLTAGE_0_4 |
733 DP_PRE_EMPHASIS_0); 717 DP_PRE_EMPHASIS_0);
734 718
735 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 719 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
736 dp_priv->DP |= DP_SYNC_HS_HIGH; 720 intel_dp->DP |= DP_SYNC_HS_HIGH;
737 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 721 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
738 dp_priv->DP |= DP_SYNC_VS_HIGH; 722 intel_dp->DP |= DP_SYNC_VS_HIGH;
739 723
740 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_encoder)) 724 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_dp))
741 dp_priv->DP |= DP_LINK_TRAIN_OFF_CPT; 725 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;
742 else 726 else
743 dp_priv->DP |= DP_LINK_TRAIN_OFF; 727 intel_dp->DP |= DP_LINK_TRAIN_OFF;
744 728
745 switch (dp_priv->lane_count) { 729 switch (intel_dp->lane_count) {
746 case 1: 730 case 1:
747 dp_priv->DP |= DP_PORT_WIDTH_1; 731 intel_dp->DP |= DP_PORT_WIDTH_1;
748 break; 732 break;
749 case 2: 733 case 2:
750 dp_priv->DP |= DP_PORT_WIDTH_2; 734 intel_dp->DP |= DP_PORT_WIDTH_2;
751 break; 735 break;
752 case 4: 736 case 4:
753 dp_priv->DP |= DP_PORT_WIDTH_4; 737 intel_dp->DP |= DP_PORT_WIDTH_4;
754 break; 738 break;
755 } 739 }
756 if (dp_priv->has_audio) 740 if (intel_dp->has_audio)
757 dp_priv->DP |= DP_AUDIO_OUTPUT_ENABLE; 741 intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
758 742
759 memset(dp_priv->link_configuration, 0, DP_LINK_CONFIGURATION_SIZE); 743 memset(intel_dp->link_configuration, 0, DP_LINK_CONFIGURATION_SIZE);
760 dp_priv->link_configuration[0] = dp_priv->link_bw; 744 intel_dp->link_configuration[0] = intel_dp->link_bw;
761 dp_priv->link_configuration[1] = dp_priv->lane_count; 745 intel_dp->link_configuration[1] = intel_dp->lane_count;
762 746
763 /* 747 /*
764 * Check for DPCD version > 1.1 and enhanced framing support 748 * Check for DPCD version > 1.1 and enhanced framing support
765 */ 749 */
766 if (dp_priv->dpcd[0] >= 0x11 && (dp_priv->dpcd[2] & DP_ENHANCED_FRAME_CAP)) { 750 if (intel_dp->dpcd[0] >= 0x11 && (intel_dp->dpcd[2] & DP_ENHANCED_FRAME_CAP)) {
767 dp_priv->link_configuration[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; 751 intel_dp->link_configuration[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
768 dp_priv->DP |= DP_ENHANCED_FRAMING; 752 intel_dp->DP |= DP_ENHANCED_FRAMING;
769 } 753 }
770 754
771 /* CPT DP's pipe select is decided in TRANS_DP_CTL */ 755 /* CPT DP's pipe select is decided in TRANS_DP_CTL */
772 if (intel_crtc->pipe == 1 && !HAS_PCH_CPT(dev)) 756 if (intel_crtc->pipe == 1 && !HAS_PCH_CPT(dev))
773 dp_priv->DP |= DP_PIPEB_SELECT; 757 intel_dp->DP |= DP_PIPEB_SELECT;
774 758
775 if (IS_eDP(intel_encoder)) { 759 if (IS_eDP(intel_dp)) {
776 /* don't miss out required setting for eDP */ 760 /* don't miss out required setting for eDP */
777 dp_priv->DP |= DP_PLL_ENABLE; 761 intel_dp->DP |= DP_PLL_ENABLE;
778 if (adjusted_mode->clock < 200000) 762 if (adjusted_mode->clock < 200000)
779 dp_priv->DP |= DP_PLL_FREQ_160MHZ; 763 intel_dp->DP |= DP_PLL_FREQ_160MHZ;
780 else 764 else
781 dp_priv->DP |= DP_PLL_FREQ_270MHZ; 765 intel_dp->DP |= DP_PLL_FREQ_270MHZ;
782 } 766 }
783} 767}
784 768
@@ -852,30 +836,29 @@ static void ironlake_edp_backlight_off (struct drm_device *dev)
852static void 836static void
853intel_dp_dpms(struct drm_encoder *encoder, int mode) 837intel_dp_dpms(struct drm_encoder *encoder, int mode)
854{ 838{
855 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 839 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
856 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
857 struct drm_device *dev = encoder->dev; 840 struct drm_device *dev = encoder->dev;
858 struct drm_i915_private *dev_priv = dev->dev_private; 841 struct drm_i915_private *dev_priv = dev->dev_private;
859 uint32_t dp_reg = I915_READ(dp_priv->output_reg); 842 uint32_t dp_reg = I915_READ(intel_dp->output_reg);
860 843
861 if (mode != DRM_MODE_DPMS_ON) { 844 if (mode != DRM_MODE_DPMS_ON) {
862 if (dp_reg & DP_PORT_EN) { 845 if (dp_reg & DP_PORT_EN) {
863 intel_dp_link_down(intel_encoder, dp_priv->DP); 846 intel_dp_link_down(intel_dp);
864 if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) { 847 if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) {
865 ironlake_edp_backlight_off(dev); 848 ironlake_edp_backlight_off(dev);
866 ironlake_edp_panel_off(dev); 849 ironlake_edp_panel_off(dev);
867 } 850 }
868 } 851 }
869 } else { 852 } else {
870 if (!(dp_reg & DP_PORT_EN)) { 853 if (!(dp_reg & DP_PORT_EN)) {
871 intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration); 854 intel_dp_link_train(intel_dp);
872 if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) { 855 if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) {
873 ironlake_edp_panel_on(dev); 856 ironlake_edp_panel_on(dev);
874 ironlake_edp_backlight_on(dev); 857 ironlake_edp_backlight_on(dev);
875 } 858 }
876 } 859 }
877 } 860 }
878 dp_priv->dpms_mode = mode; 861 intel_dp->dpms_mode = mode;
879} 862}
880 863
881/* 864/*
@@ -883,12 +866,12 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
883 * link status information 866 * link status information
884 */ 867 */
885static bool 868static bool
886intel_dp_get_link_status(struct intel_encoder *intel_encoder, 869intel_dp_get_link_status(struct intel_dp *intel_dp,
887 uint8_t link_status[DP_LINK_STATUS_SIZE]) 870 uint8_t link_status[DP_LINK_STATUS_SIZE])
888{ 871{
889 int ret; 872 int ret;
890 873
891 ret = intel_dp_aux_native_read(intel_encoder, 874 ret = intel_dp_aux_native_read(intel_dp,
892 DP_LANE0_1_STATUS, 875 DP_LANE0_1_STATUS,
893 link_status, DP_LINK_STATUS_SIZE); 876 link_status, DP_LINK_STATUS_SIZE);
894 if (ret != DP_LINK_STATUS_SIZE) 877 if (ret != DP_LINK_STATUS_SIZE)
@@ -965,7 +948,7 @@ intel_dp_pre_emphasis_max(uint8_t voltage_swing)
965} 948}
966 949
967static void 950static void
968intel_get_adjust_train(struct intel_encoder *intel_encoder, 951intel_get_adjust_train(struct intel_dp *intel_dp,
969 uint8_t link_status[DP_LINK_STATUS_SIZE], 952 uint8_t link_status[DP_LINK_STATUS_SIZE],
970 int lane_count, 953 int lane_count,
971 uint8_t train_set[4]) 954 uint8_t train_set[4])
@@ -1101,27 +1084,26 @@ intel_channel_eq_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)
1101} 1084}
1102 1085
1103static bool 1086static bool
1104intel_dp_set_link_train(struct intel_encoder *intel_encoder, 1087intel_dp_set_link_train(struct intel_dp *intel_dp,
1105 uint32_t dp_reg_value, 1088 uint32_t dp_reg_value,
1106 uint8_t dp_train_pat, 1089 uint8_t dp_train_pat,
1107 uint8_t train_set[4], 1090 uint8_t train_set[4],
1108 bool first) 1091 bool first)
1109{ 1092{
1110 struct drm_device *dev = intel_encoder->enc.dev; 1093 struct drm_device *dev = intel_dp->base.enc.dev;
1111 struct drm_i915_private *dev_priv = dev->dev_private; 1094 struct drm_i915_private *dev_priv = dev->dev_private;
1112 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
1113 int ret; 1095 int ret;
1114 1096
1115 I915_WRITE(dp_priv->output_reg, dp_reg_value); 1097 I915_WRITE(intel_dp->output_reg, dp_reg_value);
1116 POSTING_READ(dp_priv->output_reg); 1098 POSTING_READ(intel_dp->output_reg);
1117 if (first) 1099 if (first)
1118 intel_wait_for_vblank(dev); 1100 intel_wait_for_vblank(dev);
1119 1101
1120 intel_dp_aux_native_write_1(intel_encoder, 1102 intel_dp_aux_native_write_1(intel_dp,
1121 DP_TRAINING_PATTERN_SET, 1103 DP_TRAINING_PATTERN_SET,
1122 dp_train_pat); 1104 dp_train_pat);
1123 1105
1124 ret = intel_dp_aux_native_write(intel_encoder, 1106 ret = intel_dp_aux_native_write(intel_dp,
1125 DP_TRAINING_LANE0_SET, train_set, 4); 1107 DP_TRAINING_LANE0_SET, train_set, 4);
1126 if (ret != 4) 1108 if (ret != 4)
1127 return false; 1109 return false;
@@ -1130,12 +1112,10 @@ intel_dp_set_link_train(struct intel_encoder *intel_encoder,
1130} 1112}
1131 1113
1132static void 1114static void
1133intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP, 1115intel_dp_link_train(struct intel_dp *intel_dp)
1134 uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE])
1135{ 1116{
1136 struct drm_device *dev = intel_encoder->enc.dev; 1117 struct drm_device *dev = intel_dp->base.enc.dev;
1137 struct drm_i915_private *dev_priv = dev->dev_private; 1118 struct drm_i915_private *dev_priv = dev->dev_private;
1138 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
1139 uint8_t train_set[4]; 1119 uint8_t train_set[4];
1140 uint8_t link_status[DP_LINK_STATUS_SIZE]; 1120 uint8_t link_status[DP_LINK_STATUS_SIZE];
1141 int i; 1121 int i;
@@ -1145,13 +1125,15 @@ intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP,
1145 bool first = true; 1125 bool first = true;
1146 int tries; 1126 int tries;
1147 u32 reg; 1127 u32 reg;
1128 uint32_t DP = intel_dp->DP;
1148 1129
1149 /* Write the link configuration data */ 1130 /* Write the link configuration data */
1150 intel_dp_aux_native_write(intel_encoder, DP_LINK_BW_SET, 1131 intel_dp_aux_native_write(intel_dp, DP_LINK_BW_SET,
1151 link_configuration, DP_LINK_CONFIGURATION_SIZE); 1132 intel_dp->link_configuration,
1133 DP_LINK_CONFIGURATION_SIZE);
1152 1134
1153 DP |= DP_PORT_EN; 1135 DP |= DP_PORT_EN;
1154 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_encoder)) 1136 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_dp))
1155 DP &= ~DP_LINK_TRAIN_MASK_CPT; 1137 DP &= ~DP_LINK_TRAIN_MASK_CPT;
1156 else 1138 else
1157 DP &= ~DP_LINK_TRAIN_MASK; 1139 DP &= ~DP_LINK_TRAIN_MASK;
@@ -1162,39 +1144,39 @@ intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP,
1162 for (;;) { 1144 for (;;) {
1163 /* Use train_set[0] to set the voltage and pre emphasis values */ 1145 /* Use train_set[0] to set the voltage and pre emphasis values */
1164 uint32_t signal_levels; 1146 uint32_t signal_levels;
1165 if (IS_GEN6(dev) && IS_eDP(intel_encoder)) { 1147 if (IS_GEN6(dev) && IS_eDP(intel_dp)) {
1166 signal_levels = intel_gen6_edp_signal_levels(train_set[0]); 1148 signal_levels = intel_gen6_edp_signal_levels(train_set[0]);
1167 DP = (DP & ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB) | signal_levels; 1149 DP = (DP & ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB) | signal_levels;
1168 } else { 1150 } else {
1169 signal_levels = intel_dp_signal_levels(train_set[0], dp_priv->lane_count); 1151 signal_levels = intel_dp_signal_levels(train_set[0], intel_dp->lane_count);
1170 DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels; 1152 DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
1171 } 1153 }
1172 1154
1173 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_encoder)) 1155 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_dp))
1174 reg = DP | DP_LINK_TRAIN_PAT_1_CPT; 1156 reg = DP | DP_LINK_TRAIN_PAT_1_CPT;
1175 else 1157 else
1176 reg = DP | DP_LINK_TRAIN_PAT_1; 1158 reg = DP | DP_LINK_TRAIN_PAT_1;
1177 1159
1178 if (!intel_dp_set_link_train(intel_encoder, reg, 1160 if (!intel_dp_set_link_train(intel_dp, reg,
1179 DP_TRAINING_PATTERN_1, train_set, first)) 1161 DP_TRAINING_PATTERN_1, train_set, first))
1180 break; 1162 break;
1181 first = false; 1163 first = false;
1182 /* Set training pattern 1 */ 1164 /* Set training pattern 1 */
1183 1165
1184 udelay(100); 1166 udelay(100);
1185 if (!intel_dp_get_link_status(intel_encoder, link_status)) 1167 if (!intel_dp_get_link_status(intel_dp, link_status))
1186 break; 1168 break;
1187 1169
1188 if (intel_clock_recovery_ok(link_status, dp_priv->lane_count)) { 1170 if (intel_clock_recovery_ok(link_status, intel_dp->lane_count)) {
1189 clock_recovery = true; 1171 clock_recovery = true;
1190 break; 1172 break;
1191 } 1173 }
1192 1174
1193 /* Check to see if we've tried the max voltage */ 1175 /* Check to see if we've tried the max voltage */
1194 for (i = 0; i < dp_priv->lane_count; i++) 1176 for (i = 0; i < intel_dp->lane_count; i++)
1195 if ((train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) 1177 if ((train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)
1196 break; 1178 break;
1197 if (i == dp_priv->lane_count) 1179 if (i == intel_dp->lane_count)
1198 break; 1180 break;
1199 1181
1200 /* Check to see if we've tried the same voltage 5 times */ 1182 /* Check to see if we've tried the same voltage 5 times */
@@ -1207,7 +1189,7 @@ intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP,
1207 voltage = train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; 1189 voltage = train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
1208 1190
1209 /* Compute new train_set as requested by target */ 1191 /* Compute new train_set as requested by target */
1210 intel_get_adjust_train(intel_encoder, link_status, dp_priv->lane_count, train_set); 1192 intel_get_adjust_train(intel_dp, link_status, intel_dp->lane_count, train_set);
1211 } 1193 }
1212 1194
1213 /* channel equalization */ 1195 /* channel equalization */
@@ -1217,30 +1199,30 @@ intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP,
1217 /* Use train_set[0] to set the voltage and pre emphasis values */ 1199 /* Use train_set[0] to set the voltage and pre emphasis values */
1218 uint32_t signal_levels; 1200 uint32_t signal_levels;
1219 1201
1220 if (IS_GEN6(dev) && IS_eDP(intel_encoder)) { 1202 if (IS_GEN6(dev) && IS_eDP(intel_dp)) {
1221 signal_levels = intel_gen6_edp_signal_levels(train_set[0]); 1203 signal_levels = intel_gen6_edp_signal_levels(train_set[0]);
1222 DP = (DP & ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB) | signal_levels; 1204 DP = (DP & ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB) | signal_levels;
1223 } else { 1205 } else {
1224 signal_levels = intel_dp_signal_levels(train_set[0], dp_priv->lane_count); 1206 signal_levels = intel_dp_signal_levels(train_set[0], intel_dp->lane_count);
1225 DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels; 1207 DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
1226 } 1208 }
1227 1209
1228 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_encoder)) 1210 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_dp))
1229 reg = DP | DP_LINK_TRAIN_PAT_2_CPT; 1211 reg = DP | DP_LINK_TRAIN_PAT_2_CPT;
1230 else 1212 else
1231 reg = DP | DP_LINK_TRAIN_PAT_2; 1213 reg = DP | DP_LINK_TRAIN_PAT_2;
1232 1214
1233 /* channel eq pattern */ 1215 /* channel eq pattern */
1234 if (!intel_dp_set_link_train(intel_encoder, reg, 1216 if (!intel_dp_set_link_train(intel_dp, reg,
1235 DP_TRAINING_PATTERN_2, train_set, 1217 DP_TRAINING_PATTERN_2, train_set,
1236 false)) 1218 false))
1237 break; 1219 break;
1238 1220
1239 udelay(400); 1221 udelay(400);
1240 if (!intel_dp_get_link_status(intel_encoder, link_status)) 1222 if (!intel_dp_get_link_status(intel_dp, link_status))
1241 break; 1223 break;
1242 1224
1243 if (intel_channel_eq_ok(link_status, dp_priv->lane_count)) { 1225 if (intel_channel_eq_ok(link_status, intel_dp->lane_count)) {
1244 channel_eq = true; 1226 channel_eq = true;
1245 break; 1227 break;
1246 } 1228 }
@@ -1250,53 +1232,53 @@ intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP,
1250 break; 1232 break;
1251 1233
1252 /* Compute new train_set as requested by target */ 1234 /* Compute new train_set as requested by target */
1253 intel_get_adjust_train(intel_encoder, link_status, dp_priv->lane_count, train_set); 1235 intel_get_adjust_train(intel_dp, link_status, intel_dp->lane_count, train_set);
1254 ++tries; 1236 ++tries;
1255 } 1237 }
1256 1238
1257 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_encoder)) 1239 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_dp))
1258 reg = DP | DP_LINK_TRAIN_OFF_CPT; 1240 reg = DP | DP_LINK_TRAIN_OFF_CPT;
1259 else 1241 else
1260 reg = DP | DP_LINK_TRAIN_OFF; 1242 reg = DP | DP_LINK_TRAIN_OFF;
1261 1243
1262 I915_WRITE(dp_priv->output_reg, reg); 1244 I915_WRITE(intel_dp->output_reg, reg);
1263 POSTING_READ(dp_priv->output_reg); 1245 POSTING_READ(intel_dp->output_reg);
1264 intel_dp_aux_native_write_1(intel_encoder, 1246 intel_dp_aux_native_write_1(intel_dp,
1265 DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_DISABLE); 1247 DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_DISABLE);
1266} 1248}
1267 1249
1268static void 1250static void
1269intel_dp_link_down(struct intel_encoder *intel_encoder, uint32_t DP) 1251intel_dp_link_down(struct intel_dp *intel_dp)
1270{ 1252{
1271 struct drm_device *dev = intel_encoder->enc.dev; 1253 struct drm_device *dev = intel_dp->base.enc.dev;
1272 struct drm_i915_private *dev_priv = dev->dev_private; 1254 struct drm_i915_private *dev_priv = dev->dev_private;
1273 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; 1255 uint32_t DP = intel_dp->DP;
1274 1256
1275 DRM_DEBUG_KMS("\n"); 1257 DRM_DEBUG_KMS("\n");
1276 1258
1277 if (IS_eDP(intel_encoder)) { 1259 if (IS_eDP(intel_dp)) {
1278 DP &= ~DP_PLL_ENABLE; 1260 DP &= ~DP_PLL_ENABLE;
1279 I915_WRITE(dp_priv->output_reg, DP); 1261 I915_WRITE(intel_dp->output_reg, DP);
1280 POSTING_READ(dp_priv->output_reg); 1262 POSTING_READ(intel_dp->output_reg);
1281 udelay(100); 1263 udelay(100);
1282 } 1264 }
1283 1265
1284 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_encoder)) { 1266 if (HAS_PCH_CPT(dev) && !IS_eDP(intel_dp)) {
1285 DP &= ~DP_LINK_TRAIN_MASK_CPT; 1267 DP &= ~DP_LINK_TRAIN_MASK_CPT;
1286 I915_WRITE(dp_priv->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE_CPT); 1268 I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE_CPT);
1287 POSTING_READ(dp_priv->output_reg); 1269 POSTING_READ(intel_dp->output_reg);
1288 } else { 1270 } else {
1289 DP &= ~DP_LINK_TRAIN_MASK; 1271 DP &= ~DP_LINK_TRAIN_MASK;
1290 I915_WRITE(dp_priv->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE); 1272 I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE);
1291 POSTING_READ(dp_priv->output_reg); 1273 POSTING_READ(intel_dp->output_reg);
1292 } 1274 }
1293 1275
1294 udelay(17000); 1276 udelay(17000);
1295 1277
1296 if (IS_eDP(intel_encoder)) 1278 if (IS_eDP(intel_dp))
1297 DP |= DP_LINK_TRAIN_OFF; 1279 DP |= DP_LINK_TRAIN_OFF;
1298 I915_WRITE(dp_priv->output_reg, DP & ~DP_PORT_EN); 1280 I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);
1299 POSTING_READ(dp_priv->output_reg); 1281 POSTING_READ(intel_dp->output_reg);
1300} 1282}
1301 1283
1302/* 1284/*
@@ -1309,41 +1291,39 @@ intel_dp_link_down(struct intel_encoder *intel_encoder, uint32_t DP)
1309 */ 1291 */
1310 1292
1311static void 1293static void
1312intel_dp_check_link_status(struct intel_encoder *intel_encoder) 1294intel_dp_check_link_status(struct intel_dp *intel_dp)
1313{ 1295{
1314 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
1315 uint8_t link_status[DP_LINK_STATUS_SIZE]; 1296 uint8_t link_status[DP_LINK_STATUS_SIZE];
1316 1297
1317 if (!intel_encoder->enc.crtc) 1298 if (!intel_dp->base.enc.crtc)
1318 return; 1299 return;
1319 1300
1320 if (!intel_dp_get_link_status(intel_encoder, link_status)) { 1301 if (!intel_dp_get_link_status(intel_dp, link_status)) {
1321 intel_dp_link_down(intel_encoder, dp_priv->DP); 1302 intel_dp_link_down(intel_dp);
1322 return; 1303 return;
1323 } 1304 }
1324 1305
1325 if (!intel_channel_eq_ok(link_status, dp_priv->lane_count)) 1306 if (!intel_channel_eq_ok(link_status, intel_dp->lane_count))
1326 intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration); 1307 intel_dp_link_train(intel_dp);
1327} 1308}
1328 1309
1329static enum drm_connector_status 1310static enum drm_connector_status
1330ironlake_dp_detect(struct drm_connector *connector) 1311ironlake_dp_detect(struct drm_connector *connector)
1331{ 1312{
1332 struct drm_encoder *encoder = intel_attached_encoder(connector); 1313 struct drm_encoder *encoder = intel_attached_encoder(connector);
1333 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1314 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1334 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
1335 enum drm_connector_status status; 1315 enum drm_connector_status status;
1336 1316
1337 status = connector_status_disconnected; 1317 status = connector_status_disconnected;
1338 if (intel_dp_aux_native_read(intel_encoder, 1318 if (intel_dp_aux_native_read(intel_dp,
1339 0x000, dp_priv->dpcd, 1319 0x000, intel_dp->dpcd,
1340 sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd)) 1320 sizeof (intel_dp->dpcd)) == sizeof (intel_dp->dpcd))
1341 { 1321 {
1342 if (dp_priv->dpcd[0] != 0) 1322 if (intel_dp->dpcd[0] != 0)
1343 status = connector_status_connected; 1323 status = connector_status_connected;
1344 } 1324 }
1345 DRM_DEBUG_KMS("DPCD: %hx%hx%hx%hx\n", dp_priv->dpcd[0], 1325 DRM_DEBUG_KMS("DPCD: %hx%hx%hx%hx\n", intel_dp->dpcd[0],
1346 dp_priv->dpcd[1], dp_priv->dpcd[2], dp_priv->dpcd[3]); 1326 intel_dp->dpcd[1], intel_dp->dpcd[2], intel_dp->dpcd[3]);
1347 return status; 1327 return status;
1348} 1328}
1349 1329
@@ -1357,19 +1337,18 @@ static enum drm_connector_status
1357intel_dp_detect(struct drm_connector *connector) 1337intel_dp_detect(struct drm_connector *connector)
1358{ 1338{
1359 struct drm_encoder *encoder = intel_attached_encoder(connector); 1339 struct drm_encoder *encoder = intel_attached_encoder(connector);
1360 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1340 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1361 struct drm_device *dev = intel_encoder->enc.dev; 1341 struct drm_device *dev = intel_dp->base.enc.dev;
1362 struct drm_i915_private *dev_priv = dev->dev_private; 1342 struct drm_i915_private *dev_priv = dev->dev_private;
1363 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
1364 uint32_t temp, bit; 1343 uint32_t temp, bit;
1365 enum drm_connector_status status; 1344 enum drm_connector_status status;
1366 1345
1367 dp_priv->has_audio = false; 1346 intel_dp->has_audio = false;
1368 1347
1369 if (HAS_PCH_SPLIT(dev)) 1348 if (HAS_PCH_SPLIT(dev))
1370 return ironlake_dp_detect(connector); 1349 return ironlake_dp_detect(connector);
1371 1350
1372 switch (dp_priv->output_reg) { 1351 switch (intel_dp->output_reg) {
1373 case DP_B: 1352 case DP_B:
1374 bit = DPB_HOTPLUG_INT_STATUS; 1353 bit = DPB_HOTPLUG_INT_STATUS;
1375 break; 1354 break;
@@ -1389,11 +1368,11 @@ intel_dp_detect(struct drm_connector *connector)
1389 return connector_status_disconnected; 1368 return connector_status_disconnected;
1390 1369
1391 status = connector_status_disconnected; 1370 status = connector_status_disconnected;
1392 if (intel_dp_aux_native_read(intel_encoder, 1371 if (intel_dp_aux_native_read(intel_dp,
1393 0x000, dp_priv->dpcd, 1372 0x000, intel_dp->dpcd,
1394 sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd)) 1373 sizeof (intel_dp->dpcd)) == sizeof (intel_dp->dpcd))
1395 { 1374 {
1396 if (dp_priv->dpcd[0] != 0) 1375 if (intel_dp->dpcd[0] != 0)
1397 status = connector_status_connected; 1376 status = connector_status_connected;
1398 } 1377 }
1399 return status; 1378 return status;
@@ -1402,18 +1381,17 @@ intel_dp_detect(struct drm_connector *connector)
1402static int intel_dp_get_modes(struct drm_connector *connector) 1381static int intel_dp_get_modes(struct drm_connector *connector)
1403{ 1382{
1404 struct drm_encoder *encoder = intel_attached_encoder(connector); 1383 struct drm_encoder *encoder = intel_attached_encoder(connector);
1405 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1384 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1406 struct drm_device *dev = intel_encoder->enc.dev; 1385 struct drm_device *dev = intel_dp->base.enc.dev;
1407 struct drm_i915_private *dev_priv = dev->dev_private; 1386 struct drm_i915_private *dev_priv = dev->dev_private;
1408 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
1409 int ret; 1387 int ret;
1410 1388
1411 /* We should parse the EDID data and find out if it has an audio sink 1389 /* We should parse the EDID data and find out if it has an audio sink
1412 */ 1390 */
1413 1391
1414 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus); 1392 ret = intel_ddc_get_modes(connector, intel_dp->base.ddc_bus);
1415 if (ret) { 1393 if (ret) {
1416 if ((IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) && 1394 if ((IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) &&
1417 !dev_priv->panel_fixed_mode) { 1395 !dev_priv->panel_fixed_mode) {
1418 struct drm_display_mode *newmode; 1396 struct drm_display_mode *newmode;
1419 list_for_each_entry(newmode, &connector->probed_modes, 1397 list_for_each_entry(newmode, &connector->probed_modes,
@@ -1430,7 +1408,7 @@ static int intel_dp_get_modes(struct drm_connector *connector)
1430 } 1408 }
1431 1409
1432 /* if eDP has no EDID, try to use fixed panel mode from VBT */ 1410 /* if eDP has no EDID, try to use fixed panel mode from VBT */
1433 if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) { 1411 if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) {
1434 if (dev_priv->panel_fixed_mode != NULL) { 1412 if (dev_priv->panel_fixed_mode != NULL) {
1435 struct drm_display_mode *mode; 1413 struct drm_display_mode *mode;
1436 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode); 1414 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
@@ -1470,27 +1448,17 @@ static const struct drm_connector_helper_funcs intel_dp_connector_helper_funcs =
1470 .best_encoder = intel_attached_encoder, 1448 .best_encoder = intel_attached_encoder,
1471}; 1449};
1472 1450
1473static void intel_dp_enc_destroy(struct drm_encoder *encoder)
1474{
1475 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
1476
1477 if (intel_encoder->i2c_bus)
1478 intel_i2c_destroy(intel_encoder->i2c_bus);
1479 drm_encoder_cleanup(encoder);
1480 kfree(intel_encoder);
1481}
1482
1483static const struct drm_encoder_funcs intel_dp_enc_funcs = { 1451static const struct drm_encoder_funcs intel_dp_enc_funcs = {
1484 .destroy = intel_dp_enc_destroy, 1452 .destroy = intel_encoder_destroy,
1485}; 1453};
1486 1454
1487void 1455void
1488intel_dp_hot_plug(struct intel_encoder *intel_encoder) 1456intel_dp_hot_plug(struct intel_encoder *intel_encoder)
1489{ 1457{
1490 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; 1458 struct intel_dp *intel_dp = container_of(intel_encoder, struct intel_dp, base);
1491 1459
1492 if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON) 1460 if (intel_dp->dpms_mode == DRM_MODE_DPMS_ON)
1493 intel_dp_check_link_status(intel_encoder); 1461 intel_dp_check_link_status(intel_dp);
1494} 1462}
1495 1463
1496/* Return which DP Port should be selected for Transcoder DP control */ 1464/* Return which DP Port should be selected for Transcoder DP control */
@@ -1500,18 +1468,18 @@ intel_trans_dp_port_sel (struct drm_crtc *crtc)
1500 struct drm_device *dev = crtc->dev; 1468 struct drm_device *dev = crtc->dev;
1501 struct drm_mode_config *mode_config = &dev->mode_config; 1469 struct drm_mode_config *mode_config = &dev->mode_config;
1502 struct drm_encoder *encoder; 1470 struct drm_encoder *encoder;
1503 struct intel_encoder *intel_encoder = NULL;
1504 1471
1505 list_for_each_entry(encoder, &mode_config->encoder_list, head) { 1472 list_for_each_entry(encoder, &mode_config->encoder_list, head) {
1473 struct intel_dp *intel_dp;
1474
1506 if (encoder->crtc != crtc) 1475 if (encoder->crtc != crtc)
1507 continue; 1476 continue;
1508 1477
1509 intel_encoder = enc_to_intel_encoder(encoder); 1478 intel_dp = enc_to_intel_dp(encoder);
1510 if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) { 1479 if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT)
1511 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; 1480 return intel_dp->output_reg;
1512 return dp_priv->output_reg;
1513 }
1514 } 1481 }
1482
1515 return -1; 1483 return -1;
1516} 1484}
1517 1485
@@ -1540,30 +1508,28 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1540{ 1508{
1541 struct drm_i915_private *dev_priv = dev->dev_private; 1509 struct drm_i915_private *dev_priv = dev->dev_private;
1542 struct drm_connector *connector; 1510 struct drm_connector *connector;
1511 struct intel_dp *intel_dp;
1543 struct intel_encoder *intel_encoder; 1512 struct intel_encoder *intel_encoder;
1544 struct intel_connector *intel_connector; 1513 struct intel_connector *intel_connector;
1545 struct intel_dp_priv *dp_priv;
1546 const char *name = NULL; 1514 const char *name = NULL;
1547 int type; 1515 int type;
1548 1516
1549 intel_encoder = kcalloc(sizeof(struct intel_encoder) + 1517 intel_dp = kzalloc(sizeof(struct intel_dp), GFP_KERNEL);
1550 sizeof(struct intel_dp_priv), 1, GFP_KERNEL); 1518 if (!intel_dp)
1551 if (!intel_encoder)
1552 return; 1519 return;
1553 1520
1554 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); 1521 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
1555 if (!intel_connector) { 1522 if (!intel_connector) {
1556 kfree(intel_encoder); 1523 kfree(intel_dp);
1557 return; 1524 return;
1558 } 1525 }
1526 intel_encoder = &intel_dp->base;
1559 1527
1560 dp_priv = (struct intel_dp_priv *)(intel_encoder + 1); 1528 if (HAS_PCH_SPLIT(dev) && output_reg == PCH_DP_D)
1561
1562 if (HAS_PCH_SPLIT(dev) && (output_reg == PCH_DP_D))
1563 if (intel_dpd_is_edp(dev)) 1529 if (intel_dpd_is_edp(dev))
1564 dp_priv->is_pch_edp = true; 1530 intel_dp->is_pch_edp = true;
1565 1531
1566 if (output_reg == DP_A || IS_PCH_eDP(dp_priv)) { 1532 if (output_reg == DP_A || IS_PCH_eDP(intel_dp)) {
1567 type = DRM_MODE_CONNECTOR_eDP; 1533 type = DRM_MODE_CONNECTOR_eDP;
1568 intel_encoder->type = INTEL_OUTPUT_EDP; 1534 intel_encoder->type = INTEL_OUTPUT_EDP;
1569 } else { 1535 } else {
@@ -1584,18 +1550,16 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1584 else if (output_reg == DP_D || output_reg == PCH_DP_D) 1550 else if (output_reg == DP_D || output_reg == PCH_DP_D)
1585 intel_encoder->clone_mask = (1 << INTEL_DP_D_CLONE_BIT); 1551 intel_encoder->clone_mask = (1 << INTEL_DP_D_CLONE_BIT);
1586 1552
1587 if (IS_eDP(intel_encoder)) 1553 if (IS_eDP(intel_dp))
1588 intel_encoder->clone_mask = (1 << INTEL_EDP_CLONE_BIT); 1554 intel_encoder->clone_mask = (1 << INTEL_EDP_CLONE_BIT);
1589 1555
1590 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 1556 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1591 connector->interlace_allowed = true; 1557 connector->interlace_allowed = true;
1592 connector->doublescan_allowed = 0; 1558 connector->doublescan_allowed = 0;
1593 1559
1594 dp_priv->intel_encoder = intel_encoder; 1560 intel_dp->output_reg = output_reg;
1595 dp_priv->output_reg = output_reg; 1561 intel_dp->has_audio = false;
1596 dp_priv->has_audio = false; 1562 intel_dp->dpms_mode = DRM_MODE_DPMS_ON;
1597 dp_priv->dpms_mode = DRM_MODE_DPMS_ON;
1598 intel_encoder->dev_priv = dp_priv;
1599 1563
1600 drm_encoder_init(dev, &intel_encoder->enc, &intel_dp_enc_funcs, 1564 drm_encoder_init(dev, &intel_encoder->enc, &intel_dp_enc_funcs,
1601 DRM_MODE_ENCODER_TMDS); 1565 DRM_MODE_ENCODER_TMDS);
@@ -1630,12 +1594,12 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1630 break; 1594 break;
1631 } 1595 }
1632 1596
1633 intel_dp_i2c_init(intel_encoder, intel_connector, name); 1597 intel_dp_i2c_init(intel_dp, intel_connector, name);
1634 1598
1635 intel_encoder->ddc_bus = &dp_priv->adapter; 1599 intel_encoder->ddc_bus = &intel_dp->adapter;
1636 intel_encoder->hot_plug = intel_dp_hot_plug; 1600 intel_encoder->hot_plug = intel_dp_hot_plug;
1637 1601
1638 if (output_reg == DP_A || IS_PCH_eDP(dp_priv)) { 1602 if (output_reg == DP_A || IS_PCH_eDP(intel_dp)) {
1639 /* initialize panel mode from VBT if available for eDP */ 1603 /* initialize panel mode from VBT if available for eDP */
1640 if (dev_priv->lfp_lvds_vbt_mode) { 1604 if (dev_priv->lfp_lvds_vbt_mode) {
1641 dev_priv->panel_fixed_mode = 1605 dev_priv->panel_fixed_mode =
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index b2190148703a..520b22cd708e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -102,7 +102,6 @@ struct intel_encoder {
102 struct i2c_adapter *ddc_bus; 102 struct i2c_adapter *ddc_bus;
103 bool load_detect_temp; 103 bool load_detect_temp;
104 bool needs_tv_clock; 104 bool needs_tv_clock;
105 void *dev_priv;
106 void (*hot_plug)(struct intel_encoder *); 105 void (*hot_plug)(struct intel_encoder *);
107 int crtc_mask; 106 int crtc_mask;
108 int clone_mask; 107 int clone_mask;
@@ -192,6 +191,7 @@ extern int intel_panel_fitter_pipe (struct drm_device *dev);
192extern void intel_crtc_load_lut(struct drm_crtc *crtc); 191extern void intel_crtc_load_lut(struct drm_crtc *crtc);
193extern void intel_encoder_prepare (struct drm_encoder *encoder); 192extern void intel_encoder_prepare (struct drm_encoder *encoder);
194extern void intel_encoder_commit (struct drm_encoder *encoder); 193extern void intel_encoder_commit (struct drm_encoder *encoder);
194extern void intel_encoder_destroy(struct drm_encoder *encoder);
195 195
196extern struct drm_encoder *intel_attached_encoder(struct drm_connector *connector); 196extern struct drm_encoder *intel_attached_encoder(struct drm_connector *connector);
197 197
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 227feca7cf8d..a399f4b2c1c5 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -38,7 +38,7 @@
38#define CH7xxx_ADDR 0x76 38#define CH7xxx_ADDR 0x76
39#define TFP410_ADDR 0x38 39#define TFP410_ADDR 0x38
40 40
41static struct intel_dvo_device intel_dvo_devices[] = { 41static const struct intel_dvo_device intel_dvo_devices[] = {
42 { 42 {
43 .type = INTEL_DVO_CHIP_TMDS, 43 .type = INTEL_DVO_CHIP_TMDS,
44 .name = "sil164", 44 .name = "sil164",
@@ -77,20 +77,33 @@ static struct intel_dvo_device intel_dvo_devices[] = {
77 } 77 }
78}; 78};
79 79
80struct intel_dvo {
81 struct intel_encoder base;
82
83 struct intel_dvo_device dev;
84
85 struct drm_display_mode *panel_fixed_mode;
86 bool panel_wants_dither;
87};
88
89static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
90{
91 return container_of(enc_to_intel_encoder(encoder), struct intel_dvo, base);
92}
93
80static void intel_dvo_dpms(struct drm_encoder *encoder, int mode) 94static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
81{ 95{
82 struct drm_i915_private *dev_priv = encoder->dev->dev_private; 96 struct drm_i915_private *dev_priv = encoder->dev->dev_private;
83 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 97 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
84 struct intel_dvo_device *dvo = intel_encoder->dev_priv; 98 u32 dvo_reg = intel_dvo->dev.dvo_reg;
85 u32 dvo_reg = dvo->dvo_reg;
86 u32 temp = I915_READ(dvo_reg); 99 u32 temp = I915_READ(dvo_reg);
87 100
88 if (mode == DRM_MODE_DPMS_ON) { 101 if (mode == DRM_MODE_DPMS_ON) {
89 I915_WRITE(dvo_reg, temp | DVO_ENABLE); 102 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
90 I915_READ(dvo_reg); 103 I915_READ(dvo_reg);
91 dvo->dev_ops->dpms(dvo, mode); 104 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
92 } else { 105 } else {
93 dvo->dev_ops->dpms(dvo, mode); 106 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
94 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); 107 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
95 I915_READ(dvo_reg); 108 I915_READ(dvo_reg);
96 } 109 }
@@ -100,38 +113,36 @@ static int intel_dvo_mode_valid(struct drm_connector *connector,
100 struct drm_display_mode *mode) 113 struct drm_display_mode *mode)
101{ 114{
102 struct drm_encoder *encoder = intel_attached_encoder(connector); 115 struct drm_encoder *encoder = intel_attached_encoder(connector);
103 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 116 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
104 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
105 117
106 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 118 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
107 return MODE_NO_DBLESCAN; 119 return MODE_NO_DBLESCAN;
108 120
109 /* XXX: Validate clock range */ 121 /* XXX: Validate clock range */
110 122
111 if (dvo->panel_fixed_mode) { 123 if (intel_dvo->panel_fixed_mode) {
112 if (mode->hdisplay > dvo->panel_fixed_mode->hdisplay) 124 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
113 return MODE_PANEL; 125 return MODE_PANEL;
114 if (mode->vdisplay > dvo->panel_fixed_mode->vdisplay) 126 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
115 return MODE_PANEL; 127 return MODE_PANEL;
116 } 128 }
117 129
118 return dvo->dev_ops->mode_valid(dvo, mode); 130 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
119} 131}
120 132
121static bool intel_dvo_mode_fixup(struct drm_encoder *encoder, 133static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
122 struct drm_display_mode *mode, 134 struct drm_display_mode *mode,
123 struct drm_display_mode *adjusted_mode) 135 struct drm_display_mode *adjusted_mode)
124{ 136{
125 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 137 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
126 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
127 138
128 /* If we have timings from the BIOS for the panel, put them in 139 /* If we have timings from the BIOS for the panel, put them in
129 * to the adjusted mode. The CRTC will be set up for this mode, 140 * to the adjusted mode. The CRTC will be set up for this mode,
130 * with the panel scaling set up to source from the H/VDisplay 141 * with the panel scaling set up to source from the H/VDisplay
131 * of the original mode. 142 * of the original mode.
132 */ 143 */
133 if (dvo->panel_fixed_mode != NULL) { 144 if (intel_dvo->panel_fixed_mode != NULL) {
134#define C(x) adjusted_mode->x = dvo->panel_fixed_mode->x 145#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
135 C(hdisplay); 146 C(hdisplay);
136 C(hsync_start); 147 C(hsync_start);
137 C(hsync_end); 148 C(hsync_end);
@@ -145,8 +156,8 @@ static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
145#undef C 156#undef C
146 } 157 }
147 158
148 if (dvo->dev_ops->mode_fixup) 159 if (intel_dvo->dev.dev_ops->mode_fixup)
149 return dvo->dev_ops->mode_fixup(dvo, mode, adjusted_mode); 160 return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
150 161
151 return true; 162 return true;
152} 163}
@@ -158,11 +169,10 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder,
158 struct drm_device *dev = encoder->dev; 169 struct drm_device *dev = encoder->dev;
159 struct drm_i915_private *dev_priv = dev->dev_private; 170 struct drm_i915_private *dev_priv = dev->dev_private;
160 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); 171 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
161 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 172 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
162 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
163 int pipe = intel_crtc->pipe; 173 int pipe = intel_crtc->pipe;
164 u32 dvo_val; 174 u32 dvo_val;
165 u32 dvo_reg = dvo->dvo_reg, dvo_srcdim_reg; 175 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
166 int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B; 176 int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
167 177
168 switch (dvo_reg) { 178 switch (dvo_reg) {
@@ -178,7 +188,7 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder,
178 break; 188 break;
179 } 189 }
180 190
181 dvo->dev_ops->mode_set(dvo, mode, adjusted_mode); 191 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
182 192
183 /* Save the data order, since I don't know what it should be set to. */ 193 /* Save the data order, since I don't know what it should be set to. */
184 dvo_val = I915_READ(dvo_reg) & 194 dvo_val = I915_READ(dvo_reg) &
@@ -214,40 +224,38 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder,
214static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector) 224static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector)
215{ 225{
216 struct drm_encoder *encoder = intel_attached_encoder(connector); 226 struct drm_encoder *encoder = intel_attached_encoder(connector);
217 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 227 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
218 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
219 228
220 return dvo->dev_ops->detect(dvo); 229 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
221} 230}
222 231
223static int intel_dvo_get_modes(struct drm_connector *connector) 232static int intel_dvo_get_modes(struct drm_connector *connector)
224{ 233{
225 struct drm_encoder *encoder = intel_attached_encoder(connector); 234 struct drm_encoder *encoder = intel_attached_encoder(connector);
226 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 235 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
227 struct intel_dvo_device *dvo = intel_encoder->dev_priv;
228 236
229 /* We should probably have an i2c driver get_modes function for those 237 /* We should probably have an i2c driver get_modes function for those
230 * devices which will have a fixed set of modes determined by the chip 238 * devices which will have a fixed set of modes determined by the chip
231 * (TV-out, for example), but for now with just TMDS and LVDS, 239 * (TV-out, for example), but for now with just TMDS and LVDS,
232 * that's not the case. 240 * that's not the case.
233 */ 241 */
234 intel_ddc_get_modes(connector, intel_encoder->ddc_bus); 242 intel_ddc_get_modes(connector, intel_dvo->base.ddc_bus);
235 if (!list_empty(&connector->probed_modes)) 243 if (!list_empty(&connector->probed_modes))
236 return 1; 244 return 1;
237 245
238 246 if (intel_dvo->panel_fixed_mode != NULL) {
239 if (dvo->panel_fixed_mode != NULL) {
240 struct drm_display_mode *mode; 247 struct drm_display_mode *mode;
241 mode = drm_mode_duplicate(connector->dev, dvo->panel_fixed_mode); 248 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
242 if (mode) { 249 if (mode) {
243 drm_mode_probed_add(connector, mode); 250 drm_mode_probed_add(connector, mode);
244 return 1; 251 return 1;
245 } 252 }
246 } 253 }
254
247 return 0; 255 return 0;
248} 256}
249 257
250static void intel_dvo_destroy (struct drm_connector *connector) 258static void intel_dvo_destroy(struct drm_connector *connector)
251{ 259{
252 drm_sysfs_connector_remove(connector); 260 drm_sysfs_connector_remove(connector);
253 drm_connector_cleanup(connector); 261 drm_connector_cleanup(connector);
@@ -277,28 +285,20 @@ static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs
277 285
278static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 286static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
279{ 287{
280 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 288 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
281 struct intel_dvo_device *dvo = intel_encoder->dev_priv; 289
282 290 if (intel_dvo->dev.dev_ops->destroy)
283 if (dvo) { 291 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
284 if (dvo->dev_ops->destroy) 292
285 dvo->dev_ops->destroy(dvo); 293 kfree(intel_dvo->panel_fixed_mode);
286 if (dvo->panel_fixed_mode) 294
287 kfree(dvo->panel_fixed_mode); 295 intel_encoder_destroy(encoder);
288 }
289 if (intel_encoder->i2c_bus)
290 intel_i2c_destroy(intel_encoder->i2c_bus);
291 if (intel_encoder->ddc_bus)
292 intel_i2c_destroy(intel_encoder->ddc_bus);
293 drm_encoder_cleanup(encoder);
294 kfree(intel_encoder);
295} 296}
296 297
297static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 298static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
298 .destroy = intel_dvo_enc_destroy, 299 .destroy = intel_dvo_enc_destroy,
299}; 300};
300 301
301
302/** 302/**
303 * Attempts to get a fixed panel timing for LVDS (currently only the i830). 303 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
304 * 304 *
@@ -306,15 +306,13 @@ static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
306 * chip being on DVOB/C and having multiple pipes. 306 * chip being on DVOB/C and having multiple pipes.
307 */ 307 */
308static struct drm_display_mode * 308static struct drm_display_mode *
309intel_dvo_get_current_mode (struct drm_connector *connector) 309intel_dvo_get_current_mode(struct drm_connector *connector)
310{ 310{
311 struct drm_device *dev = connector->dev; 311 struct drm_device *dev = connector->dev;
312 struct drm_i915_private *dev_priv = dev->dev_private; 312 struct drm_i915_private *dev_priv = dev->dev_private;
313 struct drm_encoder *encoder = intel_attached_encoder(connector); 313 struct drm_encoder *encoder = intel_attached_encoder(connector);
314 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 314 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
315 struct intel_dvo_device *dvo = intel_encoder->dev_priv; 315 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
316 uint32_t dvo_reg = dvo->dvo_reg;
317 uint32_t dvo_val = I915_READ(dvo_reg);
318 struct drm_display_mode *mode = NULL; 316 struct drm_display_mode *mode = NULL;
319 317
320 /* If the DVO port is active, that'll be the LVDS, so we can pull out 318 /* If the DVO port is active, that'll be the LVDS, so we can pull out
@@ -327,7 +325,6 @@ intel_dvo_get_current_mode (struct drm_connector *connector)
327 crtc = intel_get_crtc_from_pipe(dev, pipe); 325 crtc = intel_get_crtc_from_pipe(dev, pipe);
328 if (crtc) { 326 if (crtc) {
329 mode = intel_crtc_mode_get(dev, crtc); 327 mode = intel_crtc_mode_get(dev, crtc);
330
331 if (mode) { 328 if (mode) {
332 mode->type |= DRM_MODE_TYPE_PREFERRED; 329 mode->type |= DRM_MODE_TYPE_PREFERRED;
333 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) 330 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
@@ -337,28 +334,32 @@ intel_dvo_get_current_mode (struct drm_connector *connector)
337 } 334 }
338 } 335 }
339 } 336 }
337
340 return mode; 338 return mode;
341} 339}
342 340
343void intel_dvo_init(struct drm_device *dev) 341void intel_dvo_init(struct drm_device *dev)
344{ 342{
345 struct intel_encoder *intel_encoder; 343 struct intel_encoder *intel_encoder;
344 struct intel_dvo *intel_dvo;
346 struct intel_connector *intel_connector; 345 struct intel_connector *intel_connector;
347 struct intel_dvo_device *dvo;
348 struct i2c_adapter *i2cbus = NULL; 346 struct i2c_adapter *i2cbus = NULL;
349 int ret = 0; 347 int ret = 0;
350 int i; 348 int i;
351 int encoder_type = DRM_MODE_ENCODER_NONE; 349 int encoder_type = DRM_MODE_ENCODER_NONE;
352 intel_encoder = kzalloc (sizeof(struct intel_encoder), GFP_KERNEL); 350
353 if (!intel_encoder) 351 intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
352 if (!intel_dvo)
354 return; 353 return;
355 354
356 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); 355 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
357 if (!intel_connector) { 356 if (!intel_connector) {
358 kfree(intel_encoder); 357 kfree(intel_dvo);
359 return; 358 return;
360 } 359 }
361 360
361 intel_encoder = &intel_dvo->base;
362
362 /* Set up the DDC bus */ 363 /* Set up the DDC bus */
363 intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D"); 364 intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D");
364 if (!intel_encoder->ddc_bus) 365 if (!intel_encoder->ddc_bus)
@@ -367,10 +368,9 @@ void intel_dvo_init(struct drm_device *dev)
367 /* Now, try to find a controller */ 368 /* Now, try to find a controller */
368 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 369 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
369 struct drm_connector *connector = &intel_connector->base; 370 struct drm_connector *connector = &intel_connector->base;
371 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
370 int gpio; 372 int gpio;
371 373
372 dvo = &intel_dvo_devices[i];
373
374 /* Allow the I2C driver info to specify the GPIO to be used in 374 /* Allow the I2C driver info to specify the GPIO to be used in
375 * special cases, but otherwise default to what's defined 375 * special cases, but otherwise default to what's defined
376 * in the spec. 376 * in the spec.
@@ -393,11 +393,8 @@ void intel_dvo_init(struct drm_device *dev)
393 continue; 393 continue;
394 } 394 }
395 395
396 if (dvo->dev_ops!= NULL) 396 intel_dvo->dev = *dvo;
397 ret = dvo->dev_ops->init(dvo, i2cbus); 397 ret = dvo->dev_ops->init(&intel_dvo->dev, i2cbus);
398 else
399 ret = false;
400
401 if (!ret) 398 if (!ret)
402 continue; 399 continue;
403 400
@@ -429,9 +426,6 @@ void intel_dvo_init(struct drm_device *dev)
429 connector->interlace_allowed = false; 426 connector->interlace_allowed = false;
430 connector->doublescan_allowed = false; 427 connector->doublescan_allowed = false;
431 428
432 intel_encoder->dev_priv = dvo;
433 intel_encoder->i2c_bus = i2cbus;
434
435 drm_encoder_init(dev, &intel_encoder->enc, 429 drm_encoder_init(dev, &intel_encoder->enc,
436 &intel_dvo_enc_funcs, encoder_type); 430 &intel_dvo_enc_funcs, encoder_type);
437 drm_encoder_helper_add(&intel_encoder->enc, 431 drm_encoder_helper_add(&intel_encoder->enc,
@@ -447,9 +441,9 @@ void intel_dvo_init(struct drm_device *dev)
447 * headers, likely), so for now, just get the current 441 * headers, likely), so for now, just get the current
448 * mode being output through DVO. 442 * mode being output through DVO.
449 */ 443 */
450 dvo->panel_fixed_mode = 444 intel_dvo->panel_fixed_mode =
451 intel_dvo_get_current_mode(connector); 445 intel_dvo_get_current_mode(connector);
452 dvo->panel_wants_dither = true; 446 intel_dvo->panel_wants_dither = true;
453 } 447 }
454 448
455 drm_sysfs_connector_add(connector); 449 drm_sysfs_connector_add(connector);
@@ -461,6 +455,6 @@ void intel_dvo_init(struct drm_device *dev)
461 if (i2cbus != NULL) 455 if (i2cbus != NULL)
462 intel_i2c_destroy(i2cbus); 456 intel_i2c_destroy(i2cbus);
463free_intel: 457free_intel:
464 kfree(intel_encoder); 458 kfree(intel_dvo);
465 kfree(intel_connector); 459 kfree(intel_connector);
466} 460}
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 197887ed1823..ccd4c97e6524 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -37,11 +37,17 @@
37#include "i915_drm.h" 37#include "i915_drm.h"
38#include "i915_drv.h" 38#include "i915_drv.h"
39 39
40struct intel_hdmi_priv { 40struct intel_hdmi {
41 struct intel_encoder base;
41 u32 sdvox_reg; 42 u32 sdvox_reg;
42 bool has_hdmi_sink; 43 bool has_hdmi_sink;
43}; 44};
44 45
46static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)
47{
48 return container_of(enc_to_intel_encoder(encoder), struct intel_hdmi, base);
49}
50
45static void intel_hdmi_mode_set(struct drm_encoder *encoder, 51static void intel_hdmi_mode_set(struct drm_encoder *encoder,
46 struct drm_display_mode *mode, 52 struct drm_display_mode *mode,
47 struct drm_display_mode *adjusted_mode) 53 struct drm_display_mode *adjusted_mode)
@@ -50,8 +56,7 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
50 struct drm_i915_private *dev_priv = dev->dev_private; 56 struct drm_i915_private *dev_priv = dev->dev_private;
51 struct drm_crtc *crtc = encoder->crtc; 57 struct drm_crtc *crtc = encoder->crtc;
52 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 58 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
53 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 59 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
54 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
55 u32 sdvox; 60 u32 sdvox;
56 61
57 sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE; 62 sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
@@ -60,7 +65,7 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
60 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 65 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
61 sdvox |= SDVO_HSYNC_ACTIVE_HIGH; 66 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
62 67
63 if (hdmi_priv->has_hdmi_sink) { 68 if (intel_hdmi->has_hdmi_sink) {
64 sdvox |= SDVO_AUDIO_ENABLE; 69 sdvox |= SDVO_AUDIO_ENABLE;
65 if (HAS_PCH_CPT(dev)) 70 if (HAS_PCH_CPT(dev))
66 sdvox |= HDMI_MODE_SELECT; 71 sdvox |= HDMI_MODE_SELECT;
@@ -73,26 +78,25 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
73 sdvox |= SDVO_PIPE_B_SELECT; 78 sdvox |= SDVO_PIPE_B_SELECT;
74 } 79 }
75 80
76 I915_WRITE(hdmi_priv->sdvox_reg, sdvox); 81 I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
77 POSTING_READ(hdmi_priv->sdvox_reg); 82 POSTING_READ(intel_hdmi->sdvox_reg);
78} 83}
79 84
80static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode) 85static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
81{ 86{
82 struct drm_device *dev = encoder->dev; 87 struct drm_device *dev = encoder->dev;
83 struct drm_i915_private *dev_priv = dev->dev_private; 88 struct drm_i915_private *dev_priv = dev->dev_private;
84 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 89 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
85 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
86 u32 temp; 90 u32 temp;
87 91
88 temp = I915_READ(hdmi_priv->sdvox_reg); 92 temp = I915_READ(intel_hdmi->sdvox_reg);
89 93
90 /* HW workaround, need to toggle enable bit off and on for 12bpc, but 94 /* HW workaround, need to toggle enable bit off and on for 12bpc, but
91 * we do this anyway which shows more stable in testing. 95 * we do this anyway which shows more stable in testing.
92 */ 96 */
93 if (HAS_PCH_SPLIT(dev)) { 97 if (HAS_PCH_SPLIT(dev)) {
94 I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE); 98 I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
95 POSTING_READ(hdmi_priv->sdvox_reg); 99 POSTING_READ(intel_hdmi->sdvox_reg);
96 } 100 }
97 101
98 if (mode != DRM_MODE_DPMS_ON) { 102 if (mode != DRM_MODE_DPMS_ON) {
@@ -101,15 +105,15 @@ static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
101 temp |= SDVO_ENABLE; 105 temp |= SDVO_ENABLE;
102 } 106 }
103 107
104 I915_WRITE(hdmi_priv->sdvox_reg, temp); 108 I915_WRITE(intel_hdmi->sdvox_reg, temp);
105 POSTING_READ(hdmi_priv->sdvox_reg); 109 POSTING_READ(intel_hdmi->sdvox_reg);
106 110
107 /* HW workaround, need to write this twice for issue that may result 111 /* HW workaround, need to write this twice for issue that may result
108 * in first write getting masked. 112 * in first write getting masked.
109 */ 113 */
110 if (HAS_PCH_SPLIT(dev)) { 114 if (HAS_PCH_SPLIT(dev)) {
111 I915_WRITE(hdmi_priv->sdvox_reg, temp); 115 I915_WRITE(intel_hdmi->sdvox_reg, temp);
112 POSTING_READ(hdmi_priv->sdvox_reg); 116 POSTING_READ(intel_hdmi->sdvox_reg);
113 } 117 }
114} 118}
115 119
@@ -138,19 +142,17 @@ static enum drm_connector_status
138intel_hdmi_detect(struct drm_connector *connector) 142intel_hdmi_detect(struct drm_connector *connector)
139{ 143{
140 struct drm_encoder *encoder = intel_attached_encoder(connector); 144 struct drm_encoder *encoder = intel_attached_encoder(connector);
141 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 145 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
142 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
143 struct edid *edid = NULL; 146 struct edid *edid = NULL;
144 enum drm_connector_status status = connector_status_disconnected; 147 enum drm_connector_status status = connector_status_disconnected;
145 148
146 hdmi_priv->has_hdmi_sink = false; 149 intel_hdmi->has_hdmi_sink = false;
147 edid = drm_get_edid(connector, 150 edid = drm_get_edid(connector, intel_hdmi->base.ddc_bus);
148 intel_encoder->ddc_bus);
149 151
150 if (edid) { 152 if (edid) {
151 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 153 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
152 status = connector_status_connected; 154 status = connector_status_connected;
153 hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid); 155 intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
154 } 156 }
155 connector->display_info.raw_edid = NULL; 157 connector->display_info.raw_edid = NULL;
156 kfree(edid); 158 kfree(edid);
@@ -162,13 +164,13 @@ intel_hdmi_detect(struct drm_connector *connector)
162static int intel_hdmi_get_modes(struct drm_connector *connector) 164static int intel_hdmi_get_modes(struct drm_connector *connector)
163{ 165{
164 struct drm_encoder *encoder = intel_attached_encoder(connector); 166 struct drm_encoder *encoder = intel_attached_encoder(connector);
165 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 167 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
166 168
167 /* We should parse the EDID data and find out if it's an HDMI sink so 169 /* We should parse the EDID data and find out if it's an HDMI sink so
168 * we can send audio to it. 170 * we can send audio to it.
169 */ 171 */
170 172
171 return intel_ddc_get_modes(connector, intel_encoder->ddc_bus); 173 return intel_ddc_get_modes(connector, intel_hdmi->base.ddc_bus);
172} 174}
173 175
174static void intel_hdmi_destroy(struct drm_connector *connector) 176static void intel_hdmi_destroy(struct drm_connector *connector)
@@ -199,18 +201,8 @@ static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs
199 .best_encoder = intel_attached_encoder, 201 .best_encoder = intel_attached_encoder,
200}; 202};
201 203
202static void intel_hdmi_enc_destroy(struct drm_encoder *encoder)
203{
204 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
205
206 if (intel_encoder->i2c_bus)
207 intel_i2c_destroy(intel_encoder->i2c_bus);
208 drm_encoder_cleanup(encoder);
209 kfree(intel_encoder);
210}
211
212static const struct drm_encoder_funcs intel_hdmi_enc_funcs = { 204static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
213 .destroy = intel_hdmi_enc_destroy, 205 .destroy = intel_encoder_destroy,
214}; 206};
215 207
216void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) 208void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
@@ -219,21 +211,19 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
219 struct drm_connector *connector; 211 struct drm_connector *connector;
220 struct intel_encoder *intel_encoder; 212 struct intel_encoder *intel_encoder;
221 struct intel_connector *intel_connector; 213 struct intel_connector *intel_connector;
222 struct intel_hdmi_priv *hdmi_priv; 214 struct intel_hdmi *intel_hdmi;
223 215
224 intel_encoder = kcalloc(sizeof(struct intel_encoder) + 216 intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
225 sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL); 217 if (!intel_hdmi)
226 if (!intel_encoder)
227 return; 218 return;
228 219
229 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); 220 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
230 if (!intel_connector) { 221 if (!intel_connector) {
231 kfree(intel_encoder); 222 kfree(intel_hdmi);
232 return; 223 return;
233 } 224 }
234 225
235 hdmi_priv = (struct intel_hdmi_priv *)(intel_encoder + 1); 226 intel_encoder = &intel_hdmi->base;
236
237 connector = &intel_connector->base; 227 connector = &intel_connector->base;
238 drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, 228 drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
239 DRM_MODE_CONNECTOR_HDMIA); 229 DRM_MODE_CONNECTOR_HDMIA);
@@ -274,8 +264,7 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
274 if (!intel_encoder->ddc_bus) 264 if (!intel_encoder->ddc_bus)
275 goto err_connector; 265 goto err_connector;
276 266
277 hdmi_priv->sdvox_reg = sdvox_reg; 267 intel_hdmi->sdvox_reg = sdvox_reg;
278 intel_encoder->dev_priv = hdmi_priv;
279 268
280 drm_encoder_init(dev, &intel_encoder->enc, &intel_hdmi_enc_funcs, 269 drm_encoder_init(dev, &intel_encoder->enc, &intel_hdmi_enc_funcs,
281 DRM_MODE_ENCODER_TMDS); 270 DRM_MODE_ENCODER_TMDS);
@@ -298,7 +287,7 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
298 287
299err_connector: 288err_connector:
300 drm_connector_cleanup(connector); 289 drm_connector_cleanup(connector);
301 kfree(intel_encoder); 290 kfree(intel_hdmi);
302 kfree(intel_connector); 291 kfree(intel_connector);
303 292
304 return; 293 return;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 0a2e60059fb3..312ac306469a 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -41,12 +41,18 @@
41#include <linux/acpi.h> 41#include <linux/acpi.h>
42 42
43/* Private structure for the integrated LVDS support */ 43/* Private structure for the integrated LVDS support */
44struct intel_lvds_priv { 44struct intel_lvds {
45 struct intel_encoder base;
45 int fitting_mode; 46 int fitting_mode;
46 u32 pfit_control; 47 u32 pfit_control;
47 u32 pfit_pgm_ratios; 48 u32 pfit_pgm_ratios;
48}; 49};
49 50
51static struct intel_lvds *enc_to_intel_lvds(struct drm_encoder *encoder)
52{
53 return container_of(enc_to_intel_encoder(encoder), struct intel_lvds, base);
54}
55
50/** 56/**
51 * Sets the backlight level. 57 * Sets the backlight level.
52 * 58 *
@@ -219,9 +225,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
219 struct drm_device *dev = encoder->dev; 225 struct drm_device *dev = encoder->dev;
220 struct drm_i915_private *dev_priv = dev->dev_private; 226 struct drm_i915_private *dev_priv = dev->dev_private;
221 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); 227 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
228 struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
222 struct drm_encoder *tmp_encoder; 229 struct drm_encoder *tmp_encoder;
223 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
224 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
225 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 230 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
226 231
227 /* Should never happen!! */ 232 /* Should never happen!! */
@@ -293,7 +298,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
293 I915_WRITE(BCLRPAT_B, 0); 298 I915_WRITE(BCLRPAT_B, 0);
294 } 299 }
295 300
296 switch (lvds_priv->fitting_mode) { 301 switch (intel_lvds->fitting_mode) {
297 case DRM_MODE_SCALE_CENTER: 302 case DRM_MODE_SCALE_CENTER:
298 /* 303 /*
299 * For centered modes, we have to calculate border widths & 304 * For centered modes, we have to calculate border widths &
@@ -378,8 +383,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
378 } 383 }
379 384
380out: 385out:
381 lvds_priv->pfit_control = pfit_control; 386 intel_lvds->pfit_control = pfit_control;
382 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios; 387 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
383 dev_priv->lvds_border_bits = border; 388 dev_priv->lvds_border_bits = border;
384 389
385 /* 390 /*
@@ -427,8 +432,7 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder,
427{ 432{
428 struct drm_device *dev = encoder->dev; 433 struct drm_device *dev = encoder->dev;
429 struct drm_i915_private *dev_priv = dev->dev_private; 434 struct drm_i915_private *dev_priv = dev->dev_private;
430 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 435 struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
431 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
432 436
433 /* 437 /*
434 * The LVDS pin pair will already have been turned on in the 438 * The LVDS pin pair will already have been turned on in the
@@ -444,8 +448,8 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder,
444 * screen. Should be enabled before the pipe is enabled, according to 448 * screen. Should be enabled before the pipe is enabled, according to
445 * register description and PRM. 449 * register description and PRM.
446 */ 450 */
447 I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios); 451 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
448 I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control); 452 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
449} 453}
450 454
451/** 455/**
@@ -600,18 +604,17 @@ static int intel_lvds_set_property(struct drm_connector *connector,
600 connector->encoder) { 604 connector->encoder) {
601 struct drm_crtc *crtc = connector->encoder->crtc; 605 struct drm_crtc *crtc = connector->encoder->crtc;
602 struct drm_encoder *encoder = connector->encoder; 606 struct drm_encoder *encoder = connector->encoder;
603 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 607 struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
604 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
605 608
606 if (value == DRM_MODE_SCALE_NONE) { 609 if (value == DRM_MODE_SCALE_NONE) {
607 DRM_DEBUG_KMS("no scaling not supported\n"); 610 DRM_DEBUG_KMS("no scaling not supported\n");
608 return 0; 611 return 0;
609 } 612 }
610 if (lvds_priv->fitting_mode == value) { 613 if (intel_lvds->fitting_mode == value) {
611 /* the LVDS scaling property is not changed */ 614 /* the LVDS scaling property is not changed */
612 return 0; 615 return 0;
613 } 616 }
614 lvds_priv->fitting_mode = value; 617 intel_lvds->fitting_mode = value;
615 if (crtc && crtc->enabled) { 618 if (crtc && crtc->enabled) {
616 /* 619 /*
617 * If the CRTC is enabled, the display will be changed 620 * If the CRTC is enabled, the display will be changed
@@ -647,19 +650,8 @@ static const struct drm_connector_funcs intel_lvds_connector_funcs = {
647 .destroy = intel_lvds_destroy, 650 .destroy = intel_lvds_destroy,
648}; 651};
649 652
650
651static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
652{
653 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
654
655 if (intel_encoder->ddc_bus)
656 intel_i2c_destroy(intel_encoder->ddc_bus);
657 drm_encoder_cleanup(encoder);
658 kfree(intel_encoder);
659}
660
661static const struct drm_encoder_funcs intel_lvds_enc_funcs = { 653static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
662 .destroy = intel_lvds_enc_destroy, 654 .destroy = intel_encoder_destroy,
663}; 655};
664 656
665static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) 657static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
@@ -843,13 +835,13 @@ static int lvds_is_present_in_vbt(struct drm_device *dev)
843void intel_lvds_init(struct drm_device *dev) 835void intel_lvds_init(struct drm_device *dev)
844{ 836{
845 struct drm_i915_private *dev_priv = dev->dev_private; 837 struct drm_i915_private *dev_priv = dev->dev_private;
838 struct intel_lvds *intel_lvds;
846 struct intel_encoder *intel_encoder; 839 struct intel_encoder *intel_encoder;
847 struct intel_connector *intel_connector; 840 struct intel_connector *intel_connector;
848 struct drm_connector *connector; 841 struct drm_connector *connector;
849 struct drm_encoder *encoder; 842 struct drm_encoder *encoder;
850 struct drm_display_mode *scan; /* *modes, *bios_mode; */ 843 struct drm_display_mode *scan; /* *modes, *bios_mode; */
851 struct drm_crtc *crtc; 844 struct drm_crtc *crtc;
852 struct intel_lvds_priv *lvds_priv;
853 u32 lvds; 845 u32 lvds;
854 int pipe, gpio = GPIOC; 846 int pipe, gpio = GPIOC;
855 847
@@ -872,20 +864,20 @@ void intel_lvds_init(struct drm_device *dev)
872 gpio = PCH_GPIOC; 864 gpio = PCH_GPIOC;
873 } 865 }
874 866
875 intel_encoder = kzalloc(sizeof(struct intel_encoder) + 867 intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
876 sizeof(struct intel_lvds_priv), GFP_KERNEL); 868 if (!intel_lvds) {
877 if (!intel_encoder) {
878 return; 869 return;
879 } 870 }
880 871
881 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); 872 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
882 if (!intel_connector) { 873 if (!intel_connector) {
883 kfree(intel_encoder); 874 kfree(intel_lvds);
884 return; 875 return;
885 } 876 }
886 877
887 connector = &intel_connector->base; 878 intel_encoder = &intel_lvds->base;
888 encoder = &intel_encoder->enc; 879 encoder = &intel_encoder->enc;
880 connector = &intel_connector->base;
889 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, 881 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
890 DRM_MODE_CONNECTOR_LVDS); 882 DRM_MODE_CONNECTOR_LVDS);
891 883
@@ -905,8 +897,6 @@ void intel_lvds_init(struct drm_device *dev)
905 connector->interlace_allowed = false; 897 connector->interlace_allowed = false;
906 connector->doublescan_allowed = false; 898 connector->doublescan_allowed = false;
907 899
908 lvds_priv = (struct intel_lvds_priv *)(intel_encoder + 1);
909 intel_encoder->dev_priv = lvds_priv;
910 /* create the scaling mode property */ 900 /* create the scaling mode property */
911 drm_mode_create_scaling_mode_property(dev); 901 drm_mode_create_scaling_mode_property(dev);
912 /* 902 /*
@@ -916,7 +906,7 @@ void intel_lvds_init(struct drm_device *dev)
916 drm_connector_attach_property(&intel_connector->base, 906 drm_connector_attach_property(&intel_connector->base,
917 dev->mode_config.scaling_mode_property, 907 dev->mode_config.scaling_mode_property,
918 DRM_MODE_SCALE_ASPECT); 908 DRM_MODE_SCALE_ASPECT);
919 lvds_priv->fitting_mode = DRM_MODE_SCALE_ASPECT; 909 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
920 /* 910 /*
921 * LVDS discovery: 911 * LVDS discovery:
922 * 1) check for EDID on DDC 912 * 1) check for EDID on DDC
@@ -1024,6 +1014,6 @@ failed:
1024 intel_i2c_destroy(intel_encoder->ddc_bus); 1014 intel_i2c_destroy(intel_encoder->ddc_bus);
1025 drm_connector_cleanup(connector); 1015 drm_connector_cleanup(connector);
1026 drm_encoder_cleanup(encoder); 1016 drm_encoder_cleanup(encoder);
1027 kfree(intel_encoder); 1017 kfree(intel_lvds);
1028 kfree(intel_connector); 1018 kfree(intel_connector);
1029} 1019}
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index d9d4d51aa89e..2fc9da4c0791 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -31,8 +31,8 @@
31#include "drmP.h" 31#include "drmP.h"
32#include "drm.h" 32#include "drm.h"
33#include "drm_crtc.h" 33#include "drm_crtc.h"
34#include "intel_drv.h"
35#include "drm_edid.h" 34#include "drm_edid.h"
35#include "intel_drv.h"
36#include "i915_drm.h" 36#include "i915_drm.h"
37#include "i915_drv.h" 37#include "i915_drv.h"
38#include "intel_sdvo_regs.h" 38#include "intel_sdvo_regs.h"
@@ -61,7 +61,9 @@ static char *tv_format_names[] = {
61 61
62#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) 62#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
63 63
64struct intel_sdvo_priv { 64struct intel_sdvo {
65 struct intel_encoder base;
66
65 u8 slave_addr; 67 u8 slave_addr;
66 68
67 /* Register for the SDVO device: SDVOB or SDVOC */ 69 /* Register for the SDVO device: SDVOB or SDVOC */
@@ -173,9 +175,13 @@ struct intel_sdvo_connector {
173 u32 cur_hue, max_hue; 175 u32 cur_hue, max_hue;
174}; 176};
175 177
178static struct intel_sdvo *enc_to_intel_sdvo(struct drm_encoder *encoder)
179{
180 return container_of(enc_to_intel_encoder(encoder), struct intel_sdvo, base);
181}
182
176static bool 183static bool
177intel_sdvo_output_setup(struct intel_encoder *intel_encoder, 184intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
178 uint16_t flags);
179static void 185static void
180intel_sdvo_tv_create_property(struct drm_connector *connector, int type); 186intel_sdvo_tv_create_property(struct drm_connector *connector, int type);
181static void 187static void
@@ -186,21 +192,20 @@ intel_sdvo_create_enhance_property(struct drm_connector *connector);
186 * SDVOB and SDVOC to work around apparent hardware issues (according to 192 * SDVOB and SDVOC to work around apparent hardware issues (according to
187 * comments in the BIOS). 193 * comments in the BIOS).
188 */ 194 */
189static void intel_sdvo_write_sdvox(struct intel_encoder *intel_encoder, u32 val) 195static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
190{ 196{
191 struct drm_device *dev = intel_encoder->enc.dev; 197 struct drm_device *dev = intel_sdvo->base.enc.dev;
192 struct drm_i915_private *dev_priv = dev->dev_private; 198 struct drm_i915_private *dev_priv = dev->dev_private;
193 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
194 u32 bval = val, cval = val; 199 u32 bval = val, cval = val;
195 int i; 200 int i;
196 201
197 if (sdvo_priv->sdvo_reg == PCH_SDVOB) { 202 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
198 I915_WRITE(sdvo_priv->sdvo_reg, val); 203 I915_WRITE(intel_sdvo->sdvo_reg, val);
199 I915_READ(sdvo_priv->sdvo_reg); 204 I915_READ(intel_sdvo->sdvo_reg);
200 return; 205 return;
201 } 206 }
202 207
203 if (sdvo_priv->sdvo_reg == SDVOB) { 208 if (intel_sdvo->sdvo_reg == SDVOB) {
204 cval = I915_READ(SDVOC); 209 cval = I915_READ(SDVOC);
205 } else { 210 } else {
206 bval = I915_READ(SDVOB); 211 bval = I915_READ(SDVOB);
@@ -219,23 +224,22 @@ static void intel_sdvo_write_sdvox(struct intel_encoder *intel_encoder, u32 val)
219 } 224 }
220} 225}
221 226
222static bool intel_sdvo_read_byte(struct intel_encoder *intel_encoder, u8 addr, 227static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr,
223 u8 *ch) 228 u8 *ch)
224{ 229{
225 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
226 u8 out_buf[2]; 230 u8 out_buf[2];
227 u8 buf[2]; 231 u8 buf[2];
228 int ret; 232 int ret;
229 233
230 struct i2c_msg msgs[] = { 234 struct i2c_msg msgs[] = {
231 { 235 {
232 .addr = sdvo_priv->slave_addr >> 1, 236 .addr = intel_sdvo->slave_addr >> 1,
233 .flags = 0, 237 .flags = 0,
234 .len = 1, 238 .len = 1,
235 .buf = out_buf, 239 .buf = out_buf,
236 }, 240 },
237 { 241 {
238 .addr = sdvo_priv->slave_addr >> 1, 242 .addr = intel_sdvo->slave_addr >> 1,
239 .flags = I2C_M_RD, 243 .flags = I2C_M_RD,
240 .len = 1, 244 .len = 1,
241 .buf = buf, 245 .buf = buf,
@@ -245,7 +249,7 @@ static bool intel_sdvo_read_byte(struct intel_encoder *intel_encoder, u8 addr,
245 out_buf[0] = addr; 249 out_buf[0] = addr;
246 out_buf[1] = 0; 250 out_buf[1] = 0;
247 251
248 if ((ret = i2c_transfer(intel_encoder->i2c_bus, msgs, 2)) == 2) 252 if ((ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 2)) == 2)
249 { 253 {
250 *ch = buf[0]; 254 *ch = buf[0];
251 return true; 255 return true;
@@ -255,14 +259,13 @@ static bool intel_sdvo_read_byte(struct intel_encoder *intel_encoder, u8 addr,
255 return false; 259 return false;
256} 260}
257 261
258static bool intel_sdvo_write_byte(struct intel_encoder *intel_encoder, int addr, 262static bool intel_sdvo_write_byte(struct intel_sdvo *intel_sdvo, int addr,
259 u8 ch) 263 u8 ch)
260{ 264{
261 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
262 u8 out_buf[2]; 265 u8 out_buf[2];
263 struct i2c_msg msgs[] = { 266 struct i2c_msg msgs[] = {
264 { 267 {
265 .addr = sdvo_priv->slave_addr >> 1, 268 .addr = intel_sdvo->slave_addr >> 1,
266 .flags = 0, 269 .flags = 0,
267 .len = 2, 270 .len = 2,
268 .buf = out_buf, 271 .buf = out_buf,
@@ -272,7 +275,7 @@ static bool intel_sdvo_write_byte(struct intel_encoder *intel_encoder, int addr,
272 out_buf[0] = addr; 275 out_buf[0] = addr;
273 out_buf[1] = ch; 276 out_buf[1] = ch;
274 277
275 if (i2c_transfer(intel_encoder->i2c_bus, msgs, 1) == 1) 278 if (i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 1) == 1)
276 { 279 {
277 return true; 280 return true;
278 } 281 }
@@ -377,17 +380,15 @@ static const struct _sdvo_cmd_name {
377}; 380};
378 381
379#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB) 382#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
380#define SDVO_NAME(dev_priv) (IS_SDVOB((dev_priv)->sdvo_reg) ? "SDVOB" : "SDVOC") 383#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
381#define SDVO_PRIV(encoder) ((struct intel_sdvo_priv *) (encoder)->dev_priv)
382 384
383static void intel_sdvo_debug_write(struct intel_encoder *intel_encoder, u8 cmd, 385static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
384 void *args, int args_len) 386 void *args, int args_len)
385{ 387{
386 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
387 int i; 388 int i;
388 389
389 DRM_DEBUG_KMS("%s: W: %02X ", 390 DRM_DEBUG_KMS("%s: W: %02X ",
390 SDVO_NAME(sdvo_priv), cmd); 391 SDVO_NAME(intel_sdvo), cmd);
391 for (i = 0; i < args_len; i++) 392 for (i = 0; i < args_len; i++)
392 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]); 393 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
393 for (; i < 8; i++) 394 for (; i < 8; i++)
@@ -403,19 +404,19 @@ static void intel_sdvo_debug_write(struct intel_encoder *intel_encoder, u8 cmd,
403 DRM_LOG_KMS("\n"); 404 DRM_LOG_KMS("\n");
404} 405}
405 406
406static void intel_sdvo_write_cmd(struct intel_encoder *intel_encoder, u8 cmd, 407static void intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
407 void *args, int args_len) 408 void *args, int args_len)
408{ 409{
409 int i; 410 int i;
410 411
411 intel_sdvo_debug_write(intel_encoder, cmd, args, args_len); 412 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
412 413
413 for (i = 0; i < args_len; i++) { 414 for (i = 0; i < args_len; i++) {
414 intel_sdvo_write_byte(intel_encoder, SDVO_I2C_ARG_0 - i, 415 intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0 - i,
415 ((u8*)args)[i]); 416 ((u8*)args)[i]);
416 } 417 }
417 418
418 intel_sdvo_write_byte(intel_encoder, SDVO_I2C_OPCODE, cmd); 419 intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_OPCODE, cmd);
419} 420}
420 421
421static const char *cmd_status_names[] = { 422static const char *cmd_status_names[] = {
@@ -428,14 +429,13 @@ static const char *cmd_status_names[] = {
428 "Scaling not supported" 429 "Scaling not supported"
429}; 430};
430 431
431static void intel_sdvo_debug_response(struct intel_encoder *intel_encoder, 432static void intel_sdvo_debug_response(struct intel_sdvo *intel_sdvo,
432 void *response, int response_len, 433 void *response, int response_len,
433 u8 status) 434 u8 status)
434{ 435{
435 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
436 int i; 436 int i;
437 437
438 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(sdvo_priv)); 438 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
439 for (i = 0; i < response_len; i++) 439 for (i = 0; i < response_len; i++)
440 DRM_LOG_KMS("%02X ", ((u8 *)response)[i]); 440 DRM_LOG_KMS("%02X ", ((u8 *)response)[i]);
441 for (; i < 8; i++) 441 for (; i < 8; i++)
@@ -447,7 +447,7 @@ static void intel_sdvo_debug_response(struct intel_encoder *intel_encoder,
447 DRM_LOG_KMS("\n"); 447 DRM_LOG_KMS("\n");
448} 448}
449 449
450static u8 intel_sdvo_read_response(struct intel_encoder *intel_encoder, 450static u8 intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
451 void *response, int response_len) 451 void *response, int response_len)
452{ 452{
453 int i; 453 int i;
@@ -457,16 +457,16 @@ static u8 intel_sdvo_read_response(struct intel_encoder *intel_encoder,
457 while (retry--) { 457 while (retry--) {
458 /* Read the command response */ 458 /* Read the command response */
459 for (i = 0; i < response_len; i++) { 459 for (i = 0; i < response_len; i++) {
460 intel_sdvo_read_byte(intel_encoder, 460 intel_sdvo_read_byte(intel_sdvo,
461 SDVO_I2C_RETURN_0 + i, 461 SDVO_I2C_RETURN_0 + i,
462 &((u8 *)response)[i]); 462 &((u8 *)response)[i]);
463 } 463 }
464 464
465 /* read the return status */ 465 /* read the return status */
466 intel_sdvo_read_byte(intel_encoder, SDVO_I2C_CMD_STATUS, 466 intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS,
467 &status); 467 &status);
468 468
469 intel_sdvo_debug_response(intel_encoder, response, response_len, 469 intel_sdvo_debug_response(intel_sdvo, response, response_len,
470 status); 470 status);
471 if (status != SDVO_CMD_STATUS_PENDING) 471 if (status != SDVO_CMD_STATUS_PENDING)
472 return status; 472 return status;
@@ -494,37 +494,36 @@ static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
494 * another I2C transaction after issuing the DDC bus switch, it will be 494 * another I2C transaction after issuing the DDC bus switch, it will be
495 * switched to the internal SDVO register. 495 * switched to the internal SDVO register.
496 */ 496 */
497static void intel_sdvo_set_control_bus_switch(struct intel_encoder *intel_encoder, 497static void intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
498 u8 target) 498 u8 target)
499{ 499{
500 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
501 u8 out_buf[2], cmd_buf[2], ret_value[2], ret; 500 u8 out_buf[2], cmd_buf[2], ret_value[2], ret;
502 struct i2c_msg msgs[] = { 501 struct i2c_msg msgs[] = {
503 { 502 {
504 .addr = sdvo_priv->slave_addr >> 1, 503 .addr = intel_sdvo->slave_addr >> 1,
505 .flags = 0, 504 .flags = 0,
506 .len = 2, 505 .len = 2,
507 .buf = out_buf, 506 .buf = out_buf,
508 }, 507 },
509 /* the following two are to read the response */ 508 /* the following two are to read the response */
510 { 509 {
511 .addr = sdvo_priv->slave_addr >> 1, 510 .addr = intel_sdvo->slave_addr >> 1,
512 .flags = 0, 511 .flags = 0,
513 .len = 1, 512 .len = 1,
514 .buf = cmd_buf, 513 .buf = cmd_buf,
515 }, 514 },
516 { 515 {
517 .addr = sdvo_priv->slave_addr >> 1, 516 .addr = intel_sdvo->slave_addr >> 1,
518 .flags = I2C_M_RD, 517 .flags = I2C_M_RD,
519 .len = 1, 518 .len = 1,
520 .buf = ret_value, 519 .buf = ret_value,
521 }, 520 },
522 }; 521 };
523 522
524 intel_sdvo_debug_write(intel_encoder, SDVO_CMD_SET_CONTROL_BUS_SWITCH, 523 intel_sdvo_debug_write(intel_sdvo, SDVO_CMD_SET_CONTROL_BUS_SWITCH,
525 &target, 1); 524 &target, 1);
526 /* write the DDC switch command argument */ 525 /* write the DDC switch command argument */
527 intel_sdvo_write_byte(intel_encoder, SDVO_I2C_ARG_0, target); 526 intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0, target);
528 527
529 out_buf[0] = SDVO_I2C_OPCODE; 528 out_buf[0] = SDVO_I2C_OPCODE;
530 out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH; 529 out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH;
@@ -533,7 +532,7 @@ static void intel_sdvo_set_control_bus_switch(struct intel_encoder *intel_encode
533 ret_value[0] = 0; 532 ret_value[0] = 0;
534 ret_value[1] = 0; 533 ret_value[1] = 0;
535 534
536 ret = i2c_transfer(intel_encoder->i2c_bus, msgs, 3); 535 ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 3);
537 if (ret != 3) { 536 if (ret != 3) {
538 /* failure in I2C transfer */ 537 /* failure in I2C transfer */
539 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 538 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
@@ -547,7 +546,7 @@ static void intel_sdvo_set_control_bus_switch(struct intel_encoder *intel_encode
547 return; 546 return;
548} 547}
549 548
550static bool intel_sdvo_set_target_input(struct intel_encoder *intel_encoder, bool target_0, bool target_1) 549static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo, bool target_0, bool target_1)
551{ 550{
552 struct intel_sdvo_set_target_input_args targets = {0}; 551 struct intel_sdvo_set_target_input_args targets = {0};
553 u8 status; 552 u8 status;
@@ -558,10 +557,10 @@ static bool intel_sdvo_set_target_input(struct intel_encoder *intel_encoder, boo
558 if (target_1) 557 if (target_1)
559 targets.target_1 = 1; 558 targets.target_1 = 1;
560 559
561 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TARGET_INPUT, &targets, 560 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_TARGET_INPUT, &targets,
562 sizeof(targets)); 561 sizeof(targets));
563 562
564 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 563 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
565 564
566 return (status == SDVO_CMD_STATUS_SUCCESS); 565 return (status == SDVO_CMD_STATUS_SUCCESS);
567} 566}
@@ -572,13 +571,13 @@ static bool intel_sdvo_set_target_input(struct intel_encoder *intel_encoder, boo
572 * This function is making an assumption about the layout of the response, 571 * This function is making an assumption about the layout of the response,
573 * which should be checked against the docs. 572 * which should be checked against the docs.
574 */ 573 */
575static bool intel_sdvo_get_trained_inputs(struct intel_encoder *intel_encoder, bool *input_1, bool *input_2) 574static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
576{ 575{
577 struct intel_sdvo_get_trained_inputs_response response; 576 struct intel_sdvo_get_trained_inputs_response response;
578 u8 status; 577 u8 status;
579 578
580 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_TRAINED_INPUTS, NULL, 0); 579 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, NULL, 0);
581 status = intel_sdvo_read_response(intel_encoder, &response, sizeof(response)); 580 status = intel_sdvo_read_response(intel_sdvo, &response, sizeof(response));
582 if (status != SDVO_CMD_STATUS_SUCCESS) 581 if (status != SDVO_CMD_STATUS_SUCCESS)
583 return false; 582 return false;
584 583
@@ -587,18 +586,18 @@ static bool intel_sdvo_get_trained_inputs(struct intel_encoder *intel_encoder, b
587 return true; 586 return true;
588} 587}
589 588
590static bool intel_sdvo_set_active_outputs(struct intel_encoder *intel_encoder, 589static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
591 u16 outputs) 590 u16 outputs)
592{ 591{
593 u8 status; 592 u8 status;
594 593
595 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_OUTPUTS, &outputs, 594 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_OUTPUTS, &outputs,
596 sizeof(outputs)); 595 sizeof(outputs));
597 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 596 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
598 return (status == SDVO_CMD_STATUS_SUCCESS); 597 return (status == SDVO_CMD_STATUS_SUCCESS);
599} 598}
600 599
601static bool intel_sdvo_set_encoder_power_state(struct intel_encoder *intel_encoder, 600static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
602 int mode) 601 int mode)
603{ 602{
604 u8 status, state = SDVO_ENCODER_STATE_ON; 603 u8 status, state = SDVO_ENCODER_STATE_ON;
@@ -618,24 +617,24 @@ static bool intel_sdvo_set_encoder_power_state(struct intel_encoder *intel_encod
618 break; 617 break;
619 } 618 }
620 619
621 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ENCODER_POWER_STATE, &state, 620 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ENCODER_POWER_STATE, &state,
622 sizeof(state)); 621 sizeof(state));
623 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 622 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
624 623
625 return (status == SDVO_CMD_STATUS_SUCCESS); 624 return (status == SDVO_CMD_STATUS_SUCCESS);
626} 625}
627 626
628static bool intel_sdvo_get_input_pixel_clock_range(struct intel_encoder *intel_encoder, 627static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
629 int *clock_min, 628 int *clock_min,
630 int *clock_max) 629 int *clock_max)
631{ 630{
632 struct intel_sdvo_pixel_clock_range clocks; 631 struct intel_sdvo_pixel_clock_range clocks;
633 u8 status; 632 u8 status;
634 633
635 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 634 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
636 NULL, 0); 635 NULL, 0);
637 636
638 status = intel_sdvo_read_response(intel_encoder, &clocks, sizeof(clocks)); 637 status = intel_sdvo_read_response(intel_sdvo, &clocks, sizeof(clocks));
639 638
640 if (status != SDVO_CMD_STATUS_SUCCESS) 639 if (status != SDVO_CMD_STATUS_SUCCESS)
641 return false; 640 return false;
@@ -647,58 +646,57 @@ static bool intel_sdvo_get_input_pixel_clock_range(struct intel_encoder *intel_e
647 return true; 646 return true;
648} 647}
649 648
650static bool intel_sdvo_set_target_output(struct intel_encoder *intel_encoder, 649static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
651 u16 outputs) 650 u16 outputs)
652{ 651{
653 u8 status; 652 u8 status;
654 653
655 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TARGET_OUTPUT, &outputs, 654 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_TARGET_OUTPUT, &outputs,
656 sizeof(outputs)); 655 sizeof(outputs));
657 656
658 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 657 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
659 return (status == SDVO_CMD_STATUS_SUCCESS); 658 return (status == SDVO_CMD_STATUS_SUCCESS);
660} 659}
661 660
662static bool intel_sdvo_set_timing(struct intel_encoder *intel_encoder, u8 cmd, 661static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
663 struct intel_sdvo_dtd *dtd) 662 struct intel_sdvo_dtd *dtd)
664{ 663{
665 u8 status; 664 u8 status;
666 665
667 intel_sdvo_write_cmd(intel_encoder, cmd, &dtd->part1, sizeof(dtd->part1)); 666 intel_sdvo_write_cmd(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1));
668 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 667 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
669 if (status != SDVO_CMD_STATUS_SUCCESS) 668 if (status != SDVO_CMD_STATUS_SUCCESS)
670 return false; 669 return false;
671 670
672 intel_sdvo_write_cmd(intel_encoder, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 671 intel_sdvo_write_cmd(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
673 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 672 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
674 if (status != SDVO_CMD_STATUS_SUCCESS) 673 if (status != SDVO_CMD_STATUS_SUCCESS)
675 return false; 674 return false;
676 675
677 return true; 676 return true;
678} 677}
679 678
680static bool intel_sdvo_set_input_timing(struct intel_encoder *intel_encoder, 679static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
681 struct intel_sdvo_dtd *dtd) 680 struct intel_sdvo_dtd *dtd)
682{ 681{
683 return intel_sdvo_set_timing(intel_encoder, 682 return intel_sdvo_set_timing(intel_sdvo,
684 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 683 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
685} 684}
686 685
687static bool intel_sdvo_set_output_timing(struct intel_encoder *intel_encoder, 686static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
688 struct intel_sdvo_dtd *dtd) 687 struct intel_sdvo_dtd *dtd)
689{ 688{
690 return intel_sdvo_set_timing(intel_encoder, 689 return intel_sdvo_set_timing(intel_sdvo,
691 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 690 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
692} 691}
693 692
694static bool 693static bool
695intel_sdvo_create_preferred_input_timing(struct intel_encoder *intel_encoder, 694intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
696 uint16_t clock, 695 uint16_t clock,
697 uint16_t width, 696 uint16_t width,
698 uint16_t height) 697 uint16_t height)
699{ 698{
700 struct intel_sdvo_preferred_input_timing_args args; 699 struct intel_sdvo_preferred_input_timing_args args;
701 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
702 uint8_t status; 700 uint8_t status;
703 701
704 memset(&args, 0, sizeof(args)); 702 memset(&args, 0, sizeof(args));
@@ -707,38 +705,38 @@ intel_sdvo_create_preferred_input_timing(struct intel_encoder *intel_encoder,
707 args.height = height; 705 args.height = height;
708 args.interlace = 0; 706 args.interlace = 0;
709 707
710 if (sdvo_priv->is_lvds && 708 if (intel_sdvo->is_lvds &&
711 (sdvo_priv->sdvo_lvds_fixed_mode->hdisplay != width || 709 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
712 sdvo_priv->sdvo_lvds_fixed_mode->vdisplay != height)) 710 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
713 args.scaled = 1; 711 args.scaled = 1;
714 712
715 intel_sdvo_write_cmd(intel_encoder, 713 intel_sdvo_write_cmd(intel_sdvo,
716 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 714 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
717 &args, sizeof(args)); 715 &args, sizeof(args));
718 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 716 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
719 if (status != SDVO_CMD_STATUS_SUCCESS) 717 if (status != SDVO_CMD_STATUS_SUCCESS)
720 return false; 718 return false;
721 719
722 return true; 720 return true;
723} 721}
724 722
725static bool intel_sdvo_get_preferred_input_timing(struct intel_encoder *intel_encoder, 723static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
726 struct intel_sdvo_dtd *dtd) 724 struct intel_sdvo_dtd *dtd)
727{ 725{
728 bool status; 726 bool status;
729 727
730 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 728 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
731 NULL, 0); 729 NULL, 0);
732 730
733 status = intel_sdvo_read_response(intel_encoder, &dtd->part1, 731 status = intel_sdvo_read_response(intel_sdvo, &dtd->part1,
734 sizeof(dtd->part1)); 732 sizeof(dtd->part1));
735 if (status != SDVO_CMD_STATUS_SUCCESS) 733 if (status != SDVO_CMD_STATUS_SUCCESS)
736 return false; 734 return false;
737 735
738 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 736 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
739 NULL, 0); 737 NULL, 0);
740 738
741 status = intel_sdvo_read_response(intel_encoder, &dtd->part2, 739 status = intel_sdvo_read_response(intel_sdvo, &dtd->part2,
742 sizeof(dtd->part2)); 740 sizeof(dtd->part2));
743 if (status != SDVO_CMD_STATUS_SUCCESS) 741 if (status != SDVO_CMD_STATUS_SUCCESS)
744 return false; 742 return false;
@@ -746,12 +744,12 @@ static bool intel_sdvo_get_preferred_input_timing(struct intel_encoder *intel_en
746 return false; 744 return false;
747} 745}
748 746
749static bool intel_sdvo_set_clock_rate_mult(struct intel_encoder *intel_encoder, u8 val) 747static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
750{ 748{
751 u8 status; 749 u8 status;
752 750
753 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 751 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
754 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 752 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
755 if (status != SDVO_CMD_STATUS_SUCCESS) 753 if (status != SDVO_CMD_STATUS_SUCCESS)
756 return false; 754 return false;
757 755
@@ -840,13 +838,13 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
840 mode->flags |= DRM_MODE_FLAG_PVSYNC; 838 mode->flags |= DRM_MODE_FLAG_PVSYNC;
841} 839}
842 840
843static bool intel_sdvo_get_supp_encode(struct intel_encoder *intel_encoder, 841static bool intel_sdvo_get_supp_encode(struct intel_sdvo *intel_sdvo,
844 struct intel_sdvo_encode *encode) 842 struct intel_sdvo_encode *encode)
845{ 843{
846 uint8_t status; 844 uint8_t status;
847 845
848 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_SUPP_ENCODE, NULL, 0); 846 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_SUPP_ENCODE, NULL, 0);
849 status = intel_sdvo_read_response(intel_encoder, encode, sizeof(*encode)); 847 status = intel_sdvo_read_response(intel_sdvo, encode, sizeof(*encode));
850 if (status != SDVO_CMD_STATUS_SUCCESS) { /* non-support means DVI */ 848 if (status != SDVO_CMD_STATUS_SUCCESS) { /* non-support means DVI */
851 memset(encode, 0, sizeof(*encode)); 849 memset(encode, 0, sizeof(*encode));
852 return false; 850 return false;
@@ -855,30 +853,30 @@ static bool intel_sdvo_get_supp_encode(struct intel_encoder *intel_encoder,
855 return true; 853 return true;
856} 854}
857 855
858static bool intel_sdvo_set_encode(struct intel_encoder *intel_encoder, 856static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
859 uint8_t mode) 857 uint8_t mode)
860{ 858{
861 uint8_t status; 859 uint8_t status;
862 860
863 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ENCODE, &mode, 1); 861 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
864 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 862 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
865 863
866 return (status == SDVO_CMD_STATUS_SUCCESS); 864 return (status == SDVO_CMD_STATUS_SUCCESS);
867} 865}
868 866
869static bool intel_sdvo_set_colorimetry(struct intel_encoder *intel_encoder, 867static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
870 uint8_t mode) 868 uint8_t mode)
871{ 869{
872 uint8_t status; 870 uint8_t status;
873 871
874 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 872 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
875 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 873 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
876 874
877 return (status == SDVO_CMD_STATUS_SUCCESS); 875 return (status == SDVO_CMD_STATUS_SUCCESS);
878} 876}
879 877
880#if 0 878#if 0
881static void intel_sdvo_dump_hdmi_buf(struct intel_encoder *intel_encoder) 879static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
882{ 880{
883 int i, j; 881 int i, j;
884 uint8_t set_buf_index[2]; 882 uint8_t set_buf_index[2];
@@ -908,7 +906,7 @@ static void intel_sdvo_dump_hdmi_buf(struct intel_encoder *intel_encoder)
908} 906}
909#endif 907#endif
910 908
911static void intel_sdvo_set_hdmi_buf(struct intel_encoder *intel_encoder, 909static void intel_sdvo_set_hdmi_buf(struct intel_sdvo *intel_sdvo,
912 int index, 910 int index,
913 uint8_t *data, int8_t size, uint8_t tx_rate) 911 uint8_t *data, int8_t size, uint8_t tx_rate)
914{ 912{
@@ -917,15 +915,15 @@ static void intel_sdvo_set_hdmi_buf(struct intel_encoder *intel_encoder,
917 set_buf_index[0] = index; 915 set_buf_index[0] = index;
918 set_buf_index[1] = 0; 916 set_buf_index[1] = 0;
919 917
920 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_INDEX, 918 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
921 set_buf_index, 2); 919 set_buf_index, 2);
922 920
923 for (; size > 0; size -= 8) { 921 for (; size > 0; size -= 8) {
924 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_DATA, data, 8); 922 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA, data, 8);
925 data += 8; 923 data += 8;
926 } 924 }
927 925
928 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1); 926 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1);
929} 927}
930 928
931static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size) 929static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size)
@@ -1000,7 +998,7 @@ struct dip_infoframe {
1000 } __attribute__ ((packed)) u; 998 } __attribute__ ((packed)) u;
1001} __attribute__((packed)); 999} __attribute__((packed));
1002 1000
1003static void intel_sdvo_set_avi_infoframe(struct intel_encoder *intel_encoder, 1001static void intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1004 struct drm_display_mode * mode) 1002 struct drm_display_mode * mode)
1005{ 1003{
1006 struct dip_infoframe avi_if = { 1004 struct dip_infoframe avi_if = {
@@ -1011,21 +1009,20 @@ static void intel_sdvo_set_avi_infoframe(struct intel_encoder *intel_encoder,
1011 1009
1012 avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if, 1010 avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if,
1013 4 + avi_if.len); 1011 4 + avi_if.len);
1014 intel_sdvo_set_hdmi_buf(intel_encoder, 1, (uint8_t *)&avi_if, 1012 intel_sdvo_set_hdmi_buf(intel_sdvo, 1, (uint8_t *)&avi_if,
1015 4 + avi_if.len, 1013 4 + avi_if.len,
1016 SDVO_HBUF_TX_VSYNC); 1014 SDVO_HBUF_TX_VSYNC);
1017} 1015}
1018 1016
1019static void intel_sdvo_set_tv_format(struct intel_encoder *intel_encoder) 1017static void intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1020{ 1018{
1021 1019
1022 struct intel_sdvo_tv_format format; 1020 struct intel_sdvo_tv_format format;
1023 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1024 uint32_t format_map, i; 1021 uint32_t format_map, i;
1025 uint8_t status; 1022 uint8_t status;
1026 1023
1027 for (i = 0; i < TV_FORMAT_NUM; i++) 1024 for (i = 0; i < TV_FORMAT_NUM; i++)
1028 if (tv_format_names[i] == sdvo_priv->tv_format_name) 1025 if (tv_format_names[i] == intel_sdvo->tv_format_name)
1029 break; 1026 break;
1030 1027
1031 format_map = 1 << i; 1028 format_map = 1 << i;
@@ -1033,23 +1030,22 @@ static void intel_sdvo_set_tv_format(struct intel_encoder *intel_encoder)
1033 memcpy(&format, &format_map, sizeof(format_map) > sizeof(format) ? 1030 memcpy(&format, &format_map, sizeof(format_map) > sizeof(format) ?
1034 sizeof(format) : sizeof(format_map)); 1031 sizeof(format) : sizeof(format_map));
1035 1032
1036 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TV_FORMAT, &format, 1033 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_TV_FORMAT, &format,
1037 sizeof(format)); 1034 sizeof(format));
1038 1035
1039 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 1036 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
1040 if (status != SDVO_CMD_STATUS_SUCCESS) 1037 if (status != SDVO_CMD_STATUS_SUCCESS)
1041 DRM_DEBUG_KMS("%s: Failed to set TV format\n", 1038 DRM_DEBUG_KMS("%s: Failed to set TV format\n",
1042 SDVO_NAME(sdvo_priv)); 1039 SDVO_NAME(intel_sdvo));
1043} 1040}
1044 1041
1045static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, 1042static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1046 struct drm_display_mode *mode, 1043 struct drm_display_mode *mode,
1047 struct drm_display_mode *adjusted_mode) 1044 struct drm_display_mode *adjusted_mode)
1048{ 1045{
1049 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1046 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1050 struct intel_sdvo_priv *dev_priv = intel_encoder->dev_priv;
1051 1047
1052 if (dev_priv->is_tv) { 1048 if (intel_sdvo->is_tv) {
1053 struct intel_sdvo_dtd output_dtd; 1049 struct intel_sdvo_dtd output_dtd;
1054 bool success; 1050 bool success;
1055 1051
@@ -1062,25 +1058,25 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1062 1058
1063 /* Set output timings */ 1059 /* Set output timings */
1064 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1060 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1065 intel_sdvo_set_target_output(intel_encoder, 1061 intel_sdvo_set_target_output(intel_sdvo,
1066 dev_priv->attached_output); 1062 intel_sdvo->attached_output);
1067 intel_sdvo_set_output_timing(intel_encoder, &output_dtd); 1063 intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1068 1064
1069 /* Set the input timing to the screen. Assume always input 0. */ 1065 /* Set the input timing to the screen. Assume always input 0. */
1070 intel_sdvo_set_target_input(intel_encoder, true, false); 1066 intel_sdvo_set_target_input(intel_sdvo, true, false);
1071 1067
1072 1068
1073 success = intel_sdvo_create_preferred_input_timing(intel_encoder, 1069 success = intel_sdvo_create_preferred_input_timing(intel_sdvo,
1074 mode->clock / 10, 1070 mode->clock / 10,
1075 mode->hdisplay, 1071 mode->hdisplay,
1076 mode->vdisplay); 1072 mode->vdisplay);
1077 if (success) { 1073 if (success) {
1078 struct intel_sdvo_dtd input_dtd; 1074 struct intel_sdvo_dtd input_dtd;
1079 1075
1080 intel_sdvo_get_preferred_input_timing(intel_encoder, 1076 intel_sdvo_get_preferred_input_timing(intel_sdvo,
1081 &input_dtd); 1077 &input_dtd);
1082 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1078 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1083 dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; 1079 intel_sdvo->sdvo_flags = input_dtd.part2.sdvo_flags;
1084 1080
1085 drm_mode_set_crtcinfo(adjusted_mode, 0); 1081 drm_mode_set_crtcinfo(adjusted_mode, 0);
1086 1082
@@ -1091,25 +1087,25 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1091 } else { 1087 } else {
1092 return false; 1088 return false;
1093 } 1089 }
1094 } else if (dev_priv->is_lvds) { 1090 } else if (intel_sdvo->is_lvds) {
1095 struct intel_sdvo_dtd output_dtd; 1091 struct intel_sdvo_dtd output_dtd;
1096 bool success; 1092 bool success;
1097 1093
1098 drm_mode_set_crtcinfo(dev_priv->sdvo_lvds_fixed_mode, 0); 1094 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode, 0);
1099 /* Set output timings */ 1095 /* Set output timings */
1100 intel_sdvo_get_dtd_from_mode(&output_dtd, 1096 intel_sdvo_get_dtd_from_mode(&output_dtd,
1101 dev_priv->sdvo_lvds_fixed_mode); 1097 intel_sdvo->sdvo_lvds_fixed_mode);
1102 1098
1103 intel_sdvo_set_target_output(intel_encoder, 1099 intel_sdvo_set_target_output(intel_sdvo,
1104 dev_priv->attached_output); 1100 intel_sdvo->attached_output);
1105 intel_sdvo_set_output_timing(intel_encoder, &output_dtd); 1101 intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1106 1102
1107 /* Set the input timing to the screen. Assume always input 0. */ 1103 /* Set the input timing to the screen. Assume always input 0. */
1108 intel_sdvo_set_target_input(intel_encoder, true, false); 1104 intel_sdvo_set_target_input(intel_sdvo, true, false);
1109 1105
1110 1106
1111 success = intel_sdvo_create_preferred_input_timing( 1107 success = intel_sdvo_create_preferred_input_timing(
1112 intel_encoder, 1108 intel_sdvo,
1113 mode->clock / 10, 1109 mode->clock / 10,
1114 mode->hdisplay, 1110 mode->hdisplay,
1115 mode->vdisplay); 1111 mode->vdisplay);
@@ -1117,10 +1113,10 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1117 if (success) { 1113 if (success) {
1118 struct intel_sdvo_dtd input_dtd; 1114 struct intel_sdvo_dtd input_dtd;
1119 1115
1120 intel_sdvo_get_preferred_input_timing(intel_encoder, 1116 intel_sdvo_get_preferred_input_timing(intel_sdvo,
1121 &input_dtd); 1117 &input_dtd);
1122 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1118 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1123 dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; 1119 intel_sdvo->sdvo_flags = input_dtd.part2.sdvo_flags;
1124 1120
1125 drm_mode_set_crtcinfo(adjusted_mode, 0); 1121 drm_mode_set_crtcinfo(adjusted_mode, 0);
1126 1122
@@ -1149,8 +1145,7 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1149 struct drm_i915_private *dev_priv = dev->dev_private; 1145 struct drm_i915_private *dev_priv = dev->dev_private;
1150 struct drm_crtc *crtc = encoder->crtc; 1146 struct drm_crtc *crtc = encoder->crtc;
1151 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1147 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1152 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1148 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1153 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1154 u32 sdvox = 0; 1149 u32 sdvox = 0;
1155 int sdvo_pixel_multiply; 1150 int sdvo_pixel_multiply;
1156 struct intel_sdvo_in_out_map in_out; 1151 struct intel_sdvo_in_out_map in_out;
@@ -1166,41 +1161,41 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1166 * channel on the motherboard. In a two-input device, the first input 1161 * channel on the motherboard. In a two-input device, the first input
1167 * will be SDVOB and the second SDVOC. 1162 * will be SDVOB and the second SDVOC.
1168 */ 1163 */
1169 in_out.in0 = sdvo_priv->attached_output; 1164 in_out.in0 = intel_sdvo->attached_output;
1170 in_out.in1 = 0; 1165 in_out.in1 = 0;
1171 1166
1172 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_IN_OUT_MAP, 1167 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_IN_OUT_MAP,
1173 &in_out, sizeof(in_out)); 1168 &in_out, sizeof(in_out));
1174 status = intel_sdvo_read_response(intel_encoder, NULL, 0); 1169 status = intel_sdvo_read_response(intel_sdvo, NULL, 0);
1175 1170
1176 if (sdvo_priv->is_hdmi) { 1171 if (intel_sdvo->is_hdmi) {
1177 intel_sdvo_set_avi_infoframe(intel_encoder, mode); 1172 intel_sdvo_set_avi_infoframe(intel_sdvo, mode);
1178 sdvox |= SDVO_AUDIO_ENABLE; 1173 sdvox |= SDVO_AUDIO_ENABLE;
1179 } 1174 }
1180 1175
1181 /* We have tried to get input timing in mode_fixup, and filled into 1176 /* We have tried to get input timing in mode_fixup, and filled into
1182 adjusted_mode */ 1177 adjusted_mode */
1183 if (sdvo_priv->is_tv || sdvo_priv->is_lvds) { 1178 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1184 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1179 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1185 input_dtd.part2.sdvo_flags = sdvo_priv->sdvo_flags; 1180 input_dtd.part2.sdvo_flags = intel_sdvo->sdvo_flags;
1186 } else 1181 } else
1187 intel_sdvo_get_dtd_from_mode(&input_dtd, mode); 1182 intel_sdvo_get_dtd_from_mode(&input_dtd, mode);
1188 1183
1189 /* If it's a TV, we already set the output timing in mode_fixup. 1184 /* If it's a TV, we already set the output timing in mode_fixup.
1190 * Otherwise, the output timing is equal to the input timing. 1185 * Otherwise, the output timing is equal to the input timing.
1191 */ 1186 */
1192 if (!sdvo_priv->is_tv && !sdvo_priv->is_lvds) { 1187 if (!intel_sdvo->is_tv && !intel_sdvo->is_lvds) {
1193 /* Set the output timing to the screen */ 1188 /* Set the output timing to the screen */
1194 intel_sdvo_set_target_output(intel_encoder, 1189 intel_sdvo_set_target_output(intel_sdvo,
1195 sdvo_priv->attached_output); 1190 intel_sdvo->attached_output);
1196 intel_sdvo_set_output_timing(intel_encoder, &input_dtd); 1191 intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1197 } 1192 }
1198 1193
1199 /* Set the input timing to the screen. Assume always input 0. */ 1194 /* Set the input timing to the screen. Assume always input 0. */
1200 intel_sdvo_set_target_input(intel_encoder, true, false); 1195 intel_sdvo_set_target_input(intel_sdvo, true, false);
1201 1196
1202 if (sdvo_priv->is_tv) 1197 if (intel_sdvo->is_tv)
1203 intel_sdvo_set_tv_format(intel_encoder); 1198 intel_sdvo_set_tv_format(intel_sdvo);
1204 1199
1205 /* We would like to use intel_sdvo_create_preferred_input_timing() to 1200 /* We would like to use intel_sdvo_create_preferred_input_timing() to
1206 * provide the device with a timing it can support, if it supports that 1201 * provide the device with a timing it can support, if it supports that
@@ -1217,20 +1212,20 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1217 intel_sdvo_set_input_timing(encoder, &input_dtd); 1212 intel_sdvo_set_input_timing(encoder, &input_dtd);
1218 } 1213 }
1219#else 1214#else
1220 intel_sdvo_set_input_timing(intel_encoder, &input_dtd); 1215 intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1221#endif 1216#endif
1222 1217
1223 switch (intel_sdvo_get_pixel_multiplier(mode)) { 1218 switch (intel_sdvo_get_pixel_multiplier(mode)) {
1224 case 1: 1219 case 1:
1225 intel_sdvo_set_clock_rate_mult(intel_encoder, 1220 intel_sdvo_set_clock_rate_mult(intel_sdvo,
1226 SDVO_CLOCK_RATE_MULT_1X); 1221 SDVO_CLOCK_RATE_MULT_1X);
1227 break; 1222 break;
1228 case 2: 1223 case 2:
1229 intel_sdvo_set_clock_rate_mult(intel_encoder, 1224 intel_sdvo_set_clock_rate_mult(intel_sdvo,
1230 SDVO_CLOCK_RATE_MULT_2X); 1225 SDVO_CLOCK_RATE_MULT_2X);
1231 break; 1226 break;
1232 case 4: 1227 case 4:
1233 intel_sdvo_set_clock_rate_mult(intel_encoder, 1228 intel_sdvo_set_clock_rate_mult(intel_sdvo,
1234 SDVO_CLOCK_RATE_MULT_4X); 1229 SDVO_CLOCK_RATE_MULT_4X);
1235 break; 1230 break;
1236 } 1231 }
@@ -1243,8 +1238,8 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1243 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 1238 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1244 sdvox |= SDVO_HSYNC_ACTIVE_HIGH; 1239 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1245 } else { 1240 } else {
1246 sdvox |= I915_READ(sdvo_priv->sdvo_reg); 1241 sdvox |= I915_READ(intel_sdvo->sdvo_reg);
1247 switch (sdvo_priv->sdvo_reg) { 1242 switch (intel_sdvo->sdvo_reg) {
1248 case SDVOB: 1243 case SDVOB:
1249 sdvox &= SDVOB_PRESERVE_MASK; 1244 sdvox &= SDVOB_PRESERVE_MASK;
1250 break; 1245 break;
@@ -1266,28 +1261,27 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1266 sdvox |= (sdvo_pixel_multiply - 1) << SDVO_PORT_MULTIPLY_SHIFT; 1261 sdvox |= (sdvo_pixel_multiply - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1267 } 1262 }
1268 1263
1269 if (sdvo_priv->sdvo_flags & SDVO_NEED_TO_STALL) 1264 if (intel_sdvo->sdvo_flags & SDVO_NEED_TO_STALL)
1270 sdvox |= SDVO_STALL_SELECT; 1265 sdvox |= SDVO_STALL_SELECT;
1271 intel_sdvo_write_sdvox(intel_encoder, sdvox); 1266 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1272} 1267}
1273 1268
1274static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) 1269static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1275{ 1270{
1276 struct drm_device *dev = encoder->dev; 1271 struct drm_device *dev = encoder->dev;
1277 struct drm_i915_private *dev_priv = dev->dev_private; 1272 struct drm_i915_private *dev_priv = dev->dev_private;
1278 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1273 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1279 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1280 u32 temp; 1274 u32 temp;
1281 1275
1282 if (mode != DRM_MODE_DPMS_ON) { 1276 if (mode != DRM_MODE_DPMS_ON) {
1283 intel_sdvo_set_active_outputs(intel_encoder, 0); 1277 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1284 if (0) 1278 if (0)
1285 intel_sdvo_set_encoder_power_state(intel_encoder, mode); 1279 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1286 1280
1287 if (mode == DRM_MODE_DPMS_OFF) { 1281 if (mode == DRM_MODE_DPMS_OFF) {
1288 temp = I915_READ(sdvo_priv->sdvo_reg); 1282 temp = I915_READ(intel_sdvo->sdvo_reg);
1289 if ((temp & SDVO_ENABLE) != 0) { 1283 if ((temp & SDVO_ENABLE) != 0) {
1290 intel_sdvo_write_sdvox(intel_encoder, temp & ~SDVO_ENABLE); 1284 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1291 } 1285 }
1292 } 1286 }
1293 } else { 1287 } else {
@@ -1295,13 +1289,13 @@ static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1295 int i; 1289 int i;
1296 u8 status; 1290 u8 status;
1297 1291
1298 temp = I915_READ(sdvo_priv->sdvo_reg); 1292 temp = I915_READ(intel_sdvo->sdvo_reg);
1299 if ((temp & SDVO_ENABLE) == 0) 1293 if ((temp & SDVO_ENABLE) == 0)
1300 intel_sdvo_write_sdvox(intel_encoder, temp | SDVO_ENABLE); 1294 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1301 for (i = 0; i < 2; i++) 1295 for (i = 0; i < 2; i++)
1302 intel_wait_for_vblank(dev); 1296 intel_wait_for_vblank(dev);
1303 1297
1304 status = intel_sdvo_get_trained_inputs(intel_encoder, &input1, 1298 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1,
1305 &input2); 1299 &input2);
1306 1300
1307 1301
@@ -1311,12 +1305,12 @@ static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1311 */ 1305 */
1312 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1306 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1313 DRM_DEBUG_KMS("First %s output reported failure to " 1307 DRM_DEBUG_KMS("First %s output reported failure to "
1314 "sync\n", SDVO_NAME(sdvo_priv)); 1308 "sync\n", SDVO_NAME(intel_sdvo));
1315 } 1309 }
1316 1310
1317 if (0) 1311 if (0)
1318 intel_sdvo_set_encoder_power_state(intel_encoder, mode); 1312 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1319 intel_sdvo_set_active_outputs(intel_encoder, sdvo_priv->attached_output); 1313 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1320 } 1314 }
1321 return; 1315 return;
1322} 1316}
@@ -1325,38 +1319,37 @@ static int intel_sdvo_mode_valid(struct drm_connector *connector,
1325 struct drm_display_mode *mode) 1319 struct drm_display_mode *mode)
1326{ 1320{
1327 struct drm_encoder *encoder = intel_attached_encoder(connector); 1321 struct drm_encoder *encoder = intel_attached_encoder(connector);
1328 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1322 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1329 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1330 1323
1331 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1324 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1332 return MODE_NO_DBLESCAN; 1325 return MODE_NO_DBLESCAN;
1333 1326
1334 if (sdvo_priv->pixel_clock_min > mode->clock) 1327 if (intel_sdvo->pixel_clock_min > mode->clock)
1335 return MODE_CLOCK_LOW; 1328 return MODE_CLOCK_LOW;
1336 1329
1337 if (sdvo_priv->pixel_clock_max < mode->clock) 1330 if (intel_sdvo->pixel_clock_max < mode->clock)
1338 return MODE_CLOCK_HIGH; 1331 return MODE_CLOCK_HIGH;
1339 1332
1340 if (sdvo_priv->is_lvds == true) { 1333 if (intel_sdvo->is_lvds == true) {
1341 if (sdvo_priv->sdvo_lvds_fixed_mode == NULL) 1334 if (intel_sdvo->sdvo_lvds_fixed_mode == NULL)
1342 return MODE_PANEL; 1335 return MODE_PANEL;
1343 1336
1344 if (mode->hdisplay > sdvo_priv->sdvo_lvds_fixed_mode->hdisplay) 1337 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1345 return MODE_PANEL; 1338 return MODE_PANEL;
1346 1339
1347 if (mode->vdisplay > sdvo_priv->sdvo_lvds_fixed_mode->vdisplay) 1340 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1348 return MODE_PANEL; 1341 return MODE_PANEL;
1349 } 1342 }
1350 1343
1351 return MODE_OK; 1344 return MODE_OK;
1352} 1345}
1353 1346
1354static bool intel_sdvo_get_capabilities(struct intel_encoder *intel_encoder, struct intel_sdvo_caps *caps) 1347static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1355{ 1348{
1356 u8 status; 1349 u8 status;
1357 1350
1358 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_DEVICE_CAPS, NULL, 0); 1351 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_DEVICE_CAPS, NULL, 0);
1359 status = intel_sdvo_read_response(intel_encoder, caps, sizeof(*caps)); 1352 status = intel_sdvo_read_response(intel_sdvo, caps, sizeof(*caps));
1360 if (status != SDVO_CMD_STATUS_SUCCESS) 1353 if (status != SDVO_CMD_STATUS_SUCCESS)
1361 return false; 1354 return false;
1362 1355
@@ -1368,12 +1361,12 @@ static bool intel_sdvo_get_capabilities(struct intel_encoder *intel_encoder, str
1368struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB) 1361struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1369{ 1362{
1370 struct drm_connector *connector = NULL; 1363 struct drm_connector *connector = NULL;
1371 struct intel_encoder *iout = NULL; 1364 struct intel_sdvo *iout = NULL;
1372 struct intel_sdvo_priv *sdvo; 1365 struct intel_sdvo *sdvo;
1373 1366
1374 /* find the sdvo connector */ 1367 /* find the sdvo connector */
1375 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 1368 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1376 iout = to_intel_encoder(connector); 1369 iout = to_intel_sdvo(connector);
1377 1370
1378 if (iout->type != INTEL_OUTPUT_SDVO) 1371 if (iout->type != INTEL_OUTPUT_SDVO)
1379 continue; 1372 continue;
@@ -1395,16 +1388,16 @@ int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1395{ 1388{
1396 u8 response[2]; 1389 u8 response[2];
1397 u8 status; 1390 u8 status;
1398 struct intel_encoder *intel_encoder; 1391 struct intel_sdvo *intel_sdvo;
1399 DRM_DEBUG_KMS("\n"); 1392 DRM_DEBUG_KMS("\n");
1400 1393
1401 if (!connector) 1394 if (!connector)
1402 return 0; 1395 return 0;
1403 1396
1404 intel_encoder = to_intel_encoder(connector); 1397 intel_sdvo = to_intel_sdvo(connector);
1405 1398
1406 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); 1399 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1407 status = intel_sdvo_read_response(intel_encoder, &response, 2); 1400 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1408 1401
1409 if (response[0] !=0) 1402 if (response[0] !=0)
1410 return 1; 1403 return 1;
@@ -1416,54 +1409,53 @@ void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1416{ 1409{
1417 u8 response[2]; 1410 u8 response[2];
1418 u8 status; 1411 u8 status;
1419 struct intel_encoder *intel_encoder = to_intel_encoder(connector); 1412 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1420 1413
1421 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); 1414 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1422 intel_sdvo_read_response(intel_encoder, &response, 2); 1415 intel_sdvo_read_response(intel_sdvo, &response, 2);
1423 1416
1424 if (on) { 1417 if (on) {
1425 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); 1418 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1426 status = intel_sdvo_read_response(intel_encoder, &response, 2); 1419 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1427 1420
1428 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); 1421 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1429 } else { 1422 } else {
1430 response[0] = 0; 1423 response[0] = 0;
1431 response[1] = 0; 1424 response[1] = 0;
1432 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); 1425 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1433 } 1426 }
1434 1427
1435 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); 1428 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1436 intel_sdvo_read_response(intel_encoder, &response, 2); 1429 intel_sdvo_read_response(intel_sdvo, &response, 2);
1437} 1430}
1438#endif 1431#endif
1439 1432
1440static bool 1433static bool
1441intel_sdvo_multifunc_encoder(struct intel_encoder *intel_encoder) 1434intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1442{ 1435{
1443 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1444 int caps = 0; 1436 int caps = 0;
1445 1437
1446 if (sdvo_priv->caps.output_flags & 1438 if (intel_sdvo->caps.output_flags &
1447 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) 1439 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1448 caps++; 1440 caps++;
1449 if (sdvo_priv->caps.output_flags & 1441 if (intel_sdvo->caps.output_flags &
1450 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)) 1442 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1451 caps++; 1443 caps++;
1452 if (sdvo_priv->caps.output_flags & 1444 if (intel_sdvo->caps.output_flags &
1453 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1)) 1445 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1454 caps++; 1446 caps++;
1455 if (sdvo_priv->caps.output_flags & 1447 if (intel_sdvo->caps.output_flags &
1456 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1)) 1448 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1457 caps++; 1449 caps++;
1458 if (sdvo_priv->caps.output_flags & 1450 if (intel_sdvo->caps.output_flags &
1459 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1)) 1451 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1460 caps++; 1452 caps++;
1461 1453
1462 if (sdvo_priv->caps.output_flags & 1454 if (intel_sdvo->caps.output_flags &
1463 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1)) 1455 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1464 caps++; 1456 caps++;
1465 1457
1466 if (sdvo_priv->caps.output_flags & 1458 if (intel_sdvo->caps.output_flags &
1467 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)) 1459 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1468 caps++; 1460 caps++;
1469 1461
@@ -1475,11 +1467,11 @@ intel_find_analog_connector(struct drm_device *dev)
1475{ 1467{
1476 struct drm_connector *connector; 1468 struct drm_connector *connector;
1477 struct drm_encoder *encoder; 1469 struct drm_encoder *encoder;
1478 struct intel_encoder *intel_encoder; 1470 struct intel_sdvo *intel_sdvo;
1479 1471
1480 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 1472 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1481 intel_encoder = enc_to_intel_encoder(encoder); 1473 intel_sdvo = enc_to_intel_sdvo(encoder);
1482 if (intel_encoder->type == INTEL_OUTPUT_ANALOG) { 1474 if (intel_sdvo->base.type == INTEL_OUTPUT_ANALOG) {
1483 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 1475 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1484 if (encoder == intel_attached_encoder(connector)) 1476 if (encoder == intel_attached_encoder(connector))
1485 return connector; 1477 return connector;
@@ -1509,46 +1501,45 @@ enum drm_connector_status
1509intel_sdvo_hdmi_sink_detect(struct drm_connector *connector) 1501intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1510{ 1502{
1511 struct drm_encoder *encoder = intel_attached_encoder(connector); 1503 struct drm_encoder *encoder = intel_attached_encoder(connector);
1512 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1504 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1513 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1514 struct intel_connector *intel_connector = to_intel_connector(connector); 1505 struct intel_connector *intel_connector = to_intel_connector(connector);
1515 struct intel_sdvo_connector *sdvo_connector = intel_connector->dev_priv; 1506 struct intel_sdvo_connector *sdvo_connector = intel_connector->dev_priv;
1516 enum drm_connector_status status = connector_status_connected; 1507 enum drm_connector_status status = connector_status_connected;
1517 struct edid *edid = NULL; 1508 struct edid *edid = NULL;
1518 1509
1519 edid = drm_get_edid(connector, intel_encoder->ddc_bus); 1510 edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus);
1520 1511
1521 /* This is only applied to SDVO cards with multiple outputs */ 1512 /* This is only applied to SDVO cards with multiple outputs */
1522 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_encoder)) { 1513 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1523 uint8_t saved_ddc, temp_ddc; 1514 uint8_t saved_ddc, temp_ddc;
1524 saved_ddc = sdvo_priv->ddc_bus; 1515 saved_ddc = intel_sdvo->ddc_bus;
1525 temp_ddc = sdvo_priv->ddc_bus >> 1; 1516 temp_ddc = intel_sdvo->ddc_bus >> 1;
1526 /* 1517 /*
1527 * Don't use the 1 as the argument of DDC bus switch to get 1518 * Don't use the 1 as the argument of DDC bus switch to get
1528 * the EDID. It is used for SDVO SPD ROM. 1519 * the EDID. It is used for SDVO SPD ROM.
1529 */ 1520 */
1530 while(temp_ddc > 1) { 1521 while(temp_ddc > 1) {
1531 sdvo_priv->ddc_bus = temp_ddc; 1522 intel_sdvo->ddc_bus = temp_ddc;
1532 edid = drm_get_edid(connector, intel_encoder->ddc_bus); 1523 edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus);
1533 if (edid) { 1524 if (edid) {
1534 /* 1525 /*
1535 * When we can get the EDID, maybe it is the 1526 * When we can get the EDID, maybe it is the
1536 * correct DDC bus. Update it. 1527 * correct DDC bus. Update it.
1537 */ 1528 */
1538 sdvo_priv->ddc_bus = temp_ddc; 1529 intel_sdvo->ddc_bus = temp_ddc;
1539 break; 1530 break;
1540 } 1531 }
1541 temp_ddc >>= 1; 1532 temp_ddc >>= 1;
1542 } 1533 }
1543 if (edid == NULL) 1534 if (edid == NULL)
1544 sdvo_priv->ddc_bus = saved_ddc; 1535 intel_sdvo->ddc_bus = saved_ddc;
1545 } 1536 }
1546 /* when there is no edid and no monitor is connected with VGA 1537 /* when there is no edid and no monitor is connected with VGA
1547 * port, try to use the CRT ddc to read the EDID for DVI-connector 1538 * port, try to use the CRT ddc to read the EDID for DVI-connector
1548 */ 1539 */
1549 if (edid == NULL && sdvo_priv->analog_ddc_bus && 1540 if (edid == NULL && intel_sdvo->analog_ddc_bus &&
1550 !intel_analog_is_connected(connector->dev)) 1541 !intel_analog_is_connected(connector->dev))
1551 edid = drm_get_edid(connector, sdvo_priv->analog_ddc_bus); 1542 edid = drm_get_edid(connector, intel_sdvo->analog_ddc_bus);
1552 1543
1553 if (edid != NULL) { 1544 if (edid != NULL) {
1554 bool is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1545 bool is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
@@ -1556,7 +1547,7 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1556 1547
1557 /* DDC bus is shared, match EDID to connector type */ 1548 /* DDC bus is shared, match EDID to connector type */
1558 if (is_digital && need_digital) 1549 if (is_digital && need_digital)
1559 sdvo_priv->is_hdmi = drm_detect_hdmi_monitor(edid); 1550 intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
1560 else if (is_digital != need_digital) 1551 else if (is_digital != need_digital)
1561 status = connector_status_disconnected; 1552 status = connector_status_disconnected;
1562 1553
@@ -1574,19 +1565,18 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect
1574 uint16_t response; 1565 uint16_t response;
1575 u8 status; 1566 u8 status;
1576 struct drm_encoder *encoder = intel_attached_encoder(connector); 1567 struct drm_encoder *encoder = intel_attached_encoder(connector);
1577 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1568 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1578 struct intel_connector *intel_connector = to_intel_connector(connector); 1569 struct intel_connector *intel_connector = to_intel_connector(connector);
1579 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1580 struct intel_sdvo_connector *sdvo_connector = intel_connector->dev_priv; 1570 struct intel_sdvo_connector *sdvo_connector = intel_connector->dev_priv;
1581 enum drm_connector_status ret; 1571 enum drm_connector_status ret;
1582 1572
1583 intel_sdvo_write_cmd(intel_encoder, 1573 intel_sdvo_write_cmd(intel_sdvo,
1584 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0); 1574 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0);
1585 if (sdvo_priv->is_tv) { 1575 if (intel_sdvo->is_tv) {
1586 /* add 30ms delay when the output type is SDVO-TV */ 1576 /* add 30ms delay when the output type is SDVO-TV */
1587 mdelay(30); 1577 mdelay(30);
1588 } 1578 }
1589 status = intel_sdvo_read_response(intel_encoder, &response, 2); 1579 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1590 1580
1591 DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8); 1581 DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8);
1592 1582
@@ -1596,7 +1586,7 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect
1596 if (response == 0) 1586 if (response == 0)
1597 return connector_status_disconnected; 1587 return connector_status_disconnected;
1598 1588
1599 sdvo_priv->attached_output = response; 1589 intel_sdvo->attached_output = response;
1600 1590
1601 if ((sdvo_connector->output_flag & response) == 0) 1591 if ((sdvo_connector->output_flag & response) == 0)
1602 ret = connector_status_disconnected; 1592 ret = connector_status_disconnected;
@@ -1607,16 +1597,16 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect
1607 1597
1608 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1598 /* May update encoder flag for like clock for SDVO TV, etc.*/
1609 if (ret == connector_status_connected) { 1599 if (ret == connector_status_connected) {
1610 sdvo_priv->is_tv = false; 1600 intel_sdvo->is_tv = false;
1611 sdvo_priv->is_lvds = false; 1601 intel_sdvo->is_lvds = false;
1612 intel_encoder->needs_tv_clock = false; 1602 intel_sdvo->base.needs_tv_clock = false;
1613 1603
1614 if (response & SDVO_TV_MASK) { 1604 if (response & SDVO_TV_MASK) {
1615 sdvo_priv->is_tv = true; 1605 intel_sdvo->is_tv = true;
1616 intel_encoder->needs_tv_clock = true; 1606 intel_sdvo->base.needs_tv_clock = true;
1617 } 1607 }
1618 if (response & SDVO_LVDS_MASK) 1608 if (response & SDVO_LVDS_MASK)
1619 sdvo_priv->is_lvds = true; 1609 intel_sdvo->is_lvds = true;
1620 } 1610 }
1621 1611
1622 return ret; 1612 return ret;
@@ -1625,12 +1615,11 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect
1625static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1615static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1626{ 1616{
1627 struct drm_encoder *encoder = intel_attached_encoder(connector); 1617 struct drm_encoder *encoder = intel_attached_encoder(connector);
1628 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1618 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1629 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1630 int num_modes; 1619 int num_modes;
1631 1620
1632 /* set the bus switch and get the modes */ 1621 /* set the bus switch and get the modes */
1633 num_modes = intel_ddc_get_modes(connector, intel_encoder->ddc_bus); 1622 num_modes = intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus);
1634 1623
1635 /* 1624 /*
1636 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1625 * Mac mini hack. On this device, the DVI-I connector shares one DDC
@@ -1639,11 +1628,11 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1639 * which case we'll look there for the digital DDC data. 1628 * which case we'll look there for the digital DDC data.
1640 */ 1629 */
1641 if (num_modes == 0 && 1630 if (num_modes == 0 &&
1642 sdvo_priv->analog_ddc_bus && 1631 intel_sdvo->analog_ddc_bus &&
1643 !intel_analog_is_connected(connector->dev)) { 1632 !intel_analog_is_connected(connector->dev)) {
1644 /* Switch to the analog ddc bus and try that 1633 /* Switch to the analog ddc bus and try that
1645 */ 1634 */
1646 (void) intel_ddc_get_modes(connector, sdvo_priv->analog_ddc_bus); 1635 (void) intel_ddc_get_modes(connector, intel_sdvo->analog_ddc_bus);
1647 } 1636 }
1648} 1637}
1649 1638
@@ -1715,8 +1704,7 @@ struct drm_display_mode sdvo_tv_modes[] = {
1715static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 1704static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1716{ 1705{
1717 struct drm_encoder *encoder = intel_attached_encoder(connector); 1706 struct drm_encoder *encoder = intel_attached_encoder(connector);
1718 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1707 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1719 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1720 struct intel_sdvo_sdtv_resolution_request tv_res; 1708 struct intel_sdvo_sdtv_resolution_request tv_res;
1721 uint32_t reply = 0, format_map = 0; 1709 uint32_t reply = 0, format_map = 0;
1722 int i; 1710 int i;
@@ -1727,7 +1715,7 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1727 * format. 1715 * format.
1728 */ 1716 */
1729 for (i = 0; i < TV_FORMAT_NUM; i++) 1717 for (i = 0; i < TV_FORMAT_NUM; i++)
1730 if (tv_format_names[i] == sdvo_priv->tv_format_name) 1718 if (tv_format_names[i] == intel_sdvo->tv_format_name)
1731 break; 1719 break;
1732 1720
1733 format_map = (1 << i); 1721 format_map = (1 << i);
@@ -1736,11 +1724,11 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1736 sizeof(format_map) ? sizeof(format_map) : 1724 sizeof(format_map) ? sizeof(format_map) :
1737 sizeof(struct intel_sdvo_sdtv_resolution_request)); 1725 sizeof(struct intel_sdvo_sdtv_resolution_request));
1738 1726
1739 intel_sdvo_set_target_output(intel_encoder, sdvo_priv->attached_output); 1727 intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output);
1740 1728
1741 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1729 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1742 &tv_res, sizeof(tv_res)); 1730 &tv_res, sizeof(tv_res));
1743 status = intel_sdvo_read_response(intel_encoder, &reply, 3); 1731 status = intel_sdvo_read_response(intel_sdvo, &reply, 3);
1744 if (status != SDVO_CMD_STATUS_SUCCESS) 1732 if (status != SDVO_CMD_STATUS_SUCCESS)
1745 return; 1733 return;
1746 1734
@@ -1758,9 +1746,8 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1758static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1746static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1759{ 1747{
1760 struct drm_encoder *encoder = intel_attached_encoder(connector); 1748 struct drm_encoder *encoder = intel_attached_encoder(connector);
1761 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1749 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1762 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1750 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1763 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1764 struct drm_display_mode *newmode; 1751 struct drm_display_mode *newmode;
1765 1752
1766 /* 1753 /*
@@ -1768,7 +1755,7 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1768 * Assume that the preferred modes are 1755 * Assume that the preferred modes are
1769 * arranged in priority order. 1756 * arranged in priority order.
1770 */ 1757 */
1771 intel_ddc_get_modes(connector, intel_encoder->ddc_bus); 1758 intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus);
1772 if (list_empty(&connector->probed_modes) == false) 1759 if (list_empty(&connector->probed_modes) == false)
1773 goto end; 1760 goto end;
1774 1761
@@ -1787,7 +1774,7 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1787end: 1774end:
1788 list_for_each_entry(newmode, &connector->probed_modes, head) { 1775 list_for_each_entry(newmode, &connector->probed_modes, head) {
1789 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1776 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1790 sdvo_priv->sdvo_lvds_fixed_mode = 1777 intel_sdvo->sdvo_lvds_fixed_mode =
1791 drm_mode_duplicate(connector->dev, newmode); 1778 drm_mode_duplicate(connector->dev, newmode);
1792 break; 1779 break;
1793 } 1780 }
@@ -1816,35 +1803,35 @@ static
1816void intel_sdvo_destroy_enhance_property(struct drm_connector *connector) 1803void intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1817{ 1804{
1818 struct intel_connector *intel_connector = to_intel_connector(connector); 1805 struct intel_connector *intel_connector = to_intel_connector(connector);
1819 struct intel_sdvo_connector *sdvo_priv = intel_connector->dev_priv; 1806 struct intel_sdvo_connector *intel_sdvo = intel_connector->dev_priv;
1820 struct drm_device *dev = connector->dev; 1807 struct drm_device *dev = connector->dev;
1821 1808
1822 if (IS_TV(sdvo_priv)) { 1809 if (IS_TV(intel_sdvo)) {
1823 if (sdvo_priv->left_property) 1810 if (intel_sdvo->left_property)
1824 drm_property_destroy(dev, sdvo_priv->left_property); 1811 drm_property_destroy(dev, intel_sdvo->left_property);
1825 if (sdvo_priv->right_property) 1812 if (intel_sdvo->right_property)
1826 drm_property_destroy(dev, sdvo_priv->right_property); 1813 drm_property_destroy(dev, intel_sdvo->right_property);
1827 if (sdvo_priv->top_property) 1814 if (intel_sdvo->top_property)
1828 drm_property_destroy(dev, sdvo_priv->top_property); 1815 drm_property_destroy(dev, intel_sdvo->top_property);
1829 if (sdvo_priv->bottom_property) 1816 if (intel_sdvo->bottom_property)
1830 drm_property_destroy(dev, sdvo_priv->bottom_property); 1817 drm_property_destroy(dev, intel_sdvo->bottom_property);
1831 if (sdvo_priv->hpos_property) 1818 if (intel_sdvo->hpos_property)
1832 drm_property_destroy(dev, sdvo_priv->hpos_property); 1819 drm_property_destroy(dev, intel_sdvo->hpos_property);
1833 if (sdvo_priv->vpos_property) 1820 if (intel_sdvo->vpos_property)
1834 drm_property_destroy(dev, sdvo_priv->vpos_property); 1821 drm_property_destroy(dev, intel_sdvo->vpos_property);
1835 if (sdvo_priv->saturation_property) 1822 if (intel_sdvo->saturation_property)
1836 drm_property_destroy(dev, 1823 drm_property_destroy(dev,
1837 sdvo_priv->saturation_property); 1824 intel_sdvo->saturation_property);
1838 if (sdvo_priv->contrast_property) 1825 if (intel_sdvo->contrast_property)
1839 drm_property_destroy(dev, 1826 drm_property_destroy(dev,
1840 sdvo_priv->contrast_property); 1827 intel_sdvo->contrast_property);
1841 if (sdvo_priv->hue_property) 1828 if (intel_sdvo->hue_property)
1842 drm_property_destroy(dev, sdvo_priv->hue_property); 1829 drm_property_destroy(dev, intel_sdvo->hue_property);
1843 } 1830 }
1844 if (IS_TV(sdvo_priv) || IS_LVDS(sdvo_priv)) { 1831 if (IS_TV(intel_sdvo) || IS_LVDS(intel_sdvo)) {
1845 if (sdvo_priv->brightness_property) 1832 if (intel_sdvo->brightness_property)
1846 drm_property_destroy(dev, 1833 drm_property_destroy(dev,
1847 sdvo_priv->brightness_property); 1834 intel_sdvo->brightness_property);
1848 } 1835 }
1849 return; 1836 return;
1850} 1837}
@@ -1870,8 +1857,7 @@ intel_sdvo_set_property(struct drm_connector *connector,
1870 uint64_t val) 1857 uint64_t val)
1871{ 1858{
1872 struct drm_encoder *encoder = intel_attached_encoder(connector); 1859 struct drm_encoder *encoder = intel_attached_encoder(connector);
1873 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1860 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1874 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1875 struct intel_connector *intel_connector = to_intel_connector(connector); 1861 struct intel_connector *intel_connector = to_intel_connector(connector);
1876 struct intel_sdvo_connector *sdvo_connector = intel_connector->dev_priv; 1862 struct intel_sdvo_connector *sdvo_connector = intel_connector->dev_priv;
1877 struct drm_crtc *crtc = encoder->crtc; 1863 struct drm_crtc *crtc = encoder->crtc;
@@ -1889,11 +1875,11 @@ intel_sdvo_set_property(struct drm_connector *connector,
1889 ret = -EINVAL; 1875 ret = -EINVAL;
1890 goto out; 1876 goto out;
1891 } 1877 }
1892 if (sdvo_priv->tv_format_name == 1878 if (intel_sdvo->tv_format_name ==
1893 sdvo_connector->tv_format_supported[val]) 1879 sdvo_connector->tv_format_supported[val])
1894 goto out; 1880 goto out;
1895 1881
1896 sdvo_priv->tv_format_name = sdvo_connector->tv_format_supported[val]; 1882 intel_sdvo->tv_format_name = sdvo_connector->tv_format_supported[val];
1897 changed = true; 1883 changed = true;
1898 } 1884 }
1899 1885
@@ -1981,8 +1967,8 @@ intel_sdvo_set_property(struct drm_connector *connector,
1981 sdvo_connector->cur_brightness = temp_value; 1967 sdvo_connector->cur_brightness = temp_value;
1982 } 1968 }
1983 if (cmd) { 1969 if (cmd) {
1984 intel_sdvo_write_cmd(intel_encoder, cmd, &temp_value, 2); 1970 intel_sdvo_write_cmd(intel_sdvo, cmd, &temp_value, 2);
1985 status = intel_sdvo_read_response(intel_encoder, 1971 status = intel_sdvo_read_response(intel_sdvo,
1986 NULL, 0); 1972 NULL, 0);
1987 if (status != SDVO_CMD_STATUS_SUCCESS) { 1973 if (status != SDVO_CMD_STATUS_SUCCESS) {
1988 DRM_DEBUG_KMS("Incorrect SDVO command \n"); 1974 DRM_DEBUG_KMS("Incorrect SDVO command \n");
@@ -2022,22 +2008,16 @@ static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
2022 2008
2023static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 2009static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2024{ 2010{
2025 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 2011 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
2026 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
2027 2012
2028 if (intel_encoder->i2c_bus) 2013 if (intel_sdvo->analog_ddc_bus)
2029 intel_i2c_destroy(intel_encoder->i2c_bus); 2014 intel_i2c_destroy(intel_sdvo->analog_ddc_bus);
2030 if (intel_encoder->ddc_bus)
2031 intel_i2c_destroy(intel_encoder->ddc_bus);
2032 if (sdvo_priv->analog_ddc_bus)
2033 intel_i2c_destroy(sdvo_priv->analog_ddc_bus);
2034 2015
2035 if (sdvo_priv->sdvo_lvds_fixed_mode != NULL) 2016 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2036 drm_mode_destroy(encoder->dev, 2017 drm_mode_destroy(encoder->dev,
2037 sdvo_priv->sdvo_lvds_fixed_mode); 2018 intel_sdvo->sdvo_lvds_fixed_mode);
2038 2019
2039 drm_encoder_cleanup(encoder); 2020 intel_encoder_destroy(encoder);
2040 kfree(intel_encoder);
2041} 2021}
2042 2022
2043static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 2023static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
@@ -2054,7 +2034,7 @@ static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2054 */ 2034 */
2055static void 2035static void
2056intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 2036intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2057 struct intel_sdvo_priv *sdvo, u32 reg) 2037 struct intel_sdvo *sdvo, u32 reg)
2058{ 2038{
2059 struct sdvo_device_mapping *mapping; 2039 struct sdvo_device_mapping *mapping;
2060 2040
@@ -2067,57 +2047,54 @@ intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2067} 2047}
2068 2048
2069static bool 2049static bool
2070intel_sdvo_get_digital_encoding_mode(struct intel_encoder *output, int device) 2050intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
2071{ 2051{
2072 struct intel_sdvo_priv *sdvo_priv = output->dev_priv;
2073 uint8_t status; 2052 uint8_t status;
2074 2053
2075 if (device == 0) 2054 if (device == 0)
2076 intel_sdvo_set_target_output(output, SDVO_OUTPUT_TMDS0); 2055 intel_sdvo_set_target_output(intel_sdvo, SDVO_OUTPUT_TMDS0);
2077 else 2056 else
2078 intel_sdvo_set_target_output(output, SDVO_OUTPUT_TMDS1); 2057 intel_sdvo_set_target_output(intel_sdvo, SDVO_OUTPUT_TMDS1);
2079 2058
2080 intel_sdvo_write_cmd(output, SDVO_CMD_GET_ENCODE, NULL, 0); 2059 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ENCODE, NULL, 0);
2081 status = intel_sdvo_read_response(output, &sdvo_priv->is_hdmi, 1); 2060 status = intel_sdvo_read_response(intel_sdvo, &intel_sdvo->is_hdmi, 1);
2082 if (status != SDVO_CMD_STATUS_SUCCESS) 2061 if (status != SDVO_CMD_STATUS_SUCCESS)
2083 return false; 2062 return false;
2084 return true; 2063 return true;
2085} 2064}
2086 2065
2087static struct intel_encoder * 2066static struct intel_sdvo *
2088intel_sdvo_chan_to_intel_encoder(struct intel_i2c_chan *chan) 2067intel_sdvo_chan_to_intel_sdvo(struct intel_i2c_chan *chan)
2089{ 2068{
2090 struct drm_device *dev = chan->drm_dev; 2069 struct drm_device *dev = chan->drm_dev;
2091 struct drm_encoder *encoder; 2070 struct drm_encoder *encoder;
2092 struct intel_encoder *intel_encoder = NULL;
2093 2071
2094 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 2072 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
2095 intel_encoder = enc_to_intel_encoder(encoder); 2073 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
2096 if (intel_encoder->ddc_bus == &chan->adapter) 2074 if (intel_sdvo->base.ddc_bus == &chan->adapter)
2097 break; 2075 return intel_sdvo;
2098 } 2076 }
2099 return intel_encoder; 2077
2078 return NULL;;
2100} 2079}
2101 2080
2102static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap, 2081static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
2103 struct i2c_msg msgs[], int num) 2082 struct i2c_msg msgs[], int num)
2104{ 2083{
2105 struct intel_encoder *intel_encoder; 2084 struct intel_sdvo *intel_sdvo;
2106 struct intel_sdvo_priv *sdvo_priv;
2107 struct i2c_algo_bit_data *algo_data; 2085 struct i2c_algo_bit_data *algo_data;
2108 const struct i2c_algorithm *algo; 2086 const struct i2c_algorithm *algo;
2109 2087
2110 algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data; 2088 algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data;
2111 intel_encoder = 2089 intel_sdvo =
2112 intel_sdvo_chan_to_intel_encoder( 2090 intel_sdvo_chan_to_intel_sdvo((struct intel_i2c_chan *)
2113 (struct intel_i2c_chan *)(algo_data->data)); 2091 (algo_data->data));
2114 if (intel_encoder == NULL) 2092 if (intel_sdvo == NULL)
2115 return -EINVAL; 2093 return -EINVAL;
2116 2094
2117 sdvo_priv = intel_encoder->dev_priv; 2095 algo = intel_sdvo->base.i2c_bus->algo;
2118 algo = intel_encoder->i2c_bus->algo;
2119 2096
2120 intel_sdvo_set_control_bus_switch(intel_encoder, sdvo_priv->ddc_bus); 2097 intel_sdvo_set_control_bus_switch(intel_sdvo, intel_sdvo->ddc_bus);
2121 return algo->master_xfer(i2c_adap, msgs, num); 2098 return algo->master_xfer(i2c_adap, msgs, num);
2122} 2099}
2123 2100
@@ -2198,10 +2175,9 @@ intel_sdvo_connector_create (struct drm_encoder *encoder,
2198} 2175}
2199 2176
2200static bool 2177static bool
2201intel_sdvo_dvi_init(struct intel_encoder *intel_encoder, int device) 2178intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2202{ 2179{
2203 struct drm_encoder *encoder = &intel_encoder->enc; 2180 struct drm_encoder *encoder = &intel_sdvo->base.enc;
2204 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
2205 struct drm_connector *connector; 2181 struct drm_connector *connector;
2206 struct intel_connector *intel_connector; 2182 struct intel_connector *intel_connector;
2207 struct intel_sdvo_connector *sdvo_connector; 2183 struct intel_sdvo_connector *sdvo_connector;
@@ -2212,10 +2188,10 @@ intel_sdvo_dvi_init(struct intel_encoder *intel_encoder, int device)
2212 sdvo_connector = intel_connector->dev_priv; 2188 sdvo_connector = intel_connector->dev_priv;
2213 2189
2214 if (device == 0) { 2190 if (device == 0) {
2215 sdvo_priv->controlled_output |= SDVO_OUTPUT_TMDS0; 2191 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2216 sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2192 sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2217 } else if (device == 1) { 2193 } else if (device == 1) {
2218 sdvo_priv->controlled_output |= SDVO_OUTPUT_TMDS1; 2194 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2219 sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2195 sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2220 } 2196 }
2221 2197
@@ -2224,17 +2200,17 @@ intel_sdvo_dvi_init(struct intel_encoder *intel_encoder, int device)
2224 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2200 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2225 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2201 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2226 2202
2227 if (intel_sdvo_get_supp_encode(intel_encoder, &sdvo_priv->encode) 2203 if (intel_sdvo_get_supp_encode(intel_sdvo, &intel_sdvo->encode)
2228 && intel_sdvo_get_digital_encoding_mode(intel_encoder, device) 2204 && intel_sdvo_get_digital_encoding_mode(intel_sdvo, device)
2229 && sdvo_priv->is_hdmi) { 2205 && intel_sdvo->is_hdmi) {
2230 /* enable hdmi encoding mode if supported */ 2206 /* enable hdmi encoding mode if supported */
2231 intel_sdvo_set_encode(intel_encoder, SDVO_ENCODE_HDMI); 2207 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2232 intel_sdvo_set_colorimetry(intel_encoder, 2208 intel_sdvo_set_colorimetry(intel_sdvo,
2233 SDVO_COLORIMETRY_RGB256); 2209 SDVO_COLORIMETRY_RGB256);
2234 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2210 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2235 } 2211 }
2236 intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2212 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2237 (1 << INTEL_ANALOG_CLONE_BIT); 2213 (1 << INTEL_ANALOG_CLONE_BIT));
2238 2214
2239 intel_sdvo_connector_create(encoder, connector); 2215 intel_sdvo_connector_create(encoder, connector);
2240 2216
@@ -2242,10 +2218,9 @@ intel_sdvo_dvi_init(struct intel_encoder *intel_encoder, int device)
2242} 2218}
2243 2219
2244static bool 2220static bool
2245intel_sdvo_tv_init(struct intel_encoder *intel_encoder, int type) 2221intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2246{ 2222{
2247 struct drm_encoder *encoder = &intel_encoder->enc; 2223 struct drm_encoder *encoder = &intel_sdvo->base.enc;
2248 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
2249 struct drm_connector *connector; 2224 struct drm_connector *connector;
2250 struct intel_connector *intel_connector; 2225 struct intel_connector *intel_connector;
2251 struct intel_sdvo_connector *sdvo_connector; 2226 struct intel_sdvo_connector *sdvo_connector;
@@ -2258,12 +2233,12 @@ intel_sdvo_tv_init(struct intel_encoder *intel_encoder, int type)
2258 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2233 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2259 sdvo_connector = intel_connector->dev_priv; 2234 sdvo_connector = intel_connector->dev_priv;
2260 2235
2261 sdvo_priv->controlled_output |= type; 2236 intel_sdvo->controlled_output |= type;
2262 sdvo_connector->output_flag = type; 2237 sdvo_connector->output_flag = type;
2263 2238
2264 sdvo_priv->is_tv = true; 2239 intel_sdvo->is_tv = true;
2265 intel_encoder->needs_tv_clock = true; 2240 intel_sdvo->base.needs_tv_clock = true;
2266 intel_encoder->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; 2241 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2267 2242
2268 intel_sdvo_connector_create(encoder, connector); 2243 intel_sdvo_connector_create(encoder, connector);
2269 2244
@@ -2275,10 +2250,9 @@ intel_sdvo_tv_init(struct intel_encoder *intel_encoder, int type)
2275} 2250}
2276 2251
2277static bool 2252static bool
2278intel_sdvo_analog_init(struct intel_encoder *intel_encoder, int device) 2253intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2279{ 2254{
2280 struct drm_encoder *encoder = &intel_encoder->enc; 2255 struct drm_encoder *encoder = &intel_sdvo->base.enc;
2281 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
2282 struct drm_connector *connector; 2256 struct drm_connector *connector;
2283 struct intel_connector *intel_connector; 2257 struct intel_connector *intel_connector;
2284 struct intel_sdvo_connector *sdvo_connector; 2258 struct intel_sdvo_connector *sdvo_connector;
@@ -2293,25 +2267,24 @@ intel_sdvo_analog_init(struct intel_encoder *intel_encoder, int device)
2293 sdvo_connector = intel_connector->dev_priv; 2267 sdvo_connector = intel_connector->dev_priv;
2294 2268
2295 if (device == 0) { 2269 if (device == 0) {
2296 sdvo_priv->controlled_output |= SDVO_OUTPUT_RGB0; 2270 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2297 sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2271 sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2298 } else if (device == 1) { 2272 } else if (device == 1) {
2299 sdvo_priv->controlled_output |= SDVO_OUTPUT_RGB1; 2273 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2300 sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2274 sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2301 } 2275 }
2302 2276
2303 intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2277 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2304 (1 << INTEL_ANALOG_CLONE_BIT); 2278 (1 << INTEL_ANALOG_CLONE_BIT));
2305 2279
2306 intel_sdvo_connector_create(encoder, connector); 2280 intel_sdvo_connector_create(encoder, connector);
2307 return true; 2281 return true;
2308} 2282}
2309 2283
2310static bool 2284static bool
2311intel_sdvo_lvds_init(struct intel_encoder *intel_encoder, int device) 2285intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2312{ 2286{
2313 struct drm_encoder *encoder = &intel_encoder->enc; 2287 struct drm_encoder *encoder = &intel_sdvo->base.enc;
2314 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
2315 struct drm_connector *connector; 2288 struct drm_connector *connector;
2316 struct intel_connector *intel_connector; 2289 struct intel_connector *intel_connector;
2317 struct intel_sdvo_connector *sdvo_connector; 2290 struct intel_sdvo_connector *sdvo_connector;
@@ -2324,18 +2297,18 @@ intel_sdvo_lvds_init(struct intel_encoder *intel_encoder, int device)
2324 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2297 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2325 sdvo_connector = intel_connector->dev_priv; 2298 sdvo_connector = intel_connector->dev_priv;
2326 2299
2327 sdvo_priv->is_lvds = true; 2300 intel_sdvo->is_lvds = true;
2328 2301
2329 if (device == 0) { 2302 if (device == 0) {
2330 sdvo_priv->controlled_output |= SDVO_OUTPUT_LVDS0; 2303 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2331 sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2304 sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2332 } else if (device == 1) { 2305 } else if (device == 1) {
2333 sdvo_priv->controlled_output |= SDVO_OUTPUT_LVDS1; 2306 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2334 sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2307 sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2335 } 2308 }
2336 2309
2337 intel_encoder->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | 2310 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2338 (1 << INTEL_SDVO_LVDS_CLONE_BIT); 2311 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2339 2312
2340 intel_sdvo_connector_create(encoder, connector); 2313 intel_sdvo_connector_create(encoder, connector);
2341 intel_sdvo_create_enhance_property(connector); 2314 intel_sdvo_create_enhance_property(connector);
@@ -2343,60 +2316,58 @@ intel_sdvo_lvds_init(struct intel_encoder *intel_encoder, int device)
2343} 2316}
2344 2317
2345static bool 2318static bool
2346intel_sdvo_output_setup(struct intel_encoder *intel_encoder, uint16_t flags) 2319intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2347{ 2320{
2348 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; 2321 intel_sdvo->is_tv = false;
2349 2322 intel_sdvo->base.needs_tv_clock = false;
2350 sdvo_priv->is_tv = false; 2323 intel_sdvo->is_lvds = false;
2351 intel_encoder->needs_tv_clock = false;
2352 sdvo_priv->is_lvds = false;
2353 2324
2354 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2325 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2355 2326
2356 if (flags & SDVO_OUTPUT_TMDS0) 2327 if (flags & SDVO_OUTPUT_TMDS0)
2357 if (!intel_sdvo_dvi_init(intel_encoder, 0)) 2328 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2358 return false; 2329 return false;
2359 2330
2360 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2331 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2361 if (!intel_sdvo_dvi_init(intel_encoder, 1)) 2332 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2362 return false; 2333 return false;
2363 2334
2364 /* TV has no XXX1 function block */ 2335 /* TV has no XXX1 function block */
2365 if (flags & SDVO_OUTPUT_SVID0) 2336 if (flags & SDVO_OUTPUT_SVID0)
2366 if (!intel_sdvo_tv_init(intel_encoder, SDVO_OUTPUT_SVID0)) 2337 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2367 return false; 2338 return false;
2368 2339
2369 if (flags & SDVO_OUTPUT_CVBS0) 2340 if (flags & SDVO_OUTPUT_CVBS0)
2370 if (!intel_sdvo_tv_init(intel_encoder, SDVO_OUTPUT_CVBS0)) 2341 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2371 return false; 2342 return false;
2372 2343
2373 if (flags & SDVO_OUTPUT_RGB0) 2344 if (flags & SDVO_OUTPUT_RGB0)
2374 if (!intel_sdvo_analog_init(intel_encoder, 0)) 2345 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2375 return false; 2346 return false;
2376 2347
2377 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2348 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2378 if (!intel_sdvo_analog_init(intel_encoder, 1)) 2349 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2379 return false; 2350 return false;
2380 2351
2381 if (flags & SDVO_OUTPUT_LVDS0) 2352 if (flags & SDVO_OUTPUT_LVDS0)
2382 if (!intel_sdvo_lvds_init(intel_encoder, 0)) 2353 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2383 return false; 2354 return false;
2384 2355
2385 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2356 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2386 if (!intel_sdvo_lvds_init(intel_encoder, 1)) 2357 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2387 return false; 2358 return false;
2388 2359
2389 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2360 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2390 unsigned char bytes[2]; 2361 unsigned char bytes[2];
2391 2362
2392 sdvo_priv->controlled_output = 0; 2363 intel_sdvo->controlled_output = 0;
2393 memcpy(bytes, &sdvo_priv->caps.output_flags, 2); 2364 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2394 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2365 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2395 SDVO_NAME(sdvo_priv), 2366 SDVO_NAME(intel_sdvo),
2396 bytes[0], bytes[1]); 2367 bytes[0], bytes[1]);
2397 return false; 2368 return false;
2398 } 2369 }
2399 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 2370 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2400 2371
2401 return true; 2372 return true;
2402} 2373}
@@ -2404,19 +2375,18 @@ intel_sdvo_output_setup(struct intel_encoder *intel_encoder, uint16_t flags)
2404static void intel_sdvo_tv_create_property(struct drm_connector *connector, int type) 2375static void intel_sdvo_tv_create_property(struct drm_connector *connector, int type)
2405{ 2376{
2406 struct drm_encoder *encoder = intel_attached_encoder(connector); 2377 struct drm_encoder *encoder = intel_attached_encoder(connector);
2407 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 2378 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
2408 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
2409 struct intel_connector *intel_connector = to_intel_connector(connector); 2379 struct intel_connector *intel_connector = to_intel_connector(connector);
2410 struct intel_sdvo_connector *sdvo_connector = intel_connector->dev_priv; 2380 struct intel_sdvo_connector *sdvo_connector = intel_connector->dev_priv;
2411 struct intel_sdvo_tv_format format; 2381 struct intel_sdvo_tv_format format;
2412 uint32_t format_map, i; 2382 uint32_t format_map, i;
2413 uint8_t status; 2383 uint8_t status;
2414 2384
2415 intel_sdvo_set_target_output(intel_encoder, type); 2385 intel_sdvo_set_target_output(intel_sdvo, type);
2416 2386
2417 intel_sdvo_write_cmd(intel_encoder, 2387 intel_sdvo_write_cmd(intel_sdvo,
2418 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, NULL, 0); 2388 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, NULL, 0);
2419 status = intel_sdvo_read_response(intel_encoder, 2389 status = intel_sdvo_read_response(intel_sdvo,
2420 &format, sizeof(format)); 2390 &format, sizeof(format));
2421 if (status != SDVO_CMD_STATUS_SUCCESS) 2391 if (status != SDVO_CMD_STATUS_SUCCESS)
2422 return; 2392 return;
@@ -2446,7 +2416,7 @@ static void intel_sdvo_tv_create_property(struct drm_connector *connector, int t
2446 sdvo_connector->tv_format_property, i, 2416 sdvo_connector->tv_format_property, i,
2447 i, sdvo_connector->tv_format_supported[i]); 2417 i, sdvo_connector->tv_format_supported[i]);
2448 2418
2449 sdvo_priv->tv_format_name = sdvo_connector->tv_format_supported[0]; 2419 intel_sdvo->tv_format_name = sdvo_connector->tv_format_supported[0];
2450 drm_connector_attach_property( 2420 drm_connector_attach_property(
2451 connector, sdvo_connector->tv_format_property, 0); 2421 connector, sdvo_connector->tv_format_property, 0);
2452 2422
@@ -2455,17 +2425,17 @@ static void intel_sdvo_tv_create_property(struct drm_connector *connector, int t
2455static void intel_sdvo_create_enhance_property(struct drm_connector *connector) 2425static void intel_sdvo_create_enhance_property(struct drm_connector *connector)
2456{ 2426{
2457 struct drm_encoder *encoder = intel_attached_encoder(connector); 2427 struct drm_encoder *encoder = intel_attached_encoder(connector);
2458 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 2428 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
2459 struct intel_connector *intel_connector = to_intel_connector(connector); 2429 struct intel_connector *intel_connector = to_intel_connector(connector);
2460 struct intel_sdvo_connector *sdvo_priv = intel_connector->dev_priv; 2430 struct intel_sdvo_connector *intel_sdvo_connector = intel_connector->dev_priv;
2461 struct intel_sdvo_enhancements_reply sdvo_data; 2431 struct intel_sdvo_enhancements_reply sdvo_data;
2462 struct drm_device *dev = connector->dev; 2432 struct drm_device *dev = connector->dev;
2463 uint8_t status; 2433 uint8_t status;
2464 uint16_t response, data_value[2]; 2434 uint16_t response, data_value[2];
2465 2435
2466 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2436 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2467 NULL, 0); 2437 NULL, 0);
2468 status = intel_sdvo_read_response(intel_encoder, &sdvo_data, 2438 status = intel_sdvo_read_response(intel_sdvo, &sdvo_data,
2469 sizeof(sdvo_data)); 2439 sizeof(sdvo_data));
2470 if (status != SDVO_CMD_STATUS_SUCCESS) { 2440 if (status != SDVO_CMD_STATUS_SUCCESS) {
2471 DRM_DEBUG_KMS(" incorrect response is returned\n"); 2441 DRM_DEBUG_KMS(" incorrect response is returned\n");
@@ -2476,278 +2446,278 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector)
2476 DRM_DEBUG_KMS("No enhancement is supported\n"); 2446 DRM_DEBUG_KMS("No enhancement is supported\n");
2477 return; 2447 return;
2478 } 2448 }
2479 if (IS_TV(sdvo_priv)) { 2449 if (IS_TV(intel_sdvo_connector)) {
2480 /* when horizontal overscan is supported, Add the left/right 2450 /* when horizontal overscan is supported, Add the left/right
2481 * property 2451 * property
2482 */ 2452 */
2483 if (sdvo_data.overscan_h) { 2453 if (sdvo_data.overscan_h) {
2484 intel_sdvo_write_cmd(intel_encoder, 2454 intel_sdvo_write_cmd(intel_sdvo,
2485 SDVO_CMD_GET_MAX_OVERSCAN_H, NULL, 0); 2455 SDVO_CMD_GET_MAX_OVERSCAN_H, NULL, 0);
2486 status = intel_sdvo_read_response(intel_encoder, 2456 status = intel_sdvo_read_response(intel_sdvo,
2487 &data_value, 4); 2457 &data_value, 4);
2488 if (status != SDVO_CMD_STATUS_SUCCESS) { 2458 if (status != SDVO_CMD_STATUS_SUCCESS) {
2489 DRM_DEBUG_KMS("Incorrect SDVO max " 2459 DRM_DEBUG_KMS("Incorrect SDVO max "
2490 "h_overscan\n"); 2460 "h_overscan\n");
2491 return; 2461 return;
2492 } 2462 }
2493 intel_sdvo_write_cmd(intel_encoder, 2463 intel_sdvo_write_cmd(intel_sdvo,
2494 SDVO_CMD_GET_OVERSCAN_H, NULL, 0); 2464 SDVO_CMD_GET_OVERSCAN_H, NULL, 0);
2495 status = intel_sdvo_read_response(intel_encoder, 2465 status = intel_sdvo_read_response(intel_sdvo,
2496 &response, 2); 2466 &response, 2);
2497 if (status != SDVO_CMD_STATUS_SUCCESS) { 2467 if (status != SDVO_CMD_STATUS_SUCCESS) {
2498 DRM_DEBUG_KMS("Incorrect SDVO h_overscan\n"); 2468 DRM_DEBUG_KMS("Incorrect SDVO h_overscan\n");
2499 return; 2469 return;
2500 } 2470 }
2501 sdvo_priv->max_hscan = data_value[0]; 2471 intel_sdvo_connector->max_hscan = data_value[0];
2502 sdvo_priv->left_margin = data_value[0] - response; 2472 intel_sdvo_connector->left_margin = data_value[0] - response;
2503 sdvo_priv->right_margin = sdvo_priv->left_margin; 2473 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2504 sdvo_priv->left_property = 2474 intel_sdvo_connector->left_property =
2505 drm_property_create(dev, DRM_MODE_PROP_RANGE, 2475 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2506 "left_margin", 2); 2476 "left_margin", 2);
2507 sdvo_priv->left_property->values[0] = 0; 2477 intel_sdvo_connector->left_property->values[0] = 0;
2508 sdvo_priv->left_property->values[1] = data_value[0]; 2478 intel_sdvo_connector->left_property->values[1] = data_value[0];
2509 drm_connector_attach_property(connector, 2479 drm_connector_attach_property(connector,
2510 sdvo_priv->left_property, 2480 intel_sdvo_connector->left_property,
2511 sdvo_priv->left_margin); 2481 intel_sdvo_connector->left_margin);
2512 sdvo_priv->right_property = 2482 intel_sdvo_connector->right_property =
2513 drm_property_create(dev, DRM_MODE_PROP_RANGE, 2483 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2514 "right_margin", 2); 2484 "right_margin", 2);
2515 sdvo_priv->right_property->values[0] = 0; 2485 intel_sdvo_connector->right_property->values[0] = 0;
2516 sdvo_priv->right_property->values[1] = data_value[0]; 2486 intel_sdvo_connector->right_property->values[1] = data_value[0];
2517 drm_connector_attach_property(connector, 2487 drm_connector_attach_property(connector,
2518 sdvo_priv->right_property, 2488 intel_sdvo_connector->right_property,
2519 sdvo_priv->right_margin); 2489 intel_sdvo_connector->right_margin);
2520 DRM_DEBUG_KMS("h_overscan: max %d, " 2490 DRM_DEBUG_KMS("h_overscan: max %d, "
2521 "default %d, current %d\n", 2491 "default %d, current %d\n",
2522 data_value[0], data_value[1], response); 2492 data_value[0], data_value[1], response);
2523 } 2493 }
2524 if (sdvo_data.overscan_v) { 2494 if (sdvo_data.overscan_v) {
2525 intel_sdvo_write_cmd(intel_encoder, 2495 intel_sdvo_write_cmd(intel_sdvo,
2526 SDVO_CMD_GET_MAX_OVERSCAN_V, NULL, 0); 2496 SDVO_CMD_GET_MAX_OVERSCAN_V, NULL, 0);
2527 status = intel_sdvo_read_response(intel_encoder, 2497 status = intel_sdvo_read_response(intel_sdvo,
2528 &data_value, 4); 2498 &data_value, 4);
2529 if (status != SDVO_CMD_STATUS_SUCCESS) { 2499 if (status != SDVO_CMD_STATUS_SUCCESS) {
2530 DRM_DEBUG_KMS("Incorrect SDVO max " 2500 DRM_DEBUG_KMS("Incorrect SDVO max "
2531 "v_overscan\n"); 2501 "v_overscan\n");
2532 return; 2502 return;
2533 } 2503 }
2534 intel_sdvo_write_cmd(intel_encoder, 2504 intel_sdvo_write_cmd(intel_sdvo,
2535 SDVO_CMD_GET_OVERSCAN_V, NULL, 0); 2505 SDVO_CMD_GET_OVERSCAN_V, NULL, 0);
2536 status = intel_sdvo_read_response(intel_encoder, 2506 status = intel_sdvo_read_response(intel_sdvo,
2537 &response, 2); 2507 &response, 2);
2538 if (status != SDVO_CMD_STATUS_SUCCESS) { 2508 if (status != SDVO_CMD_STATUS_SUCCESS) {
2539 DRM_DEBUG_KMS("Incorrect SDVO v_overscan\n"); 2509 DRM_DEBUG_KMS("Incorrect SDVO v_overscan\n");
2540 return; 2510 return;
2541 } 2511 }
2542 sdvo_priv->max_vscan = data_value[0]; 2512 intel_sdvo_connector->max_vscan = data_value[0];
2543 sdvo_priv->top_margin = data_value[0] - response; 2513 intel_sdvo_connector->top_margin = data_value[0] - response;
2544 sdvo_priv->bottom_margin = sdvo_priv->top_margin; 2514 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2545 sdvo_priv->top_property = 2515 intel_sdvo_connector->top_property =
2546 drm_property_create(dev, DRM_MODE_PROP_RANGE, 2516 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2547 "top_margin", 2); 2517 "top_margin", 2);
2548 sdvo_priv->top_property->values[0] = 0; 2518 intel_sdvo_connector->top_property->values[0] = 0;
2549 sdvo_priv->top_property->values[1] = data_value[0]; 2519 intel_sdvo_connector->top_property->values[1] = data_value[0];
2550 drm_connector_attach_property(connector, 2520 drm_connector_attach_property(connector,
2551 sdvo_priv->top_property, 2521 intel_sdvo_connector->top_property,
2552 sdvo_priv->top_margin); 2522 intel_sdvo_connector->top_margin);
2553 sdvo_priv->bottom_property = 2523 intel_sdvo_connector->bottom_property =
2554 drm_property_create(dev, DRM_MODE_PROP_RANGE, 2524 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2555 "bottom_margin", 2); 2525 "bottom_margin", 2);
2556 sdvo_priv->bottom_property->values[0] = 0; 2526 intel_sdvo_connector->bottom_property->values[0] = 0;
2557 sdvo_priv->bottom_property->values[1] = data_value[0]; 2527 intel_sdvo_connector->bottom_property->values[1] = data_value[0];
2558 drm_connector_attach_property(connector, 2528 drm_connector_attach_property(connector,
2559 sdvo_priv->bottom_property, 2529 intel_sdvo_connector->bottom_property,
2560 sdvo_priv->bottom_margin); 2530 intel_sdvo_connector->bottom_margin);
2561 DRM_DEBUG_KMS("v_overscan: max %d, " 2531 DRM_DEBUG_KMS("v_overscan: max %d, "
2562 "default %d, current %d\n", 2532 "default %d, current %d\n",
2563 data_value[0], data_value[1], response); 2533 data_value[0], data_value[1], response);
2564 } 2534 }
2565 if (sdvo_data.position_h) { 2535 if (sdvo_data.position_h) {
2566 intel_sdvo_write_cmd(intel_encoder, 2536 intel_sdvo_write_cmd(intel_sdvo,
2567 SDVO_CMD_GET_MAX_POSITION_H, NULL, 0); 2537 SDVO_CMD_GET_MAX_POSITION_H, NULL, 0);
2568 status = intel_sdvo_read_response(intel_encoder, 2538 status = intel_sdvo_read_response(intel_sdvo,
2569 &data_value, 4); 2539 &data_value, 4);
2570 if (status != SDVO_CMD_STATUS_SUCCESS) { 2540 if (status != SDVO_CMD_STATUS_SUCCESS) {
2571 DRM_DEBUG_KMS("Incorrect SDVO Max h_pos\n"); 2541 DRM_DEBUG_KMS("Incorrect SDVO Max h_pos\n");
2572 return; 2542 return;
2573 } 2543 }
2574 intel_sdvo_write_cmd(intel_encoder, 2544 intel_sdvo_write_cmd(intel_sdvo,
2575 SDVO_CMD_GET_POSITION_H, NULL, 0); 2545 SDVO_CMD_GET_POSITION_H, NULL, 0);
2576 status = intel_sdvo_read_response(intel_encoder, 2546 status = intel_sdvo_read_response(intel_sdvo,
2577 &response, 2); 2547 &response, 2);
2578 if (status != SDVO_CMD_STATUS_SUCCESS) { 2548 if (status != SDVO_CMD_STATUS_SUCCESS) {
2579 DRM_DEBUG_KMS("Incorrect SDVO get h_postion\n"); 2549 DRM_DEBUG_KMS("Incorrect SDVO get h_postion\n");
2580 return; 2550 return;
2581 } 2551 }
2582 sdvo_priv->max_hpos = data_value[0]; 2552 intel_sdvo_connector->max_hpos = data_value[0];
2583 sdvo_priv->cur_hpos = response; 2553 intel_sdvo_connector->cur_hpos = response;
2584 sdvo_priv->hpos_property = 2554 intel_sdvo_connector->hpos_property =
2585 drm_property_create(dev, DRM_MODE_PROP_RANGE, 2555 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2586 "hpos", 2); 2556 "hpos", 2);
2587 sdvo_priv->hpos_property->values[0] = 0; 2557 intel_sdvo_connector->hpos_property->values[0] = 0;
2588 sdvo_priv->hpos_property->values[1] = data_value[0]; 2558 intel_sdvo_connector->hpos_property->values[1] = data_value[0];
2589 drm_connector_attach_property(connector, 2559 drm_connector_attach_property(connector,
2590 sdvo_priv->hpos_property, 2560 intel_sdvo_connector->hpos_property,
2591 sdvo_priv->cur_hpos); 2561 intel_sdvo_connector->cur_hpos);
2592 DRM_DEBUG_KMS("h_position: max %d, " 2562 DRM_DEBUG_KMS("h_position: max %d, "
2593 "default %d, current %d\n", 2563 "default %d, current %d\n",
2594 data_value[0], data_value[1], response); 2564 data_value[0], data_value[1], response);
2595 } 2565 }
2596 if (sdvo_data.position_v) { 2566 if (sdvo_data.position_v) {
2597 intel_sdvo_write_cmd(intel_encoder, 2567 intel_sdvo_write_cmd(intel_sdvo,
2598 SDVO_CMD_GET_MAX_POSITION_V, NULL, 0); 2568 SDVO_CMD_GET_MAX_POSITION_V, NULL, 0);
2599 status = intel_sdvo_read_response(intel_encoder, 2569 status = intel_sdvo_read_response(intel_sdvo,
2600 &data_value, 4); 2570 &data_value, 4);
2601 if (status != SDVO_CMD_STATUS_SUCCESS) { 2571 if (status != SDVO_CMD_STATUS_SUCCESS) {
2602 DRM_DEBUG_KMS("Incorrect SDVO Max v_pos\n"); 2572 DRM_DEBUG_KMS("Incorrect SDVO Max v_pos\n");
2603 return; 2573 return;
2604 } 2574 }
2605 intel_sdvo_write_cmd(intel_encoder, 2575 intel_sdvo_write_cmd(intel_sdvo,
2606 SDVO_CMD_GET_POSITION_V, NULL, 0); 2576 SDVO_CMD_GET_POSITION_V, NULL, 0);
2607 status = intel_sdvo_read_response(intel_encoder, 2577 status = intel_sdvo_read_response(intel_sdvo,
2608 &response, 2); 2578 &response, 2);
2609 if (status != SDVO_CMD_STATUS_SUCCESS) { 2579 if (status != SDVO_CMD_STATUS_SUCCESS) {
2610 DRM_DEBUG_KMS("Incorrect SDVO get v_postion\n"); 2580 DRM_DEBUG_KMS("Incorrect SDVO get v_postion\n");
2611 return; 2581 return;
2612 } 2582 }
2613 sdvo_priv->max_vpos = data_value[0]; 2583 intel_sdvo_connector->max_vpos = data_value[0];
2614 sdvo_priv->cur_vpos = response; 2584 intel_sdvo_connector->cur_vpos = response;
2615 sdvo_priv->vpos_property = 2585 intel_sdvo_connector->vpos_property =
2616 drm_property_create(dev, DRM_MODE_PROP_RANGE, 2586 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2617 "vpos", 2); 2587 "vpos", 2);
2618 sdvo_priv->vpos_property->values[0] = 0; 2588 intel_sdvo_connector->vpos_property->values[0] = 0;
2619 sdvo_priv->vpos_property->values[1] = data_value[0]; 2589 intel_sdvo_connector->vpos_property->values[1] = data_value[0];
2620 drm_connector_attach_property(connector, 2590 drm_connector_attach_property(connector,
2621 sdvo_priv->vpos_property, 2591 intel_sdvo_connector->vpos_property,
2622 sdvo_priv->cur_vpos); 2592 intel_sdvo_connector->cur_vpos);
2623 DRM_DEBUG_KMS("v_position: max %d, " 2593 DRM_DEBUG_KMS("v_position: max %d, "
2624 "default %d, current %d\n", 2594 "default %d, current %d\n",
2625 data_value[0], data_value[1], response); 2595 data_value[0], data_value[1], response);
2626 } 2596 }
2627 if (sdvo_data.saturation) { 2597 if (sdvo_data.saturation) {
2628 intel_sdvo_write_cmd(intel_encoder, 2598 intel_sdvo_write_cmd(intel_sdvo,
2629 SDVO_CMD_GET_MAX_SATURATION, NULL, 0); 2599 SDVO_CMD_GET_MAX_SATURATION, NULL, 0);
2630 status = intel_sdvo_read_response(intel_encoder, 2600 status = intel_sdvo_read_response(intel_sdvo,
2631 &data_value, 4); 2601 &data_value, 4);
2632 if (status != SDVO_CMD_STATUS_SUCCESS) { 2602 if (status != SDVO_CMD_STATUS_SUCCESS) {
2633 DRM_DEBUG_KMS("Incorrect SDVO Max sat\n"); 2603 DRM_DEBUG_KMS("Incorrect SDVO Max sat\n");
2634 return; 2604 return;
2635 } 2605 }
2636 intel_sdvo_write_cmd(intel_encoder, 2606 intel_sdvo_write_cmd(intel_sdvo,
2637 SDVO_CMD_GET_SATURATION, NULL, 0); 2607 SDVO_CMD_GET_SATURATION, NULL, 0);
2638 status = intel_sdvo_read_response(intel_encoder, 2608 status = intel_sdvo_read_response(intel_sdvo,
2639 &response, 2); 2609 &response, 2);
2640 if (status != SDVO_CMD_STATUS_SUCCESS) { 2610 if (status != SDVO_CMD_STATUS_SUCCESS) {
2641 DRM_DEBUG_KMS("Incorrect SDVO get sat\n"); 2611 DRM_DEBUG_KMS("Incorrect SDVO get sat\n");
2642 return; 2612 return;
2643 } 2613 }
2644 sdvo_priv->max_saturation = data_value[0]; 2614 intel_sdvo_connector->max_saturation = data_value[0];
2645 sdvo_priv->cur_saturation = response; 2615 intel_sdvo_connector->cur_saturation = response;
2646 sdvo_priv->saturation_property = 2616 intel_sdvo_connector->saturation_property =
2647 drm_property_create(dev, DRM_MODE_PROP_RANGE, 2617 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2648 "saturation", 2); 2618 "saturation", 2);
2649 sdvo_priv->saturation_property->values[0] = 0; 2619 intel_sdvo_connector->saturation_property->values[0] = 0;
2650 sdvo_priv->saturation_property->values[1] = 2620 intel_sdvo_connector->saturation_property->values[1] =
2651 data_value[0]; 2621 data_value[0];
2652 drm_connector_attach_property(connector, 2622 drm_connector_attach_property(connector,
2653 sdvo_priv->saturation_property, 2623 intel_sdvo_connector->saturation_property,
2654 sdvo_priv->cur_saturation); 2624 intel_sdvo_connector->cur_saturation);
2655 DRM_DEBUG_KMS("saturation: max %d, " 2625 DRM_DEBUG_KMS("saturation: max %d, "
2656 "default %d, current %d\n", 2626 "default %d, current %d\n",
2657 data_value[0], data_value[1], response); 2627 data_value[0], data_value[1], response);
2658 } 2628 }
2659 if (sdvo_data.contrast) { 2629 if (sdvo_data.contrast) {
2660 intel_sdvo_write_cmd(intel_encoder, 2630 intel_sdvo_write_cmd(intel_sdvo,
2661 SDVO_CMD_GET_MAX_CONTRAST, NULL, 0); 2631 SDVO_CMD_GET_MAX_CONTRAST, NULL, 0);
2662 status = intel_sdvo_read_response(intel_encoder, 2632 status = intel_sdvo_read_response(intel_sdvo,
2663 &data_value, 4); 2633 &data_value, 4);
2664 if (status != SDVO_CMD_STATUS_SUCCESS) { 2634 if (status != SDVO_CMD_STATUS_SUCCESS) {
2665 DRM_DEBUG_KMS("Incorrect SDVO Max contrast\n"); 2635 DRM_DEBUG_KMS("Incorrect SDVO Max contrast\n");
2666 return; 2636 return;
2667 } 2637 }
2668 intel_sdvo_write_cmd(intel_encoder, 2638 intel_sdvo_write_cmd(intel_sdvo,
2669 SDVO_CMD_GET_CONTRAST, NULL, 0); 2639 SDVO_CMD_GET_CONTRAST, NULL, 0);
2670 status = intel_sdvo_read_response(intel_encoder, 2640 status = intel_sdvo_read_response(intel_sdvo,
2671 &response, 2); 2641 &response, 2);
2672 if (status != SDVO_CMD_STATUS_SUCCESS) { 2642 if (status != SDVO_CMD_STATUS_SUCCESS) {
2673 DRM_DEBUG_KMS("Incorrect SDVO get contrast\n"); 2643 DRM_DEBUG_KMS("Incorrect SDVO get contrast\n");
2674 return; 2644 return;
2675 } 2645 }
2676 sdvo_priv->max_contrast = data_value[0]; 2646 intel_sdvo_connector->max_contrast = data_value[0];
2677 sdvo_priv->cur_contrast = response; 2647 intel_sdvo_connector->cur_contrast = response;
2678 sdvo_priv->contrast_property = 2648 intel_sdvo_connector->contrast_property =
2679 drm_property_create(dev, DRM_MODE_PROP_RANGE, 2649 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2680 "contrast", 2); 2650 "contrast", 2);
2681 sdvo_priv->contrast_property->values[0] = 0; 2651 intel_sdvo_connector->contrast_property->values[0] = 0;
2682 sdvo_priv->contrast_property->values[1] = data_value[0]; 2652 intel_sdvo_connector->contrast_property->values[1] = data_value[0];
2683 drm_connector_attach_property(connector, 2653 drm_connector_attach_property(connector,
2684 sdvo_priv->contrast_property, 2654 intel_sdvo_connector->contrast_property,
2685 sdvo_priv->cur_contrast); 2655 intel_sdvo_connector->cur_contrast);
2686 DRM_DEBUG_KMS("contrast: max %d, " 2656 DRM_DEBUG_KMS("contrast: max %d, "
2687 "default %d, current %d\n", 2657 "default %d, current %d\n",
2688 data_value[0], data_value[1], response); 2658 data_value[0], data_value[1], response);
2689 } 2659 }
2690 if (sdvo_data.hue) { 2660 if (sdvo_data.hue) {
2691 intel_sdvo_write_cmd(intel_encoder, 2661 intel_sdvo_write_cmd(intel_sdvo,
2692 SDVO_CMD_GET_MAX_HUE, NULL, 0); 2662 SDVO_CMD_GET_MAX_HUE, NULL, 0);
2693 status = intel_sdvo_read_response(intel_encoder, 2663 status = intel_sdvo_read_response(intel_sdvo,
2694 &data_value, 4); 2664 &data_value, 4);
2695 if (status != SDVO_CMD_STATUS_SUCCESS) { 2665 if (status != SDVO_CMD_STATUS_SUCCESS) {
2696 DRM_DEBUG_KMS("Incorrect SDVO Max hue\n"); 2666 DRM_DEBUG_KMS("Incorrect SDVO Max hue\n");
2697 return; 2667 return;
2698 } 2668 }
2699 intel_sdvo_write_cmd(intel_encoder, 2669 intel_sdvo_write_cmd(intel_sdvo,
2700 SDVO_CMD_GET_HUE, NULL, 0); 2670 SDVO_CMD_GET_HUE, NULL, 0);
2701 status = intel_sdvo_read_response(intel_encoder, 2671 status = intel_sdvo_read_response(intel_sdvo,
2702 &response, 2); 2672 &response, 2);
2703 if (status != SDVO_CMD_STATUS_SUCCESS) { 2673 if (status != SDVO_CMD_STATUS_SUCCESS) {
2704 DRM_DEBUG_KMS("Incorrect SDVO get hue\n"); 2674 DRM_DEBUG_KMS("Incorrect SDVO get hue\n");
2705 return; 2675 return;
2706 } 2676 }
2707 sdvo_priv->max_hue = data_value[0]; 2677 intel_sdvo_connector->max_hue = data_value[0];
2708 sdvo_priv->cur_hue = response; 2678 intel_sdvo_connector->cur_hue = response;
2709 sdvo_priv->hue_property = 2679 intel_sdvo_connector->hue_property =
2710 drm_property_create(dev, DRM_MODE_PROP_RANGE, 2680 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2711 "hue", 2); 2681 "hue", 2);
2712 sdvo_priv->hue_property->values[0] = 0; 2682 intel_sdvo_connector->hue_property->values[0] = 0;
2713 sdvo_priv->hue_property->values[1] = 2683 intel_sdvo_connector->hue_property->values[1] =
2714 data_value[0]; 2684 data_value[0];
2715 drm_connector_attach_property(connector, 2685 drm_connector_attach_property(connector,
2716 sdvo_priv->hue_property, 2686 intel_sdvo_connector->hue_property,
2717 sdvo_priv->cur_hue); 2687 intel_sdvo_connector->cur_hue);
2718 DRM_DEBUG_KMS("hue: max %d, default %d, current %d\n", 2688 DRM_DEBUG_KMS("hue: max %d, default %d, current %d\n",
2719 data_value[0], data_value[1], response); 2689 data_value[0], data_value[1], response);
2720 } 2690 }
2721 } 2691 }
2722 if (IS_TV(sdvo_priv) || IS_LVDS(sdvo_priv)) { 2692 if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector)) {
2723 if (sdvo_data.brightness) { 2693 if (sdvo_data.brightness) {
2724 intel_sdvo_write_cmd(intel_encoder, 2694 intel_sdvo_write_cmd(intel_sdvo,
2725 SDVO_CMD_GET_MAX_BRIGHTNESS, NULL, 0); 2695 SDVO_CMD_GET_MAX_BRIGHTNESS, NULL, 0);
2726 status = intel_sdvo_read_response(intel_encoder, 2696 status = intel_sdvo_read_response(intel_sdvo,
2727 &data_value, 4); 2697 &data_value, 4);
2728 if (status != SDVO_CMD_STATUS_SUCCESS) { 2698 if (status != SDVO_CMD_STATUS_SUCCESS) {
2729 DRM_DEBUG_KMS("Incorrect SDVO Max bright\n"); 2699 DRM_DEBUG_KMS("Incorrect SDVO Max bright\n");
2730 return; 2700 return;
2731 } 2701 }
2732 intel_sdvo_write_cmd(intel_encoder, 2702 intel_sdvo_write_cmd(intel_sdvo,
2733 SDVO_CMD_GET_BRIGHTNESS, NULL, 0); 2703 SDVO_CMD_GET_BRIGHTNESS, NULL, 0);
2734 status = intel_sdvo_read_response(intel_encoder, 2704 status = intel_sdvo_read_response(intel_sdvo,
2735 &response, 2); 2705 &response, 2);
2736 if (status != SDVO_CMD_STATUS_SUCCESS) { 2706 if (status != SDVO_CMD_STATUS_SUCCESS) {
2737 DRM_DEBUG_KMS("Incorrect SDVO get brigh\n"); 2707 DRM_DEBUG_KMS("Incorrect SDVO get brigh\n");
2738 return; 2708 return;
2739 } 2709 }
2740 sdvo_priv->max_brightness = data_value[0]; 2710 intel_sdvo_connector->max_brightness = data_value[0];
2741 sdvo_priv->cur_brightness = response; 2711 intel_sdvo_connector->cur_brightness = response;
2742 sdvo_priv->brightness_property = 2712 intel_sdvo_connector->brightness_property =
2743 drm_property_create(dev, DRM_MODE_PROP_RANGE, 2713 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2744 "brightness", 2); 2714 "brightness", 2);
2745 sdvo_priv->brightness_property->values[0] = 0; 2715 intel_sdvo_connector->brightness_property->values[0] = 0;
2746 sdvo_priv->brightness_property->values[1] = 2716 intel_sdvo_connector->brightness_property->values[1] =
2747 data_value[0]; 2717 data_value[0];
2748 drm_connector_attach_property(connector, 2718 drm_connector_attach_property(connector,
2749 sdvo_priv->brightness_property, 2719 intel_sdvo_connector->brightness_property,
2750 sdvo_priv->cur_brightness); 2720 intel_sdvo_connector->cur_brightness);
2751 DRM_DEBUG_KMS("brightness: max %d, " 2721 DRM_DEBUG_KMS("brightness: max %d, "
2752 "default %d, current %d\n", 2722 "default %d, current %d\n",
2753 data_value[0], data_value[1], response); 2723 data_value[0], data_value[1], response);
@@ -2760,20 +2730,18 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2760{ 2730{
2761 struct drm_i915_private *dev_priv = dev->dev_private; 2731 struct drm_i915_private *dev_priv = dev->dev_private;
2762 struct intel_encoder *intel_encoder; 2732 struct intel_encoder *intel_encoder;
2763 struct intel_sdvo_priv *sdvo_priv; 2733 struct intel_sdvo *intel_sdvo;
2764 u8 ch[0x40]; 2734 u8 ch[0x40];
2765 int i; 2735 int i;
2766 u32 i2c_reg, ddc_reg, analog_ddc_reg; 2736 u32 i2c_reg, ddc_reg, analog_ddc_reg;
2767 2737
2768 intel_encoder = kcalloc(sizeof(struct intel_encoder)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL); 2738 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2769 if (!intel_encoder) { 2739 if (!intel_sdvo)
2770 return false; 2740 return false;
2771 }
2772 2741
2773 sdvo_priv = (struct intel_sdvo_priv *)(intel_encoder + 1); 2742 intel_sdvo->sdvo_reg = sdvo_reg;
2774 sdvo_priv->sdvo_reg = sdvo_reg;
2775 2743
2776 intel_encoder->dev_priv = sdvo_priv; 2744 intel_encoder = &intel_sdvo->base;
2777 intel_encoder->type = INTEL_OUTPUT_SDVO; 2745 intel_encoder->type = INTEL_OUTPUT_SDVO;
2778 2746
2779 if (HAS_PCH_SPLIT(dev)) { 2747 if (HAS_PCH_SPLIT(dev)) {
@@ -2795,14 +2763,14 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2795 if (!intel_encoder->i2c_bus) 2763 if (!intel_encoder->i2c_bus)
2796 goto err_inteloutput; 2764 goto err_inteloutput;
2797 2765
2798 sdvo_priv->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg); 2766 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg);
2799 2767
2800 /* Save the bit-banging i2c functionality for use by the DDC wrapper */ 2768 /* Save the bit-banging i2c functionality for use by the DDC wrapper */
2801 intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality; 2769 intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality;
2802 2770
2803 /* Read the regs to test if we can talk to the device */ 2771 /* Read the regs to test if we can talk to the device */
2804 for (i = 0; i < 0x40; i++) { 2772 for (i = 0; i < 0x40; i++) {
2805 if (!intel_sdvo_read_byte(intel_encoder, i, &ch[i])) { 2773 if (!intel_sdvo_read_byte(intel_sdvo, i, &ch[i])) {
2806 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", 2774 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2807 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2775 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2808 goto err_i2c; 2776 goto err_i2c;
@@ -2812,12 +2780,12 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2812 /* setup the DDC bus. */ 2780 /* setup the DDC bus. */
2813 if (IS_SDVOB(sdvo_reg)) { 2781 if (IS_SDVOB(sdvo_reg)) {
2814 intel_encoder->ddc_bus = intel_i2c_create(dev, ddc_reg, "SDVOB DDC BUS"); 2782 intel_encoder->ddc_bus = intel_i2c_create(dev, ddc_reg, "SDVOB DDC BUS");
2815 sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, analog_ddc_reg, 2783 intel_sdvo->analog_ddc_bus = intel_i2c_create(dev, analog_ddc_reg,
2816 "SDVOB/VGA DDC BUS"); 2784 "SDVOB/VGA DDC BUS");
2817 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; 2785 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2818 } else { 2786 } else {
2819 intel_encoder->ddc_bus = intel_i2c_create(dev, ddc_reg, "SDVOC DDC BUS"); 2787 intel_encoder->ddc_bus = intel_i2c_create(dev, ddc_reg, "SDVOC DDC BUS");
2820 sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, analog_ddc_reg, 2788 intel_sdvo->analog_ddc_bus = intel_i2c_create(dev, analog_ddc_reg,
2821 "SDVOC/VGA DDC BUS"); 2789 "SDVOC/VGA DDC BUS");
2822 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; 2790 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2823 } 2791 }
@@ -2833,53 +2801,53 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2833 drm_encoder_helper_add(&intel_encoder->enc, &intel_sdvo_helper_funcs); 2801 drm_encoder_helper_add(&intel_encoder->enc, &intel_sdvo_helper_funcs);
2834 2802
2835 /* In default case sdvo lvds is false */ 2803 /* In default case sdvo lvds is false */
2836 intel_sdvo_get_capabilities(intel_encoder, &sdvo_priv->caps); 2804 intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps);
2837 2805
2838 if (intel_sdvo_output_setup(intel_encoder, 2806 if (intel_sdvo_output_setup(intel_sdvo,
2839 sdvo_priv->caps.output_flags) != true) { 2807 intel_sdvo->caps.output_flags) != true) {
2840 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", 2808 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2841 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2809 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2842 goto err_i2c; 2810 goto err_i2c;
2843 } 2811 }
2844 2812
2845 intel_sdvo_select_ddc_bus(dev_priv, sdvo_priv, sdvo_reg); 2813 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2846 2814
2847 /* Set the input timing to the screen. Assume always input 0. */ 2815 /* Set the input timing to the screen. Assume always input 0. */
2848 intel_sdvo_set_target_input(intel_encoder, true, false); 2816 intel_sdvo_set_target_input(intel_sdvo, true, false);
2849 2817
2850 intel_sdvo_get_input_pixel_clock_range(intel_encoder, 2818 intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2851 &sdvo_priv->pixel_clock_min, 2819 &intel_sdvo->pixel_clock_min,
2852 &sdvo_priv->pixel_clock_max); 2820 &intel_sdvo->pixel_clock_max);
2853 2821
2854 2822
2855 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2823 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2856 "clock range %dMHz - %dMHz, " 2824 "clock range %dMHz - %dMHz, "
2857 "input 1: %c, input 2: %c, " 2825 "input 1: %c, input 2: %c, "
2858 "output 1: %c, output 2: %c\n", 2826 "output 1: %c, output 2: %c\n",
2859 SDVO_NAME(sdvo_priv), 2827 SDVO_NAME(intel_sdvo),
2860 sdvo_priv->caps.vendor_id, sdvo_priv->caps.device_id, 2828 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2861 sdvo_priv->caps.device_rev_id, 2829 intel_sdvo->caps.device_rev_id,
2862 sdvo_priv->pixel_clock_min / 1000, 2830 intel_sdvo->pixel_clock_min / 1000,
2863 sdvo_priv->pixel_clock_max / 1000, 2831 intel_sdvo->pixel_clock_max / 1000,
2864 (sdvo_priv->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 2832 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2865 (sdvo_priv->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 2833 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2866 /* check currently supported outputs */ 2834 /* check currently supported outputs */
2867 sdvo_priv->caps.output_flags & 2835 intel_sdvo->caps.output_flags &
2868 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 2836 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2869 sdvo_priv->caps.output_flags & 2837 intel_sdvo->caps.output_flags &
2870 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2838 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2871 2839
2872 return true; 2840 return true;
2873 2841
2874err_i2c: 2842err_i2c:
2875 if (sdvo_priv->analog_ddc_bus != NULL) 2843 if (intel_sdvo->analog_ddc_bus != NULL)
2876 intel_i2c_destroy(sdvo_priv->analog_ddc_bus); 2844 intel_i2c_destroy(intel_sdvo->analog_ddc_bus);
2877 if (intel_encoder->ddc_bus != NULL) 2845 if (intel_encoder->ddc_bus != NULL)
2878 intel_i2c_destroy(intel_encoder->ddc_bus); 2846 intel_i2c_destroy(intel_encoder->ddc_bus);
2879 if (intel_encoder->i2c_bus != NULL) 2847 if (intel_encoder->i2c_bus != NULL)
2880 intel_i2c_destroy(intel_encoder->i2c_bus); 2848 intel_i2c_destroy(intel_encoder->i2c_bus);
2881err_inteloutput: 2849err_inteloutput:
2882 kfree(intel_encoder); 2850 kfree(intel_sdvo);
2883 2851
2884 return false; 2852 return false;
2885} 2853}
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index cc3726a4a1cb..1bd6e8795011 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -44,7 +44,9 @@ enum tv_margin {
44}; 44};
45 45
46/** Private structure for the integrated TV support */ 46/** Private structure for the integrated TV support */
47struct intel_tv_priv { 47struct intel_tv {
48 struct intel_encoder base;
49
48 int type; 50 int type;
49 char *tv_format; 51 char *tv_format;
50 int margin[4]; 52 int margin[4];
@@ -896,6 +898,11 @@ static const struct tv_mode tv_modes[] = {
896 }, 898 },
897}; 899};
898 900
901static struct intel_tv *enc_to_intel_tv(struct drm_encoder *encoder)
902{
903 return container_of(enc_to_intel_encoder(encoder), struct intel_tv, base);
904}
905
899static void 906static void
900intel_tv_dpms(struct drm_encoder *encoder, int mode) 907intel_tv_dpms(struct drm_encoder *encoder, int mode)
901{ 908{
@@ -929,19 +936,17 @@ intel_tv_mode_lookup (char *tv_format)
929} 936}
930 937
931static const struct tv_mode * 938static const struct tv_mode *
932intel_tv_mode_find (struct intel_encoder *intel_encoder) 939intel_tv_mode_find (struct intel_tv *intel_tv)
933{ 940{
934 struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; 941 return intel_tv_mode_lookup(intel_tv->tv_format);
935
936 return intel_tv_mode_lookup(tv_priv->tv_format);
937} 942}
938 943
939static enum drm_mode_status 944static enum drm_mode_status
940intel_tv_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) 945intel_tv_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode)
941{ 946{
942 struct drm_encoder *encoder = intel_attached_encoder(connector); 947 struct drm_encoder *encoder = intel_attached_encoder(connector);
943 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 948 struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
944 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); 949 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
945 950
946 /* Ensure TV refresh is close to desired refresh */ 951 /* Ensure TV refresh is close to desired refresh */
947 if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000) 952 if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000)
@@ -957,8 +962,8 @@ intel_tv_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
957{ 962{
958 struct drm_device *dev = encoder->dev; 963 struct drm_device *dev = encoder->dev;
959 struct drm_mode_config *drm_config = &dev->mode_config; 964 struct drm_mode_config *drm_config = &dev->mode_config;
960 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 965 struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
961 const struct tv_mode *tv_mode = intel_tv_mode_find (intel_encoder); 966 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
962 struct drm_encoder *other_encoder; 967 struct drm_encoder *other_encoder;
963 968
964 if (!tv_mode) 969 if (!tv_mode)
@@ -983,9 +988,8 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
983 struct drm_i915_private *dev_priv = dev->dev_private; 988 struct drm_i915_private *dev_priv = dev->dev_private;
984 struct drm_crtc *crtc = encoder->crtc; 989 struct drm_crtc *crtc = encoder->crtc;
985 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 990 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
986 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 991 struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
987 struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; 992 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
988 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder);
989 u32 tv_ctl; 993 u32 tv_ctl;
990 u32 hctl1, hctl2, hctl3; 994 u32 hctl1, hctl2, hctl3;
991 u32 vctl1, vctl2, vctl3, vctl4, vctl5, vctl6, vctl7; 995 u32 vctl1, vctl2, vctl3, vctl4, vctl5, vctl6, vctl7;
@@ -1001,7 +1005,7 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
1001 tv_ctl = I915_READ(TV_CTL); 1005 tv_ctl = I915_READ(TV_CTL);
1002 tv_ctl &= TV_CTL_SAVE; 1006 tv_ctl &= TV_CTL_SAVE;
1003 1007
1004 switch (tv_priv->type) { 1008 switch (intel_tv->type) {
1005 default: 1009 default:
1006 case DRM_MODE_CONNECTOR_Unknown: 1010 case DRM_MODE_CONNECTOR_Unknown:
1007 case DRM_MODE_CONNECTOR_Composite: 1011 case DRM_MODE_CONNECTOR_Composite:
@@ -1168,12 +1172,12 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
1168 else 1172 else
1169 ysize = 2*tv_mode->nbr_end + 1; 1173 ysize = 2*tv_mode->nbr_end + 1;
1170 1174
1171 xpos += tv_priv->margin[TV_MARGIN_LEFT]; 1175 xpos += intel_tv->margin[TV_MARGIN_LEFT];
1172 ypos += tv_priv->margin[TV_MARGIN_TOP]; 1176 ypos += intel_tv->margin[TV_MARGIN_TOP];
1173 xsize -= (tv_priv->margin[TV_MARGIN_LEFT] + 1177 xsize -= (intel_tv->margin[TV_MARGIN_LEFT] +
1174 tv_priv->margin[TV_MARGIN_RIGHT]); 1178 intel_tv->margin[TV_MARGIN_RIGHT]);
1175 ysize -= (tv_priv->margin[TV_MARGIN_TOP] + 1179 ysize -= (intel_tv->margin[TV_MARGIN_TOP] +
1176 tv_priv->margin[TV_MARGIN_BOTTOM]); 1180 intel_tv->margin[TV_MARGIN_BOTTOM]);
1177 I915_WRITE(TV_WIN_POS, (xpos<<16)|ypos); 1181 I915_WRITE(TV_WIN_POS, (xpos<<16)|ypos);
1178 I915_WRITE(TV_WIN_SIZE, (xsize<<16)|ysize); 1182 I915_WRITE(TV_WIN_SIZE, (xsize<<16)|ysize);
1179 1183
@@ -1222,9 +1226,9 @@ static const struct drm_display_mode reported_modes[] = {
1222 * \return false if TV is disconnected. 1226 * \return false if TV is disconnected.
1223 */ 1227 */
1224static int 1228static int
1225intel_tv_detect_type (struct drm_crtc *crtc, struct intel_encoder *intel_encoder) 1229intel_tv_detect_type (struct intel_tv *intel_tv)
1226{ 1230{
1227 struct drm_encoder *encoder = &intel_encoder->enc; 1231 struct drm_encoder *encoder = &intel_tv->base.enc;
1228 struct drm_device *dev = encoder->dev; 1232 struct drm_device *dev = encoder->dev;
1229 struct drm_i915_private *dev_priv = dev->dev_private; 1233 struct drm_i915_private *dev_priv = dev->dev_private;
1230 unsigned long irqflags; 1234 unsigned long irqflags;
@@ -1304,12 +1308,11 @@ intel_tv_detect_type (struct drm_crtc *crtc, struct intel_encoder *intel_encoder
1304static void intel_tv_find_better_format(struct drm_connector *connector) 1308static void intel_tv_find_better_format(struct drm_connector *connector)
1305{ 1309{
1306 struct drm_encoder *encoder = intel_attached_encoder(connector); 1310 struct drm_encoder *encoder = intel_attached_encoder(connector);
1307 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1311 struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
1308 struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; 1312 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
1309 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder);
1310 int i; 1313 int i;
1311 1314
1312 if ((tv_priv->type == DRM_MODE_CONNECTOR_Component) == 1315 if ((intel_tv->type == DRM_MODE_CONNECTOR_Component) ==
1313 tv_mode->component_only) 1316 tv_mode->component_only)
1314 return; 1317 return;
1315 1318
@@ -1317,12 +1320,12 @@ static void intel_tv_find_better_format(struct drm_connector *connector)
1317 for (i = 0; i < sizeof(tv_modes) / sizeof(*tv_modes); i++) { 1320 for (i = 0; i < sizeof(tv_modes) / sizeof(*tv_modes); i++) {
1318 tv_mode = tv_modes + i; 1321 tv_mode = tv_modes + i;
1319 1322
1320 if ((tv_priv->type == DRM_MODE_CONNECTOR_Component) == 1323 if ((intel_tv->type == DRM_MODE_CONNECTOR_Component) ==
1321 tv_mode->component_only) 1324 tv_mode->component_only)
1322 break; 1325 break;
1323 } 1326 }
1324 1327
1325 tv_priv->tv_format = tv_mode->name; 1328 intel_tv->tv_format = tv_mode->name;
1326 drm_connector_property_set_value(connector, 1329 drm_connector_property_set_value(connector,
1327 connector->dev->mode_config.tv_mode_property, i); 1330 connector->dev->mode_config.tv_mode_property, i);
1328} 1331}
@@ -1336,31 +1339,31 @@ static void intel_tv_find_better_format(struct drm_connector *connector)
1336static enum drm_connector_status 1339static enum drm_connector_status
1337intel_tv_detect(struct drm_connector *connector) 1340intel_tv_detect(struct drm_connector *connector)
1338{ 1341{
1339 struct drm_crtc *crtc;
1340 struct drm_display_mode mode; 1342 struct drm_display_mode mode;
1341 struct drm_encoder *encoder = intel_attached_encoder(connector); 1343 struct drm_encoder *encoder = intel_attached_encoder(connector);
1342 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1344 struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
1343 struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; 1345 int type;
1344 int dpms_mode;
1345 int type = tv_priv->type;
1346 1346
1347 mode = reported_modes[0]; 1347 mode = reported_modes[0];
1348 drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V); 1348 drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V);
1349 1349
1350 if (encoder->crtc && encoder->crtc->enabled) { 1350 if (encoder->crtc && encoder->crtc->enabled) {
1351 type = intel_tv_detect_type(encoder->crtc, intel_encoder); 1351 type = intel_tv_detect_type(intel_tv);
1352 } else { 1352 } else {
1353 crtc = intel_get_load_detect_pipe(intel_encoder, connector, 1353 struct drm_crtc *crtc;
1354 int dpms_mode;
1355
1356 crtc = intel_get_load_detect_pipe(&intel_tv->base, connector,
1354 &mode, &dpms_mode); 1357 &mode, &dpms_mode);
1355 if (crtc) { 1358 if (crtc) {
1356 type = intel_tv_detect_type(crtc, intel_encoder); 1359 type = intel_tv_detect_type(intel_tv);
1357 intel_release_load_detect_pipe(intel_encoder, connector, 1360 intel_release_load_detect_pipe(&intel_tv->base, connector,
1358 dpms_mode); 1361 dpms_mode);
1359 } else 1362 } else
1360 type = -1; 1363 type = -1;
1361 } 1364 }
1362 1365
1363 tv_priv->type = type; 1366 intel_tv->type = type;
1364 1367
1365 if (type < 0) 1368 if (type < 0)
1366 return connector_status_disconnected; 1369 return connector_status_disconnected;
@@ -1391,8 +1394,8 @@ intel_tv_chose_preferred_modes(struct drm_connector *connector,
1391 struct drm_display_mode *mode_ptr) 1394 struct drm_display_mode *mode_ptr)
1392{ 1395{
1393 struct drm_encoder *encoder = intel_attached_encoder(connector); 1396 struct drm_encoder *encoder = intel_attached_encoder(connector);
1394 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1397 struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
1395 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); 1398 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
1396 1399
1397 if (tv_mode->nbr_end < 480 && mode_ptr->vdisplay == 480) 1400 if (tv_mode->nbr_end < 480 && mode_ptr->vdisplay == 480)
1398 mode_ptr->type |= DRM_MODE_TYPE_PREFERRED; 1401 mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
@@ -1417,8 +1420,8 @@ intel_tv_get_modes(struct drm_connector *connector)
1417{ 1420{
1418 struct drm_display_mode *mode_ptr; 1421 struct drm_display_mode *mode_ptr;
1419 struct drm_encoder *encoder = intel_attached_encoder(connector); 1422 struct drm_encoder *encoder = intel_attached_encoder(connector);
1420 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1423 struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
1421 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); 1424 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
1422 int j, count = 0; 1425 int j, count = 0;
1423 u64 tmp; 1426 u64 tmp;
1424 1427
@@ -1483,8 +1486,7 @@ intel_tv_set_property(struct drm_connector *connector, struct drm_property *prop
1483{ 1486{
1484 struct drm_device *dev = connector->dev; 1487 struct drm_device *dev = connector->dev;
1485 struct drm_encoder *encoder = intel_attached_encoder(connector); 1488 struct drm_encoder *encoder = intel_attached_encoder(connector);
1486 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1489 struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
1487 struct intel_tv_priv *tv_priv = intel_encoder->dev_priv;
1488 struct drm_crtc *crtc = encoder->crtc; 1490 struct drm_crtc *crtc = encoder->crtc;
1489 int ret = 0; 1491 int ret = 0;
1490 bool changed = false; 1492 bool changed = false;
@@ -1494,30 +1496,30 @@ intel_tv_set_property(struct drm_connector *connector, struct drm_property *prop
1494 goto out; 1496 goto out;
1495 1497
1496 if (property == dev->mode_config.tv_left_margin_property && 1498 if (property == dev->mode_config.tv_left_margin_property &&
1497 tv_priv->margin[TV_MARGIN_LEFT] != val) { 1499 intel_tv->margin[TV_MARGIN_LEFT] != val) {
1498 tv_priv->margin[TV_MARGIN_LEFT] = val; 1500 intel_tv->margin[TV_MARGIN_LEFT] = val;
1499 changed = true; 1501 changed = true;
1500 } else if (property == dev->mode_config.tv_right_margin_property && 1502 } else if (property == dev->mode_config.tv_right_margin_property &&
1501 tv_priv->margin[TV_MARGIN_RIGHT] != val) { 1503 intel_tv->margin[TV_MARGIN_RIGHT] != val) {
1502 tv_priv->margin[TV_MARGIN_RIGHT] = val; 1504 intel_tv->margin[TV_MARGIN_RIGHT] = val;
1503 changed = true; 1505 changed = true;
1504 } else if (property == dev->mode_config.tv_top_margin_property && 1506 } else if (property == dev->mode_config.tv_top_margin_property &&
1505 tv_priv->margin[TV_MARGIN_TOP] != val) { 1507 intel_tv->margin[TV_MARGIN_TOP] != val) {
1506 tv_priv->margin[TV_MARGIN_TOP] = val; 1508 intel_tv->margin[TV_MARGIN_TOP] = val;
1507 changed = true; 1509 changed = true;
1508 } else if (property == dev->mode_config.tv_bottom_margin_property && 1510 } else if (property == dev->mode_config.tv_bottom_margin_property &&
1509 tv_priv->margin[TV_MARGIN_BOTTOM] != val) { 1511 intel_tv->margin[TV_MARGIN_BOTTOM] != val) {
1510 tv_priv->margin[TV_MARGIN_BOTTOM] = val; 1512 intel_tv->margin[TV_MARGIN_BOTTOM] = val;
1511 changed = true; 1513 changed = true;
1512 } else if (property == dev->mode_config.tv_mode_property) { 1514 } else if (property == dev->mode_config.tv_mode_property) {
1513 if (val >= ARRAY_SIZE(tv_modes)) { 1515 if (val >= ARRAY_SIZE(tv_modes)) {
1514 ret = -EINVAL; 1516 ret = -EINVAL;
1515 goto out; 1517 goto out;
1516 } 1518 }
1517 if (!strcmp(tv_priv->tv_format, tv_modes[val].name)) 1519 if (!strcmp(intel_tv->tv_format, tv_modes[val].name))
1518 goto out; 1520 goto out;
1519 1521
1520 tv_priv->tv_format = tv_modes[val].name; 1522 intel_tv->tv_format = tv_modes[val].name;
1521 changed = true; 1523 changed = true;
1522 } else { 1524 } else {
1523 ret = -EINVAL; 1525 ret = -EINVAL;
@@ -1553,16 +1555,8 @@ static const struct drm_connector_helper_funcs intel_tv_connector_helper_funcs =
1553 .best_encoder = intel_attached_encoder, 1555 .best_encoder = intel_attached_encoder,
1554}; 1556};
1555 1557
1556static void intel_tv_enc_destroy(struct drm_encoder *encoder)
1557{
1558 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
1559
1560 drm_encoder_cleanup(encoder);
1561 kfree(intel_encoder);
1562}
1563
1564static const struct drm_encoder_funcs intel_tv_enc_funcs = { 1558static const struct drm_encoder_funcs intel_tv_enc_funcs = {
1565 .destroy = intel_tv_enc_destroy, 1559 .destroy = intel_encoder_destroy,
1566}; 1560};
1567 1561
1568/* 1562/*
@@ -1606,9 +1600,9 @@ intel_tv_init(struct drm_device *dev)
1606{ 1600{
1607 struct drm_i915_private *dev_priv = dev->dev_private; 1601 struct drm_i915_private *dev_priv = dev->dev_private;
1608 struct drm_connector *connector; 1602 struct drm_connector *connector;
1603 struct intel_tv *intel_tv;
1609 struct intel_encoder *intel_encoder; 1604 struct intel_encoder *intel_encoder;
1610 struct intel_connector *intel_connector; 1605 struct intel_connector *intel_connector;
1611 struct intel_tv_priv *tv_priv;
1612 u32 tv_dac_on, tv_dac_off, save_tv_dac; 1606 u32 tv_dac_on, tv_dac_off, save_tv_dac;
1613 char **tv_format_names; 1607 char **tv_format_names;
1614 int i, initial_mode = 0; 1608 int i, initial_mode = 0;
@@ -1647,18 +1641,18 @@ intel_tv_init(struct drm_device *dev)
1647 (tv_dac_off & TVDAC_STATE_CHG_EN) != 0) 1641 (tv_dac_off & TVDAC_STATE_CHG_EN) != 0)
1648 return; 1642 return;
1649 1643
1650 intel_encoder = kzalloc(sizeof(struct intel_encoder) + 1644 intel_tv = kzalloc(sizeof(struct intel_tv), GFP_KERNEL);
1651 sizeof(struct intel_tv_priv), GFP_KERNEL); 1645 if (!intel_tv) {
1652 if (!intel_encoder) {
1653 return; 1646 return;
1654 } 1647 }
1655 1648
1656 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); 1649 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
1657 if (!intel_connector) { 1650 if (!intel_connector) {
1658 kfree(intel_encoder); 1651 kfree(intel_tv);
1659 return; 1652 return;
1660 } 1653 }
1661 1654
1655 intel_encoder = &intel_tv->base;
1662 connector = &intel_connector->base; 1656 connector = &intel_connector->base;
1663 1657
1664 drm_connector_init(dev, connector, &intel_tv_connector_funcs, 1658 drm_connector_init(dev, connector, &intel_tv_connector_funcs,
@@ -1668,22 +1662,20 @@ intel_tv_init(struct drm_device *dev)
1668 DRM_MODE_ENCODER_TVDAC); 1662 DRM_MODE_ENCODER_TVDAC);
1669 1663
1670 drm_mode_connector_attach_encoder(&intel_connector->base, &intel_encoder->enc); 1664 drm_mode_connector_attach_encoder(&intel_connector->base, &intel_encoder->enc);
1671 tv_priv = (struct intel_tv_priv *)(intel_encoder + 1);
1672 intel_encoder->type = INTEL_OUTPUT_TVOUT; 1665 intel_encoder->type = INTEL_OUTPUT_TVOUT;
1673 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 1666 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1674 intel_encoder->clone_mask = (1 << INTEL_TV_CLONE_BIT); 1667 intel_encoder->clone_mask = (1 << INTEL_TV_CLONE_BIT);
1675 intel_encoder->enc.possible_crtcs = ((1 << 0) | (1 << 1)); 1668 intel_encoder->enc.possible_crtcs = ((1 << 0) | (1 << 1));
1676 intel_encoder->enc.possible_clones = (1 << INTEL_OUTPUT_TVOUT); 1669 intel_encoder->enc.possible_clones = (1 << INTEL_OUTPUT_TVOUT);
1677 intel_encoder->dev_priv = tv_priv; 1670 intel_tv->type = DRM_MODE_CONNECTOR_Unknown;
1678 tv_priv->type = DRM_MODE_CONNECTOR_Unknown;
1679 1671
1680 /* BIOS margin values */ 1672 /* BIOS margin values */
1681 tv_priv->margin[TV_MARGIN_LEFT] = 54; 1673 intel_tv->margin[TV_MARGIN_LEFT] = 54;
1682 tv_priv->margin[TV_MARGIN_TOP] = 36; 1674 intel_tv->margin[TV_MARGIN_TOP] = 36;
1683 tv_priv->margin[TV_MARGIN_RIGHT] = 46; 1675 intel_tv->margin[TV_MARGIN_RIGHT] = 46;
1684 tv_priv->margin[TV_MARGIN_BOTTOM] = 37; 1676 intel_tv->margin[TV_MARGIN_BOTTOM] = 37;
1685 1677
1686 tv_priv->tv_format = kstrdup(tv_modes[initial_mode].name, GFP_KERNEL); 1678 intel_tv->tv_format = kstrdup(tv_modes[initial_mode].name, GFP_KERNEL);
1687 1679
1688 drm_encoder_helper_add(&intel_encoder->enc, &intel_tv_helper_funcs); 1680 drm_encoder_helper_add(&intel_encoder->enc, &intel_tv_helper_funcs);
1689 drm_connector_helper_add(connector, &intel_tv_connector_helper_funcs); 1681 drm_connector_helper_add(connector, &intel_tv_connector_helper_funcs);
@@ -1703,16 +1695,16 @@ intel_tv_init(struct drm_device *dev)
1703 initial_mode); 1695 initial_mode);
1704 drm_connector_attach_property(connector, 1696 drm_connector_attach_property(connector,
1705 dev->mode_config.tv_left_margin_property, 1697 dev->mode_config.tv_left_margin_property,
1706 tv_priv->margin[TV_MARGIN_LEFT]); 1698 intel_tv->margin[TV_MARGIN_LEFT]);
1707 drm_connector_attach_property(connector, 1699 drm_connector_attach_property(connector,
1708 dev->mode_config.tv_top_margin_property, 1700 dev->mode_config.tv_top_margin_property,
1709 tv_priv->margin[TV_MARGIN_TOP]); 1701 intel_tv->margin[TV_MARGIN_TOP]);
1710 drm_connector_attach_property(connector, 1702 drm_connector_attach_property(connector,
1711 dev->mode_config.tv_right_margin_property, 1703 dev->mode_config.tv_right_margin_property,
1712 tv_priv->margin[TV_MARGIN_RIGHT]); 1704 intel_tv->margin[TV_MARGIN_RIGHT]);
1713 drm_connector_attach_property(connector, 1705 drm_connector_attach_property(connector,
1714 dev->mode_config.tv_bottom_margin_property, 1706 dev->mode_config.tv_bottom_margin_property,
1715 tv_priv->margin[TV_MARGIN_BOTTOM]); 1707 intel_tv->margin[TV_MARGIN_BOTTOM]);
1716out: 1708out:
1717 drm_sysfs_connector_add(connector); 1709 drm_sysfs_connector_add(connector);
1718} 1710}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-02 11:15:21 -0500