diff options
author | Owain G. Ainsworth <oga@openbsd.org> | 2009-02-20 03:30:19 -0500 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2009-03-27 18:12:07 -0400 |
commit | ad086c833d00ef3be56ec554b1061f19e87a6210 (patch) | |
tree | ccbb4138abf7dba94c8debf871eae7a56b4347cc /drivers/gpu/drm/i915 | |
parent | a6172a80ecb7ac64151960de1f709f78b509c57c (diff) |
i915/drm: Remove two redundant agp_chipset_flushes
agp_chipset_flush() is for flushing the intel GMCH write cache via the
IFP, these two uses are for when we're getting the object into the cpu
READ domain, and thus should not be needed. This confused me when I was
getting my head around the code.
With thanks to airlied for helping me check my mental picture of how the
flushes and clflushes are supposed to be used.
Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index f135c903305f..b52cba0f16d2 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -2381,7 +2381,6 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write) | |||
2381 | static int | 2381 | static int |
2382 | i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write) | 2382 | i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write) |
2383 | { | 2383 | { |
2384 | struct drm_device *dev = obj->dev; | ||
2385 | int ret; | 2384 | int ret; |
2386 | 2385 | ||
2387 | i915_gem_object_flush_gpu_write_domain(obj); | 2386 | i915_gem_object_flush_gpu_write_domain(obj); |
@@ -2400,7 +2399,6 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write) | |||
2400 | /* Flush the CPU cache if it's still invalid. */ | 2399 | /* Flush the CPU cache if it's still invalid. */ |
2401 | if ((obj->read_domains & I915_GEM_DOMAIN_CPU) == 0) { | 2400 | if ((obj->read_domains & I915_GEM_DOMAIN_CPU) == 0) { |
2402 | i915_gem_clflush_object(obj); | 2401 | i915_gem_clflush_object(obj); |
2403 | drm_agp_chipset_flush(dev); | ||
2404 | 2402 | ||
2405 | obj->read_domains |= I915_GEM_DOMAIN_CPU; | 2403 | obj->read_domains |= I915_GEM_DOMAIN_CPU; |
2406 | } | 2404 | } |
@@ -2612,7 +2610,6 @@ i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj) | |||
2612 | static void | 2610 | static void |
2613 | i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj) | 2611 | i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj) |
2614 | { | 2612 | { |
2615 | struct drm_device *dev = obj->dev; | ||
2616 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2613 | struct drm_i915_gem_object *obj_priv = obj->driver_private; |
2617 | 2614 | ||
2618 | if (!obj_priv->page_cpu_valid) | 2615 | if (!obj_priv->page_cpu_valid) |
@@ -2628,7 +2625,6 @@ i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj) | |||
2628 | continue; | 2625 | continue; |
2629 | drm_clflush_pages(obj_priv->pages + i, 1); | 2626 | drm_clflush_pages(obj_priv->pages + i, 1); |
2630 | } | 2627 | } |
2631 | drm_agp_chipset_flush(dev); | ||
2632 | } | 2628 | } |
2633 | 2629 | ||
2634 | /* Free the page_cpu_valid mappings which are now stale, whether | 2630 | /* Free the page_cpu_valid mappings which are now stale, whether |