drm/i915: wait for actual vblank, not just 20ms

Waiting for a hard coded 20ms isn't always enough to make sure a vblank
period has actually occurred, so add code to make sure we really have
passed through a vblank period (or that the pipe is off when disabling).

This prevents problems with mode setting and link training, and seems to
fix a bug like https://bugs.freedesktop.org/show_bug.cgi?id=29278, but
on an HP 8440p instead.  Hopefully also fixes
https://bugs.freedesktop.org/show_bug.cgi?id=29141.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>

1 files changed, 5 insertions, 4 deletions

diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 1bd6e8795011..d2029efee982 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1158,11 +1158,11 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
 
                 /* Wait for vblank for the disable to take effect */
                 if (!IS_I9XX(dev))
-                        intel_wait_for_vblank(dev);
+                        intel_wait_for_vblank(dev, intel_crtc->pipe);
 
                 I915_WRITE(pipeconf_reg, pipeconf & ~PIPEACONF_ENABLE);
                 /* Wait for vblank for the disable to take effect. */
-                intel_wait_for_vblank(dev);
+                intel_wait_for_vblank(dev, intel_crtc->pipe);
 
                 /* Filter ctl must be set before TV_WIN_SIZE */
                 I915_WRITE(TV_FILTER_CTL_1, TV_AUTO_SCALE);
@@ -1231,6 +1231,7 @@ intel_tv_detect_type (struct intel_tv *intel_tv)
         struct drm_encoder *encoder = &intel_tv->base.enc;
         struct drm_device *dev = encoder->dev;
         struct drm_i915_private *dev_priv = dev->dev_private;
+        struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
         unsigned long irqflags;
         u32 tv_ctl, save_tv_ctl;
         u32 tv_dac, save_tv_dac;
@@ -1267,11 +1268,11 @@ intel_tv_detect_type (struct intel_tv *intel_tv)
                    DAC_C_0_7_V);
         I915_WRITE(TV_CTL, tv_ctl);
         I915_WRITE(TV_DAC, tv_dac);
-        intel_wait_for_vblank(dev);
+        intel_wait_for_vblank(dev, intel_crtc->pipe);
         tv_dac = I915_READ(TV_DAC);
         I915_WRITE(TV_DAC, save_tv_dac);
         I915_WRITE(TV_CTL, save_tv_ctl);
-        intel_wait_for_vblank(dev);
+        intel_wait_for_vblank(dev, intel_crtc->pipe);
         /*
          *  A B C
          *  0 1 1 Composite