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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2013-05-24 10:59:17 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-05-31 14:53:52 -0400
commit4c4ff43a692b44c6e326f9f28208f3d78ea51f7e (patch)
tree6aaa585f7cec34c9181ed431dde9b406ab1828f7 /drivers/gpu/drm/i915/intel_sprite.c
parent64936258d7e426bee5f2392269b1b20172db9ffb (diff)
drm/i915: add "enable" argument to intel_update_sprite_watermarks
Because we want to call it from the "sprite disable" paths, since on Haswell we need to update the sprite watermarks when we disable sprites. For now, all this patch does is to add the "enable" argument and call intel_update_sprite_watermarks from inside ivb_disable_plane. This shouldn't change how the code behaves because on sandybridge_update_sprite_wm we just ignore the "!enable" case. The patches that implement Haswell watermarks will make use of the changes introduced by this patch. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sprite.c')
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 19b9cb961b5a..04d38d4d811a 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -114,7 +114,7 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_framebuffer *fb,
114 crtc_w--; 114 crtc_w--;
115 crtc_h--; 115 crtc_h--;
116 116
117 intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size); 117 intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true);
118 118
119 I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]); 119 I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]);
120 I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x); 120 I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x);
@@ -268,7 +268,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
268 crtc_w--; 268 crtc_w--;
269 crtc_h--; 269 crtc_h--;
270 270
271 intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size); 271 intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true);
272 272
273 /* 273 /*
274 * IVB workaround: must disable low power watermarks for at least 274 * IVB workaround: must disable low power watermarks for at least
@@ -335,6 +335,8 @@ ivb_disable_plane(struct drm_plane *plane)
335 335
336 dev_priv->sprite_scaling_enabled &= ~(1 << pipe); 336 dev_priv->sprite_scaling_enabled &= ~(1 << pipe);
337 337
338 intel_update_sprite_watermarks(dev, pipe, 0, 0, false);
339
338 /* potentially re-enable LP watermarks */ 340 /* potentially re-enable LP watermarks */
339 if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled) 341 if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled)
340 intel_update_watermarks(dev); 342 intel_update_watermarks(dev);
@@ -453,7 +455,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
453 crtc_w--; 455 crtc_w--;
454 crtc_h--; 456 crtc_h--;
455 457
456 intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size); 458 intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true);
457 459
458 dvsscale = 0; 460 dvsscale = 0;
459 if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h) 461 if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h)