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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-06-04 06:49:07 -0400 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-06-06 07:57:22 -0400 |
commit | 14420bd0065c1757a353e36ebc9cc4bdc6932dcd (patch) | |
tree | d6bb3515ad862a66897c2f5b1373fc3571416c60 /drivers/gpu/drm/i915/intel_sdvo.c | |
parent | 20674eef808dada6c30988a8cfcb908406cdea02 (diff) |
drm/i915: Assert dpll running in intel_crtc_load_lut() on pre-PCH platforms
Adding more context from Ville's reply to Rodrigo's question why we
need this:
"The spec says that on some hardware you need to PLL running before you
can poke at the palette registers. I didn't actually try to anger the
hardware so I'm not really sure what would happen otherwise, but IIRC
Jesse said something about a hard system hang..."
And generally documenting such ordering constraints with asserts is
Just Good.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
[danvet: Spruce up the commit message a lot.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo.c')
0 files changed, 0 insertions, 0 deletions