diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-12 11:40:25 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-12 11:40:25 -0500 |
commit | f878133bf022717b880d0e0995b8f91436fd605c (patch) | |
tree | b16528611d3af337f65f8ff0ae9b90b447e345ad /drivers/gpu/drm/i915/intel_sdvo.c | |
parent | 1b3862798cf4390b9110e54e405646e156f47c83 (diff) | |
parent | d15eda5c6edff4987af6f4423af0bab0c3251e74 (diff) |
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (39 commits)
i915/gtt: fix ordering causing DMAR errors on object teardown.
i915/gtt: fix ordering issues with status setup and DMAR
drm/i915/execbuffer: Reorder binding of objects to favour restrictions
drm/i915: If we hit OOM when allocating GTT pages, clear the aperture
drm/i915/evict: Ensure we completely cleanup on failure
drm/i915/execbuffer: Correctly clear the current object list upon EFAULT
drm/i915/debugfs: Show all objects in the gtt
drm/i915: Record AGP memory type upon error
drm/i915: Periodically flush the active lists and requests
drm/i915/gtt: Unmap the PCI pages after unbinding them from the GTT
drm/i915: Record the error batchbuffer on each ring
drm/i915: Include TLB miss overhead for computing WM
drm/i915: Propagate error from flushing the ring
drm/i915: detect & report PCH display error interrupts
drm/i915: cleanup rc6 code
drm/i915: fix rc6 enabling around suspend/resume
drm/i915: re-enable rc6 support for Ironlake+
drm/i915: Make the ring IMR handling private
drm/i915/ringbuffer: Simplify the ring irq refcounting
drm/i915/debugfs: Show the per-ring IMR
...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_sdvo.c | 33 |
1 files changed, 11 insertions, 22 deletions
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 9d0af36a13ec..45cd37652a37 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -1024,9 +1024,13 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1024 | if (!intel_sdvo_set_target_input(intel_sdvo)) | 1024 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1025 | return; | 1025 | return; |
1026 | 1026 | ||
1027 | if (intel_sdvo->has_hdmi_monitor && | 1027 | if (intel_sdvo->has_hdmi_monitor) { |
1028 | !intel_sdvo_set_avi_infoframe(intel_sdvo)) | 1028 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
1029 | return; | 1029 | intel_sdvo_set_colorimetry(intel_sdvo, |
1030 | SDVO_COLORIMETRY_RGB256); | ||
1031 | intel_sdvo_set_avi_infoframe(intel_sdvo); | ||
1032 | } else | ||
1033 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); | ||
1030 | 1034 | ||
1031 | if (intel_sdvo->is_tv && | 1035 | if (intel_sdvo->is_tv && |
1032 | !intel_sdvo_set_tv_format(intel_sdvo)) | 1036 | !intel_sdvo_set_tv_format(intel_sdvo)) |
@@ -1398,6 +1402,9 @@ intel_sdvo_detect(struct drm_connector *connector, bool force) | |||
1398 | 1402 | ||
1399 | intel_sdvo->attached_output = response; | 1403 | intel_sdvo->attached_output = response; |
1400 | 1404 | ||
1405 | intel_sdvo->has_hdmi_monitor = false; | ||
1406 | intel_sdvo->has_hdmi_audio = false; | ||
1407 | |||
1401 | if ((intel_sdvo_connector->output_flag & response) == 0) | 1408 | if ((intel_sdvo_connector->output_flag & response) == 0) |
1402 | ret = connector_status_disconnected; | 1409 | ret = connector_status_disconnected; |
1403 | else if (response & SDVO_TMDS_MASK) | 1410 | else if (response & SDVO_TMDS_MASK) |
@@ -1922,20 +1929,7 @@ intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, | |||
1922 | static bool | 1929 | static bool |
1923 | intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) | 1930 | intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) |
1924 | { | 1931 | { |
1925 | int is_hdmi; | 1932 | return intel_sdvo_check_supp_encode(intel_sdvo); |
1926 | |||
1927 | if (!intel_sdvo_check_supp_encode(intel_sdvo)) | ||
1928 | return false; | ||
1929 | |||
1930 | if (!intel_sdvo_set_target_output(intel_sdvo, | ||
1931 | device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1)) | ||
1932 | return false; | ||
1933 | |||
1934 | is_hdmi = 0; | ||
1935 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, &is_hdmi, 1)) | ||
1936 | return false; | ||
1937 | |||
1938 | return !!is_hdmi; | ||
1939 | } | 1933 | } |
1940 | 1934 | ||
1941 | static u8 | 1935 | static u8 |
@@ -2037,12 +2031,7 @@ intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) | |||
2037 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; | 2031 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; |
2038 | 2032 | ||
2039 | if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { | 2033 | if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { |
2040 | /* enable hdmi encoding mode if supported */ | ||
2041 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); | ||
2042 | intel_sdvo_set_colorimetry(intel_sdvo, | ||
2043 | SDVO_COLORIMETRY_RGB256); | ||
2044 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; | 2034 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; |
2045 | |||
2046 | intel_sdvo->is_hdmi = true; | 2035 | intel_sdvo->is_hdmi = true; |
2047 | } | 2036 | } |
2048 | intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | | 2037 | intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |