drm/i915/ringbuffer: Drop the redundant dev from the vfunc interface

The ringbuffer keeps a pointer to the parent device, so we can use that
instead of passing around the pointer on the stack.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

1 files changed, 176 insertions, 202 deletions

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 09f2dc353ae2..d6eba661105f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -49,11 +49,11 @@ static u32 i915_gem_get_seqno(struct drm_device *dev)
 }
 
 static void
-render_ring_flush(struct drm_device *dev,
-                  struct intel_ring_buffer *ring,
+render_ring_flush(struct intel_ring_buffer *ring,
                   u32   invalidate_domains,
                   u32   flush_domains)
 {
+        struct drm_device *dev = ring->dev;
         drm_i915_private_t *dev_priv = dev->dev_private;
         u32 cmd;
 
@@ -112,43 +112,39 @@ render_ring_flush(struct drm_device *dev,
 #if WATCH_EXEC
                 DRM_INFO("%s: queue flush %08x to ring\n", __func__, cmd);
 #endif
-                intel_ring_begin(dev, ring, 2);
-                intel_ring_emit(dev, ring, cmd);
-                intel_ring_emit(dev, ring, MI_NOOP);
-                intel_ring_advance(dev, ring);
+                intel_ring_begin(ring, 2);
+                intel_ring_emit(ring, cmd);
+                intel_ring_emit(ring, MI_NOOP);
+                intel_ring_advance(ring);
         }
 }
 
-static void ring_write_tail(struct drm_device *dev,
-                            struct intel_ring_buffer *ring,
+static void ring_write_tail(struct intel_ring_buffer *ring,
                             u32 value)
 {
-        drm_i915_private_t *dev_priv = dev->dev_private;
+        drm_i915_private_t *dev_priv = ring->dev->dev_private;
         I915_WRITE_TAIL(ring, value);
 }
 
-u32 intel_ring_get_active_head(struct drm_device *dev,
-                               struct intel_ring_buffer *ring)
+u32 intel_ring_get_active_head(struct intel_ring_buffer *ring)
 {
-        drm_i915_private_t *dev_priv = dev->dev_private;
-        u32 acthd_reg = INTEL_INFO(dev)->gen >= 4 ?
+        drm_i915_private_t *dev_priv = ring->dev->dev_private;
+        u32 acthd_reg = INTEL_INFO(ring->dev)->gen >= 4 ?
                         RING_ACTHD(ring->mmio_base) : ACTHD;
 
         return I915_READ(acthd_reg);
 }
 
-static int init_ring_common(struct drm_device *dev,
-                            struct intel_ring_buffer *ring)
+static int init_ring_common(struct intel_ring_buffer *ring)
 {
+        drm_i915_private_t *dev_priv = ring->dev->dev_private;
+        struct drm_i915_gem_object *obj_priv = to_intel_bo(ring->gem_object);
         u32 head;
-        drm_i915_private_t *dev_priv = dev->dev_private;
-        struct drm_i915_gem_object *obj_priv;
-        obj_priv = to_intel_bo(ring->gem_object);
 
         /* Stop the ring if it's running. */
         I915_WRITE_CTL(ring, 0);
         I915_WRITE_HEAD(ring, 0);
-        ring->write_tail(dev, ring, 0);
+        ring->write_tail(ring, 0);
 
         /* Initialize the ring. */
         I915_WRITE_START(ring, obj_priv->gtt_offset);
@@ -192,8 +188,8 @@ static int init_ring_common(struct drm_device *dev,
                 return -EIO;
         }
 
-        if (!drm_core_check_feature(dev, DRIVER_MODESET))
-                i915_kernel_lost_context(dev);
+        if (!drm_core_check_feature(ring->dev, DRIVER_MODESET))
+                i915_kernel_lost_context(ring->dev);
         else {
                 ring->head = I915_READ_HEAD(ring) & HEAD_ADDR;
                 ring->tail = I915_READ_TAIL(ring) & TAIL_ADDR;
@@ -204,29 +200,29 @@ static int init_ring_common(struct drm_device *dev,
         return 0;
 }
 
-static int init_render_ring(struct drm_device *dev,
-                            struct intel_ring_buffer *ring)
+static int init_render_ring(struct intel_ring_buffer *ring)
 {
-        drm_i915_private_t *dev_priv = dev->dev_private;
-        int ret = init_ring_common(dev, ring);
-        int mode;
+        struct drm_device *dev = ring->dev;
+        int ret = init_ring_common(ring);
 
         if (INTEL_INFO(dev)->gen > 3) {
-                mode = VS_TIMER_DISPATCH << 16 | VS_TIMER_DISPATCH;
+                drm_i915_private_t *dev_priv = dev->dev_private;
+                int mode = VS_TIMER_DISPATCH << 16 | VS_TIMER_DISPATCH;
                 if (IS_GEN6(dev))
                         mode |= MI_FLUSH_ENABLE << 16 | MI_FLUSH_ENABLE;
                 I915_WRITE(MI_MODE, mode);
         }
+
         return ret;
 }
 
-#define PIPE_CONTROL_FLUSH(addr)                                        \
+#define PIPE_CONTROL_FLUSH(ring__, addr__)                                      \
 do {                                                                    \
-        OUT_RING(GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE |          \
+        intel_ring_emit(ring__, GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE |           \
                  PIPE_CONTROL_DEPTH_STALL | 2);                         \
-        OUT_RING(addr | PIPE_CONTROL_GLOBAL_GTT);                       \
-        OUT_RING(0);                                                    \
-        OUT_RING(0);                                                    \
+        intel_ring_emit(ring__, (addr__) | PIPE_CONTROL_GLOBAL_GTT);                    \
+        intel_ring_emit(ring__, 0);                                                     \
+        intel_ring_emit(ring__, 0);                                                     \
 } while (0)
 
 /**
@@ -238,26 +234,26 @@ do {									\
  * Returned sequence numbers are nonzero on success.
  */
 static u32
-render_ring_add_request(struct drm_device *dev,
-                        struct intel_ring_buffer *ring,
+render_ring_add_request(struct intel_ring_buffer *ring,
                         u32 flush_domains)
 {
+        struct drm_device *dev = ring->dev;
         drm_i915_private_t *dev_priv = dev->dev_private;
         u32 seqno;
 
         seqno = i915_gem_get_seqno(dev);
 
         if (IS_GEN6(dev)) {
-                BEGIN_LP_RING(6);
-                OUT_RING(GFX_OP_PIPE_CONTROL | 3);
-                OUT_RING(PIPE_CONTROL_QW_WRITE |
+                intel_ring_begin(ring, 6);
+                intel_ring_emit(ring, GFX_OP_PIPE_CONTROL | 3);
+                intel_ring_emit(ring, PIPE_CONTROL_QW_WRITE |
                          PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_IS_FLUSH |
                          PIPE_CONTROL_NOTIFY);
-                OUT_RING(dev_priv->seqno_gfx_addr | PIPE_CONTROL_GLOBAL_GTT);
-                OUT_RING(seqno);
-                OUT_RING(0);
-                OUT_RING(0);
-                ADVANCE_LP_RING();
+                intel_ring_emit(ring, dev_priv->seqno_gfx_addr | PIPE_CONTROL_GLOBAL_GTT);
+                intel_ring_emit(ring, seqno);
+                intel_ring_emit(ring, 0);
+                intel_ring_emit(ring, 0);
+                intel_ring_advance(ring);
         } else if (HAS_PIPE_CONTROL(dev)) {
                 u32 scratch_addr = dev_priv->seqno_gfx_addr + 128;
 
@@ -266,46 +262,46 @@ render_ring_add_request(struct drm_device *dev,
                  * PIPE_NOTIFY buffers out to memory before requesting
                  * an interrupt.
                  */
-                BEGIN_LP_RING(32);
-                OUT_RING(GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE |
+                intel_ring_begin(ring, 32);
+                intel_ring_emit(ring, GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE |
                          PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_TC_FLUSH);
-                OUT_RING(dev_priv->seqno_gfx_addr | PIPE_CONTROL_GLOBAL_GTT);
-                OUT_RING(seqno);
-                OUT_RING(0);
-                PIPE_CONTROL_FLUSH(scratch_addr);
+                intel_ring_emit(ring, dev_priv->seqno_gfx_addr | PIPE_CONTROL_GLOBAL_GTT);
+                intel_ring_emit(ring, seqno);
+                intel_ring_emit(ring, 0);
+                PIPE_CONTROL_FLUSH(ring, scratch_addr);
                 scratch_addr += 128; /* write to separate cachelines */
-                PIPE_CONTROL_FLUSH(scratch_addr);
+                PIPE_CONTROL_FLUSH(ring, scratch_addr);
                 scratch_addr += 128;
-                PIPE_CONTROL_FLUSH(scratch_addr);
+                PIPE_CONTROL_FLUSH(ring, scratch_addr);
                 scratch_addr += 128;
-                PIPE_CONTROL_FLUSH(scratch_addr);
+                PIPE_CONTROL_FLUSH(ring, scratch_addr);
                 scratch_addr += 128;
-                PIPE_CONTROL_FLUSH(scratch_addr);
+                PIPE_CONTROL_FLUSH(ring, scratch_addr);
                 scratch_addr += 128;
-                PIPE_CONTROL_FLUSH(scratch_addr);
-                OUT_RING(GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE |
+                PIPE_CONTROL_FLUSH(ring, scratch_addr);
+                intel_ring_emit(ring, GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE |
                          PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_TC_FLUSH |
                          PIPE_CONTROL_NOTIFY);
-                OUT_RING(dev_priv->seqno_gfx_addr | PIPE_CONTROL_GLOBAL_GTT);
-                OUT_RING(seqno);
-                OUT_RING(0);
-                ADVANCE_LP_RING();
+                intel_ring_emit(ring, dev_priv->seqno_gfx_addr | PIPE_CONTROL_GLOBAL_GTT);
+                intel_ring_emit(ring, seqno);
+                intel_ring_emit(ring, 0);
+                intel_ring_advance(ring);
         } else {
-                BEGIN_LP_RING(4);
-                OUT_RING(MI_STORE_DWORD_INDEX);
-                OUT_RING(I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-                OUT_RING(seqno);
+                intel_ring_begin(ring, 4);
+                intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
+                intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
+                intel_ring_emit(ring, seqno);
 
-                OUT_RING(MI_USER_INTERRUPT);
-                ADVANCE_LP_RING();
+                intel_ring_emit(ring, MI_USER_INTERRUPT);
+                intel_ring_advance(ring);
         }
         return seqno;
 }
 
 static u32
-render_ring_get_seqno(struct drm_device *dev,
-                      struct intel_ring_buffer *ring)
+render_ring_get_seqno(struct intel_ring_buffer *ring)
 {
+        struct drm_device *dev = ring->dev;
         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
         if (HAS_PIPE_CONTROL(dev))
                 return ((volatile u32 *)(dev_priv->seqno_page))[0];
@@ -314,9 +310,9 @@ render_ring_get_seqno(struct drm_device *dev,
 }
 
 static void
-render_ring_get_user_irq(struct drm_device *dev,
-                         struct intel_ring_buffer *ring)
+render_ring_get_user_irq(struct intel_ring_buffer *ring)
 {
+        struct drm_device *dev = ring->dev;
         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
         unsigned long irqflags;
 
@@ -331,9 +327,9 @@ render_ring_get_user_irq(struct drm_device *dev,
 }
 
 static void
-render_ring_put_user_irq(struct drm_device *dev,
-                         struct intel_ring_buffer *ring)
+render_ring_put_user_irq(struct intel_ring_buffer *ring)
 {
+        struct drm_device *dev = ring->dev;
         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
         unsigned long irqflags;
 
@@ -348,56 +344,41 @@ render_ring_put_user_irq(struct drm_device *dev,
         spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags);
 }
 
-void intel_ring_setup_status_page(struct drm_device *dev,
-                                  struct intel_ring_buffer *ring)
+void intel_ring_setup_status_page(struct intel_ring_buffer *ring)
 {
-        drm_i915_private_t *dev_priv = dev->dev_private;
-        if (IS_GEN6(dev)) {
-                I915_WRITE(RING_HWS_PGA_GEN6(ring->mmio_base),
-                           ring->status_page.gfx_addr);
-                I915_READ(RING_HWS_PGA_GEN6(ring->mmio_base)); /* posting read */
-        } else {
-                I915_WRITE(RING_HWS_PGA(ring->mmio_base),
-                           ring->status_page.gfx_addr);
-                I915_READ(RING_HWS_PGA(ring->mmio_base)); /* posting read */
-        }
-
+        drm_i915_private_t *dev_priv = ring->dev->dev_private;
+        u32 mmio = IS_GEN6(ring->dev) ?
+                RING_HWS_PGA_GEN6(ring->mmio_base) :
+                RING_HWS_PGA(ring->mmio_base);
+        I915_WRITE(mmio, (u32)ring->status_page.gfx_addr);
+        POSTING_READ(mmio);
 }
 
 static void
-bsd_ring_flush(struct drm_device *dev,
-                struct intel_ring_buffer *ring,
-                u32     invalidate_domains,
-                u32     flush_domains)
-{
-        intel_ring_begin(dev, ring, 2);
-        intel_ring_emit(dev, ring, MI_FLUSH);
-        intel_ring_emit(dev, ring, MI_NOOP);
-        intel_ring_advance(dev, ring);
-}
-
-static int init_bsd_ring(struct drm_device *dev,
-                         struct intel_ring_buffer *ring)
+bsd_ring_flush(struct intel_ring_buffer *ring,
+               u32     invalidate_domains,
+               u32     flush_domains)
 {
-        return init_ring_common(dev, ring);
+        intel_ring_begin(ring, 2);
+        intel_ring_emit(ring, MI_FLUSH);
+        intel_ring_emit(ring, MI_NOOP);
+        intel_ring_advance(ring);
 }
 
 static u32
-ring_add_request(struct drm_device *dev,
-                 struct intel_ring_buffer *ring,
+ring_add_request(struct intel_ring_buffer *ring,
                  u32 flush_domains)
 {
         u32 seqno;
 
-        seqno = i915_gem_get_seqno(dev);
+        seqno = i915_gem_get_seqno(ring->dev);
 
-        intel_ring_begin(dev, ring, 4);
-        intel_ring_emit(dev, ring, MI_STORE_DWORD_INDEX);
-        intel_ring_emit(dev, ring,
-                        I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-        intel_ring_emit(dev, ring, seqno);
-        intel_ring_emit(dev, ring, MI_USER_INTERRUPT);
-        intel_ring_advance(dev, ring);
+        intel_ring_begin(ring, 4);
+        intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
+        intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
+        intel_ring_emit(ring, seqno);
+        intel_ring_emit(ring, MI_USER_INTERRUPT);
+        intel_ring_advance(ring);
 
         DRM_DEBUG_DRIVER("%s %d\n", ring->name, seqno);
 
@@ -405,53 +386,55 @@ ring_add_request(struct drm_device *dev,
 }
 
 static void
-bsd_ring_get_user_irq(struct drm_device *dev,
-                      struct intel_ring_buffer *ring)
+bsd_ring_get_user_irq(struct intel_ring_buffer *ring)
 {
         /* do nothing */
 }
 static void
-bsd_ring_put_user_irq(struct drm_device *dev,
-                      struct intel_ring_buffer *ring)
+bsd_ring_put_user_irq(struct intel_ring_buffer *ring)
 {
         /* do nothing */
 }
 
 static u32
-ring_status_page_get_seqno(struct drm_device *dev,
-                           struct intel_ring_buffer *ring)
+ring_status_page_get_seqno(struct intel_ring_buffer *ring)
 {
         return intel_read_status_page(ring, I915_GEM_HWS_INDEX);
 }
 
 static int
-ring_dispatch_gem_execbuffer(struct drm_device *dev,
-                             struct intel_ring_buffer *ring,
-                             struct drm_i915_gem_execbuffer2 *exec,
-                             struct drm_clip_rect *cliprects,
-                             uint64_t exec_offset)
+ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
+                         struct drm_i915_gem_execbuffer2 *exec,
+                         struct drm_clip_rect *cliprects,
+                         uint64_t exec_offset)
 {
         uint32_t exec_start;
+
         exec_start = (uint32_t) exec_offset + exec->batch_start_offset;
-        intel_ring_begin(dev, ring, 2);
-        intel_ring_emit(dev, ring, MI_BATCH_BUFFER_START |
-                        (2 << 6) | MI_BATCH_NON_SECURE_I965);
-        intel_ring_emit(dev, ring, exec_start);
-        intel_ring_advance(dev, ring);
+
+        intel_ring_begin(ring, 2);
+        intel_ring_emit(ring,
+                        MI_BATCH_BUFFER_START |
+                        (2 << 6) |
+                        MI_BATCH_NON_SECURE_I965);
+        intel_ring_emit(ring, exec_start);
+        intel_ring_advance(ring);
+
         return 0;
 }
 
 static int
-render_ring_dispatch_gem_execbuffer(struct drm_device *dev,
-                                    struct intel_ring_buffer *ring,
-                                    struct drm_i915_gem_execbuffer2 *exec,
-                                    struct drm_clip_rect *cliprects,
-                                    uint64_t exec_offset)
+render_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
+                                struct drm_i915_gem_execbuffer2 *exec,
+                                struct drm_clip_rect *cliprects,
+                                uint64_t exec_offset)
 {
+        struct drm_device *dev = ring->dev;
         drm_i915_private_t *dev_priv = dev->dev_private;
         int nbox = exec->num_cliprects;
         int i = 0, count;
         uint32_t exec_start, exec_len;
+
         exec_start = (uint32_t) exec_offset + exec->batch_start_offset;
         exec_len = (uint32_t) exec->batch_len;
 
@@ -468,46 +451,44 @@ render_ring_dispatch_gem_execbuffer(struct drm_device *dev,
                 }
 
                 if (IS_I830(dev) || IS_845G(dev)) {
-                        intel_ring_begin(dev, ring, 4);
-                        intel_ring_emit(dev, ring, MI_BATCH_BUFFER);
-                        intel_ring_emit(dev, ring,
-                                        exec_start | MI_BATCH_NON_SECURE);
-                        intel_ring_emit(dev, ring, exec_start + exec_len - 4);
-                        intel_ring_emit(dev, ring, 0);
+                        intel_ring_begin(ring, 4);
+                        intel_ring_emit(ring, MI_BATCH_BUFFER);
+                        intel_ring_emit(ring, exec_start | MI_BATCH_NON_SECURE);
+                        intel_ring_emit(ring, exec_start + exec_len - 4);
+                        intel_ring_emit(ring, 0);
                 } else {
-                        intel_ring_begin(dev, ring, 2);
+                        intel_ring_begin(ring, 2);
                         if (INTEL_INFO(dev)->gen >= 4) {
-                                intel_ring_emit(dev, ring,
+                                intel_ring_emit(ring,
                                                 MI_BATCH_BUFFER_START | (2 << 6)
                                                 | MI_BATCH_NON_SECURE_I965);
-                                intel_ring_emit(dev, ring, exec_start);
+                                intel_ring_emit(ring, exec_start);
                         } else {
-                                intel_ring_emit(dev, ring, MI_BATCH_BUFFER_START
+                                intel_ring_emit(ring, MI_BATCH_BUFFER_START
                                                 | (2 << 6));
-                                intel_ring_emit(dev, ring, exec_start |
+                                intel_ring_emit(ring, exec_start |
                                                 MI_BATCH_NON_SECURE);
                         }
                 }
-                intel_ring_advance(dev, ring);
+                intel_ring_advance(ring);
         }
 
         if (IS_G4X(dev) || IS_GEN5(dev)) {
-                intel_ring_begin(dev, ring, 2);
-                intel_ring_emit(dev, ring, MI_FLUSH |
+                intel_ring_begin(ring, 2);
+                intel_ring_emit(ring, MI_FLUSH |
                                 MI_NO_WRITE_FLUSH |
                                 MI_INVALIDATE_ISP );
-                intel_ring_emit(dev, ring, MI_NOOP);
-                intel_ring_advance(dev, ring);
+                intel_ring_emit(ring, MI_NOOP);
+                intel_ring_advance(ring);
         }
         /* XXX breadcrumb */
 
         return 0;
 }
 
-static void cleanup_status_page(struct drm_device *dev,
-                                struct intel_ring_buffer *ring)
+static void cleanup_status_page(struct intel_ring_buffer *ring)
 {
-        drm_i915_private_t *dev_priv = dev->dev_private;
+        drm_i915_private_t *dev_priv = ring->dev->dev_private;
         struct drm_gem_object *obj;
         struct drm_i915_gem_object *obj_priv;
 
@@ -524,9 +505,9 @@ static void cleanup_status_page(struct drm_device *dev,
         memset(&dev_priv->hws_map, 0, sizeof(dev_priv->hws_map));
 }
 
-static int init_status_page(struct drm_device *dev,
-                            struct intel_ring_buffer *ring)
+static int init_status_page(struct intel_ring_buffer *ring)
 {
+        struct drm_device *dev = ring->dev;
         drm_i915_private_t *dev_priv = dev->dev_private;
         struct drm_gem_object *obj;
         struct drm_i915_gem_object *obj_priv;
@@ -555,7 +536,7 @@ static int init_status_page(struct drm_device *dev,
         ring->status_page.obj = obj;
         memset(ring->status_page.page_addr, 0, PAGE_SIZE);
 
-        intel_ring_setup_status_page(dev, ring);
+        intel_ring_setup_status_page(ring);
         DRM_DEBUG_DRIVER("%s hws offset: 0x%08x\n",
                         ring->name, ring->status_page.gfx_addr);
 
@@ -583,7 +564,7 @@ int intel_init_ring_buffer(struct drm_device *dev,
         INIT_LIST_HEAD(&ring->gpu_write_list);
 
         if (I915_NEED_GFX_HWS(dev)) {
-                ret = init_status_page(dev, ring);
+                ret = init_status_page(ring);
                 if (ret)
                         return ret;
         }
@@ -616,7 +597,7 @@ int intel_init_ring_buffer(struct drm_device *dev,
         }
 
         ring->virtual_start = ring->map.handle;
-        ret = ring->init(dev, ring);
+        ret = ring->init(ring);
         if (ret)
                 goto err_unmap;
 
@@ -639,33 +620,32 @@ err_unref:
         drm_gem_object_unreference(obj);
         ring->gem_object = NULL;
 err_hws:
-        cleanup_status_page(dev, ring);
+        cleanup_status_page(ring);
         return ret;
 }
 
-void intel_cleanup_ring_buffer(struct drm_device *dev,
-                               struct intel_ring_buffer *ring)
+void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring)
 {
         if (ring->gem_object == NULL)
                 return;
 
-        drm_core_ioremapfree(&ring->map, dev);
+        drm_core_ioremapfree(&ring->map, ring->dev);
 
         i915_gem_object_unpin(ring->gem_object);
         drm_gem_object_unreference(ring->gem_object);
         ring->gem_object = NULL;
-        cleanup_status_page(dev, ring);
+
+        cleanup_status_page(ring);
 }
 
-static int intel_wrap_ring_buffer(struct drm_device *dev,
-                                  struct intel_ring_buffer *ring)
+static int intel_wrap_ring_buffer(struct intel_ring_buffer *ring)
 {
         unsigned int *virt;
         int rem;
         rem = ring->size - ring->tail;
 
         if (ring->space < rem) {
-                int ret = intel_wait_ring_buffer(dev, ring, rem);
+                int ret = intel_wait_ring_buffer(ring, rem);
                 if (ret)
                         return ret;
         }
@@ -683,11 +663,11 @@ static int intel_wrap_ring_buffer(struct drm_device *dev,
         return 0;
 }
 
-int intel_wait_ring_buffer(struct drm_device *dev,
-                           struct intel_ring_buffer *ring, int n)
+int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
 {
-        unsigned long end;
+        struct drm_device *dev = ring->dev;
         drm_i915_private_t *dev_priv = dev->dev_private;
+        unsigned long end;
 
         trace_i915_ring_wait_begin (dev);
         end = jiffies + 3 * HZ;
@@ -697,7 +677,7 @@ int intel_wait_ring_buffer(struct drm_device *dev,
                 if (ring->space < 0)
                         ring->space += ring->size;
                 if (ring->space >= n) {
-                        trace_i915_ring_wait_end (dev);
+                        trace_i915_ring_wait_end(dev);
                         return 0;
                 }
 
@@ -713,24 +693,24 @@ int intel_wait_ring_buffer(struct drm_device *dev,
         return -EBUSY;
 }
 
-void intel_ring_begin(struct drm_device *dev,
-                      struct intel_ring_buffer *ring,
+void intel_ring_begin(struct intel_ring_buffer *ring,
                       int num_dwords)
 {
         int n = 4*num_dwords;
+
         if (unlikely(ring->tail + n > ring->size))
-                intel_wrap_ring_buffer(dev, ring);
+                intel_wrap_ring_buffer(ring);
+
         if (unlikely(ring->space < n))
-                intel_wait_ring_buffer(dev, ring, n);
+                intel_wait_ring_buffer(ring, n);
 
         ring->space -= n;
 }
 
-void intel_ring_advance(struct drm_device *dev,
-                        struct intel_ring_buffer *ring)
+void intel_ring_advance(struct intel_ring_buffer *ring)
 {
         ring->tail &= ring->size - 1;
-        ring->write_tail(dev, ring, ring->tail);
+        ring->write_tail(ring, ring->tail);
 }
 
 static const struct intel_ring_buffer render_ring = {
@@ -745,7 +725,7 @@ static const struct intel_ring_buffer render_ring = {
         .get_seqno              = render_ring_get_seqno,
         .user_irq_get           = render_ring_get_user_irq,
         .user_irq_put           = render_ring_put_user_irq,
-        .dispatch_gem_execbuffer = render_ring_dispatch_gem_execbuffer,
+        .dispatch_execbuffer    = render_ring_dispatch_execbuffer,
 };
 
 /* ring buffer for bit-stream decoder */
@@ -755,22 +735,21 @@ static const struct intel_ring_buffer bsd_ring = {
         .id                     = RING_BSD,
         .mmio_base              = BSD_RING_BASE,
         .size                   = 32 * PAGE_SIZE,
-        .init                   = init_bsd_ring,
+        .init                   = init_ring_common,
         .write_tail             = ring_write_tail,
         .flush                  = bsd_ring_flush,
         .add_request            = ring_add_request,
         .get_seqno              = ring_status_page_get_seqno,
         .user_irq_get           = bsd_ring_get_user_irq,
         .user_irq_put           = bsd_ring_put_user_irq,
-        .dispatch_gem_execbuffer = ring_dispatch_gem_execbuffer,
+        .dispatch_execbuffer    = ring_dispatch_execbuffer,
 };
 
 
-static void gen6_bsd_ring_write_tail(struct drm_device *dev,
-                                     struct intel_ring_buffer *ring,
+static void gen6_bsd_ring_write_tail(struct intel_ring_buffer *ring,
                                      u32 value)
 {
-       drm_i915_private_t *dev_priv = dev->dev_private;
+       drm_i915_private_t *dev_priv = ring->dev->dev_private;
 
        /* Every tail move must follow the sequence below */
        I915_WRITE(GEN6_BSD_SLEEP_PSMI_CONTROL,
@@ -789,36 +768,33 @@ static void gen6_bsd_ring_write_tail(struct drm_device *dev,
                GEN6_BSD_SLEEP_PSMI_CONTROL_RC_ILDL_MESSAGE_ENABLE);
 }
 
-static void gen6_ring_flush(struct drm_device *dev,
-                            struct intel_ring_buffer *ring,
+static void gen6_ring_flush(struct intel_ring_buffer *ring,
                             u32 invalidate_domains,
                             u32 flush_domains)
 {
-       intel_ring_begin(dev, ring, 4);
-       intel_ring_emit(dev, ring, MI_FLUSH_DW);
-       intel_ring_emit(dev, ring, 0);
-       intel_ring_emit(dev, ring, 0);
-       intel_ring_emit(dev, ring, 0);
-       intel_ring_advance(dev, ring);
+       intel_ring_begin(ring, 4);
+       intel_ring_emit(ring, MI_FLUSH_DW);
+       intel_ring_emit(ring, 0);
+       intel_ring_emit(ring, 0);
+       intel_ring_emit(ring, 0);
+       intel_ring_advance(ring);
 }
 
 static int
-gen6_ring_dispatch_gem_execbuffer(struct drm_device *dev,
-                                  struct intel_ring_buffer *ring,
-                                  struct drm_i915_gem_execbuffer2 *exec,
-                                  struct drm_clip_rect *cliprects,
-                                  uint64_t exec_offset)
+gen6_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
+                              struct drm_i915_gem_execbuffer2 *exec,
+                              struct drm_clip_rect *cliprects,
+                              uint64_t exec_offset)
 {
        uint32_t exec_start;
 
        exec_start = (uint32_t) exec_offset + exec->batch_start_offset;
 
-       intel_ring_begin(dev, ring, 2);
-       intel_ring_emit(dev, ring,
-                       MI_BATCH_BUFFER_START | MI_BATCH_NON_SECURE_I965);
+       intel_ring_begin(ring, 2);
+       intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_NON_SECURE_I965);
        /* bit0-7 is the length on GEN6+ */
-       intel_ring_emit(dev, ring, exec_start);
-       intel_ring_advance(dev, ring);
+       intel_ring_emit(ring, exec_start);
+       intel_ring_advance(ring);
 
        return 0;
 }
@@ -829,27 +805,25 @@ static const struct intel_ring_buffer gen6_bsd_ring = {
        .id                      = RING_BSD,
        .mmio_base               = GEN6_BSD_RING_BASE,
        .size                    = 32 * PAGE_SIZE,
-       .init                    = init_bsd_ring,
+       .init                    = init_ring_common,
        .write_tail              = gen6_bsd_ring_write_tail,
        .flush                   = gen6_ring_flush,
        .add_request             = ring_add_request,
        .get_seqno               = ring_status_page_get_seqno,
        .user_irq_get            = bsd_ring_get_user_irq,
        .user_irq_put            = bsd_ring_put_user_irq,
-       .dispatch_gem_execbuffer = gen6_ring_dispatch_gem_execbuffer,
+       .dispatch_execbuffer     = gen6_ring_dispatch_execbuffer,
 };
 
 /* Blitter support (SandyBridge+) */
 
 static void
-blt_ring_get_user_irq(struct drm_device *dev,
-                      struct intel_ring_buffer *ring)
+blt_ring_get_user_irq(struct intel_ring_buffer *ring)
 {
         /* do nothing */
 }
 static void
-blt_ring_put_user_irq(struct drm_device *dev,
-                      struct intel_ring_buffer *ring)
+blt_ring_put_user_irq(struct intel_ring_buffer *ring)
 {
         /* do nothing */
 }
@@ -866,7 +840,7 @@ static const struct intel_ring_buffer gen6_blt_ring = {
        .get_seqno               = ring_status_page_get_seqno,
        .user_irq_get            = blt_ring_get_user_irq,
        .user_irq_put            = blt_ring_put_user_irq,
-       .dispatch_gem_execbuffer = gen6_ring_dispatch_gem_execbuffer,
+       .dispatch_execbuffer     = gen6_ring_dispatch_execbuffer,
 };
 
 int intel_init_render_ring_buffer(struct drm_device *dev)