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authorBen Widawsky <ben@bwidawsk.net>2013-05-28 22:22:21 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-05-31 14:54:10 -0400
commitea251324cac6c1e0402db073e5193f33aedd94f3 (patch)
treeabcb1b6373341ebc3c6954d8f559a53d3ff576ad /drivers/gpu/drm/i915/intel_ringbuffer.c
parent1950de14fd1b8ea27a411929156c7eccee2ad7c3 (diff)
drm/i915: Rename ring flush functions
Historically we considered the render ring to have special flush semantics and everything else to fall under a more general umbrella. Probably by coincidence more than anything we decided to make the bsd ring have the default *other* flush. As the new vebox ring exposes, the bsd ring is actually the weird one. Doing this allows us to call gen6_ring_flush for the vebox because calling blt_ring_flush would be weird... This patch should have no functional change. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 93ccd1e982e0..3022e1579e58 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1565,8 +1565,8 @@ static void gen6_bsd_ring_write_tail(struct intel_ring_buffer *ring,
1565 _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE)); 1565 _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
1566} 1566}
1567 1567
1568static int gen6_ring_flush(struct intel_ring_buffer *ring, 1568static int gen6_bsd_ring_flush(struct intel_ring_buffer *ring,
1569 u32 invalidate, u32 flush) 1569 u32 invalidate, u32 flush)
1570{ 1570{
1571 uint32_t cmd; 1571 uint32_t cmd;
1572 int ret; 1572 int ret;
@@ -1637,8 +1637,8 @@ gen6_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
1637 1637
1638/* Blitter support (SandyBridge+) */ 1638/* Blitter support (SandyBridge+) */
1639 1639
1640static int blt_ring_flush(struct intel_ring_buffer *ring, 1640static int gen6_ring_flush(struct intel_ring_buffer *ring,
1641 u32 invalidate, u32 flush) 1641 u32 invalidate, u32 flush)
1642{ 1642{
1643 uint32_t cmd; 1643 uint32_t cmd;
1644 int ret; 1644 int ret;
@@ -1838,7 +1838,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
1838 /* gen6 bsd needs a special wa for tail updates */ 1838 /* gen6 bsd needs a special wa for tail updates */
1839 if (IS_GEN6(dev)) 1839 if (IS_GEN6(dev))
1840 ring->write_tail = gen6_bsd_ring_write_tail; 1840 ring->write_tail = gen6_bsd_ring_write_tail;
1841 ring->flush = gen6_ring_flush; 1841 ring->flush = gen6_bsd_ring_flush;
1842 ring->add_request = gen6_add_request; 1842 ring->add_request = gen6_add_request;
1843 ring->get_seqno = gen6_ring_get_seqno; 1843 ring->get_seqno = gen6_ring_get_seqno;
1844 ring->set_seqno = ring_set_seqno; 1844 ring->set_seqno = ring_set_seqno;
@@ -1887,7 +1887,7 @@ int intel_init_blt_ring_buffer(struct drm_device *dev)
1887 1887
1888 ring->mmio_base = BLT_RING_BASE; 1888 ring->mmio_base = BLT_RING_BASE;
1889 ring->write_tail = ring_write_tail; 1889 ring->write_tail = ring_write_tail;
1890 ring->flush = blt_ring_flush; 1890 ring->flush = gen6_ring_flush;
1891 ring->add_request = gen6_add_request; 1891 ring->add_request = gen6_add_request;
1892 ring->get_seqno = gen6_ring_get_seqno; 1892 ring->get_seqno = gen6_ring_get_seqno;
1893 ring->set_seqno = ring_set_seqno; 1893 ring->set_seqno = ring_set_seqno;