drm/i915: wrap GTIMR changes

Just like the functions that touch DEIMR and SDEIMR, but for GTIMR.
The new functions contain a POSTING_READ(GTIMR) which was not present
at the 2 callers inside i915_irq.c.

The implementation is based on ibx_display_interrupt_update.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 6 insertions, 16 deletions

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 34777168f700..2e370804248f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -836,11 +836,8 @@ gen5_ring_get_irq(struct intel_ring_buffer *ring)
                 return false;
 
         spin_lock_irqsave(&dev_priv->irq_lock, flags);
-        if (ring->irq_refcount++ == 0) {
-                dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;
-                I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
-                POSTING_READ(GTIMR);
-        }
+        if (ring->irq_refcount++ == 0)
+                ilk_enable_gt_irq(dev_priv, ring->irq_enable_mask);
         spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
 
         return true;
@@ -854,11 +851,8 @@ gen5_ring_put_irq(struct intel_ring_buffer *ring)
         unsigned long flags;
 
         spin_lock_irqsave(&dev_priv->irq_lock, flags);
-        if (--ring->irq_refcount == 0) {
-                dev_priv->gt_irq_mask |= ring->irq_enable_mask;
-                I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
-                POSTING_READ(GTIMR);
-        }
+        if (--ring->irq_refcount == 0)
+                ilk_disable_gt_irq(dev_priv, ring->irq_enable_mask);
         spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
 }
 
@@ -1028,9 +1022,7 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring)
                                          GT_RENDER_L3_PARITY_ERROR_INTERRUPT));
                 else
                         I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
-                dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;
-                I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
-                POSTING_READ(GTIMR);
+                ilk_enable_gt_irq(dev_priv, ring->irq_enable_mask);
         }
         spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
 
@@ -1051,9 +1043,7 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring)
                                        ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
                 else
                         I915_WRITE_IMR(ring, ~0);
-                dev_priv->gt_irq_mask |= ring->irq_enable_mask;
-                I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
-                POSTING_READ(GTIMR);
+                ilk_disable_gt_irq(dev_priv, ring->irq_enable_mask);
         }
         spin_unlock_irqrestore(&dev_priv->irq_lock, flags);