drm/i915/gen9: Implement WaDisableDgMirrorFixInHalfSliceChicken5

Move WaDisableDgMirrorFixInHalfSliceChicken5 to gen9_init_workarounds

v2: Added stepping check

v3: Removed unused register bitmap

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
[danvet: Bikesheds.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 0 insertions, 8 deletions

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index bebefe79f7ce..2b89aacdda90 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -63,14 +63,6 @@ static void gen9_init_clock_gating(struct drm_device *dev)
         I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
                    GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
 
-        /*
-         * WaDisableDgMirrorFixInHalfSliceChicken5:skl
-         * This is a pre-production w/a.
-         */
-        I915_WRITE(GEN9_HALF_SLICE_CHICKEN5,
-                   I915_READ(GEN9_HALF_SLICE_CHICKEN5) &
-                   ~GEN9_DG_MIRROR_FIX_ENABLE);
-
         /* Wa4x4STCOptimizationDisable:skl */
         I915_WRITE(CACHE_MODE_1,
                    _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));