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authorEugeni Dodonov <eugeni.dodonov@intel.com>2012-07-02 10:51:07 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-07-05 03:56:02 -0400
commit4a637c2c83a26f496688a28e629a3c0acb8a7be5 (patch)
tree1115fe7019bc8ea655840e965239985dfb35dd5f /drivers/gpu/drm/i915/intel_pm.c
parent7cf50fc8d7a491d9aa47e1a0262ed7d265f2bec3 (diff)
drm/i915: enable RC6 by default on Haswell
It should be working so let's turn it on by default and catch any possible issues faster. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e4c7eac656bd..28db512b5784 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2334,9 +2334,11 @@ int intel_enable_rc6(const struct drm_device *dev)
2334 if (INTEL_INFO(dev)->gen == 5) 2334 if (INTEL_INFO(dev)->gen == 5)
2335 return 0; 2335 return 0;
2336 2336
2337 /* Sorry Haswell, no RC6 for you for now. */ 2337 /* On Haswell, only RC6 is available. So let's enable it by default to
2338 * provide better testing and coverage since the beginning.
2339 */
2338 if (IS_HASWELL(dev)) 2340 if (IS_HASWELL(dev))
2339 return 0; 2341 return INTEL_RC6_ENABLE;
2340 2342
2341 /* 2343 /*
2342 * Disable rc6 on Sandybridge 2344 * Disable rc6 on Sandybridge