drm/i915: Don't program DSPCLK_GATE_D twice on IVB and VLV

We were programming register 0x42020 twice on those platforms. Once
should be enough.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 0 insertions, 6 deletions

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a0804ebdfd68..30ae8f55a45a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3498,11 +3498,8 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
         int pipe;
-        uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
         uint32_t snpcr;
 
-        I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate);
-
         I915_WRITE(WM3_LP_ILK, 0);
         I915_WRITE(WM2_LP_ILK, 0);
         I915_WRITE(WM1_LP_ILK, 0);
@@ -3580,9 +3577,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
         int pipe;
-        uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
-
-        I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate);
 
         I915_WRITE(WM3_LP_ILK, 0);
         I915_WRITE(WM2_LP_ILK, 0);