diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-26 16:02:54 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-03 05:18:20 -0400 |
commit | 507432986c15f18c5102b18027e4716fc9e9009e (patch) | |
tree | f0abd1cae95301e395398080dccf9397e129ba9e /drivers/gpu/drm/i915/intel_pm.c | |
parent | 624f8698c496f088d20be8ca8883811eb945b445 (diff) |
drm/i915: use the new masked bit macro some more
I've missed this one.
v2: Chris Wilson noticed another register.
v3: Color choice improvements.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 0552058a202f..e66330cc0934 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -2663,9 +2663,8 @@ static void gen6_init_clock_gating(struct drm_device *dev) | |||
2663 | I915_WRITE(WM2_LP_ILK, 0); | 2663 | I915_WRITE(WM2_LP_ILK, 0); |
2664 | I915_WRITE(WM1_LP_ILK, 0); | 2664 | I915_WRITE(WM1_LP_ILK, 0); |
2665 | 2665 | ||
2666 | /* clear masked bit */ | ||
2667 | I915_WRITE(CACHE_MODE_0, | 2666 | I915_WRITE(CACHE_MODE_0, |
2668 | CM0_STC_EVICT_DISABLE_LRA_SNB << CM0_MASK_SHIFT); | 2667 | _MASKED_BIT_DISABLE(CM0_STC_EVICT_DISABLE_LRA_SNB)); |
2669 | 2668 | ||
2670 | I915_WRITE(GEN6_UCGCTL1, | 2669 | I915_WRITE(GEN6_UCGCTL1, |
2671 | I915_READ(GEN6_UCGCTL1) | | 2670 | I915_READ(GEN6_UCGCTL1) | |