diff options
author | Dave Airlie <airlied@redhat.com> | 2011-03-15 21:34:41 -0400 |
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committer | Dave Airlie <airlied@redhat.com> | 2011-03-15 21:34:41 -0400 |
commit | 38f1cff0863809587b5fd10ecd0c24c8b543a48c (patch) | |
tree | 7cf6eb88cdc938c3683209d38311e711a1119400 /drivers/gpu/drm/i915/intel_panel.c | |
parent | 4819d2e4310796c4e9eef674499af9b9caf36b5a (diff) | |
parent | 5359533801e3dd3abca5b7d3d985b0b33fd9fe8b (diff) |
Merge commit '5359533801e3dd3abca5b7d3d985b0b33fd9fe8b' into drm-core-next
This commit changed an internal radeon structure, that meant a new driver
in -next had to be fixed up, merge in the commit and fix up the driver.
Also fixes a trivial nouveau merge.
Conflicts:
drivers/gpu/drm/nouveau/nouveau_mem.c
Diffstat (limited to 'drivers/gpu/drm/i915/intel_panel.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_panel.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 4e5ff593413d..a06ff07a4d3b 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c | |||
@@ -30,6 +30,8 @@ | |||
30 | 30 | ||
31 | #include "intel_drv.h" | 31 | #include "intel_drv.h" |
32 | 32 | ||
33 | #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ | ||
34 | |||
33 | void | 35 | void |
34 | intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, | 36 | intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, |
35 | struct drm_display_mode *adjusted_mode) | 37 | struct drm_display_mode *adjusted_mode) |
@@ -110,6 +112,19 @@ done: | |||
110 | dev_priv->pch_pf_size = (width << 16) | height; | 112 | dev_priv->pch_pf_size = (width << 16) | height; |
111 | } | 113 | } |
112 | 114 | ||
115 | static int is_backlight_combination_mode(struct drm_device *dev) | ||
116 | { | ||
117 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
118 | |||
119 | if (INTEL_INFO(dev)->gen >= 4) | ||
120 | return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE; | ||
121 | |||
122 | if (IS_GEN2(dev)) | ||
123 | return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE; | ||
124 | |||
125 | return 0; | ||
126 | } | ||
127 | |||
113 | static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) | 128 | static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) |
114 | { | 129 | { |
115 | u32 val; | 130 | u32 val; |
@@ -166,6 +181,9 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev) | |||
166 | if (INTEL_INFO(dev)->gen < 4) | 181 | if (INTEL_INFO(dev)->gen < 4) |
167 | max &= ~1; | 182 | max &= ~1; |
168 | } | 183 | } |
184 | |||
185 | if (is_backlight_combination_mode(dev)) | ||
186 | max *= 0xff; | ||
169 | } | 187 | } |
170 | 188 | ||
171 | DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); | 189 | DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); |
@@ -183,6 +201,14 @@ u32 intel_panel_get_backlight(struct drm_device *dev) | |||
183 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; | 201 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
184 | if (IS_PINEVIEW(dev)) | 202 | if (IS_PINEVIEW(dev)) |
185 | val >>= 1; | 203 | val >>= 1; |
204 | |||
205 | if (is_backlight_combination_mode(dev)){ | ||
206 | u8 lbpc; | ||
207 | |||
208 | val &= ~1; | ||
209 | pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); | ||
210 | val *= lbpc; | ||
211 | } | ||
186 | } | 212 | } |
187 | 213 | ||
188 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); | 214 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); |
@@ -205,6 +231,16 @@ void intel_panel_set_backlight(struct drm_device *dev, u32 level) | |||
205 | 231 | ||
206 | if (HAS_PCH_SPLIT(dev)) | 232 | if (HAS_PCH_SPLIT(dev)) |
207 | return intel_pch_panel_set_backlight(dev, level); | 233 | return intel_pch_panel_set_backlight(dev, level); |
234 | |||
235 | if (is_backlight_combination_mode(dev)){ | ||
236 | u32 max = intel_panel_get_max_backlight(dev); | ||
237 | u8 lbpc; | ||
238 | |||
239 | lbpc = level * 0xfe / max + 1; | ||
240 | level /= lbpc; | ||
241 | pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc); | ||
242 | } | ||
243 | |||
208 | tmp = I915_READ(BLC_PWM_CTL); | 244 | tmp = I915_READ(BLC_PWM_CTL); |
209 | if (IS_PINEVIEW(dev)) { | 245 | if (IS_PINEVIEW(dev)) { |
210 | tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1); | 246 | tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1); |