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authorChris Wilson <chris@chris-wilson.co.uk>2012-08-11 10:41:04 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-08-23 20:03:33 -0400
commit86a1ee26bb60e1ab8984e92f0e9186c354670aed (patch)
treed8eb2c95987bdf4c1fa6ef3998615eeee88ced08 /drivers/gpu/drm/i915/intel_overlay.c
parent53621860c38caff37fff99ba5f0b817511907bc4 (diff)
drm/i915: Only pwrite through the GTT if there is space in the aperture
Avoid stalling and waiting for the GPU by checking to see if there is sufficient inactive space in the aperture for us to bind the buffer prior to writing through the GTT. If there is inadequate space we will have to stall waiting for the GPU, and incur overheads moving objects about. Instead, only incur the clflush overhead on the target object by writing through shmem. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_overlay.c')
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index c0f48580405a..afd0f30ab882 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -1383,7 +1383,7 @@ void intel_setup_overlay(struct drm_device *dev)
1383 } 1383 }
1384 overlay->flip_addr = reg_bo->phys_obj->handle->busaddr; 1384 overlay->flip_addr = reg_bo->phys_obj->handle->busaddr;
1385 } else { 1385 } else {
1386 ret = i915_gem_object_pin(reg_bo, PAGE_SIZE, true); 1386 ret = i915_gem_object_pin(reg_bo, PAGE_SIZE, true, false);
1387 if (ret) { 1387 if (ret) {
1388 DRM_ERROR("failed to pin overlay register bo\n"); 1388 DRM_ERROR("failed to pin overlay register bo\n");
1389 goto out_free_bo; 1389 goto out_free_bo;