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authorChris Wilson <chris@chris-wilson.co.uk>2010-08-07 06:01:39 -0400
committerEric Anholt <eric@anholt.net>2010-08-09 14:24:36 -0400
commit6eeefaf3c86b8937db8ad930c48bfb592fc5e32e (patch)
treec73c07925f9bc2d23d62271e95fe083a764a3640 /drivers/gpu/drm/i915/intel_overlay.c
parent560b85bb750c3c539641993dd508b61260c9e874 (diff)
drm/i915: Apply i830 errata for cursor alignment
i830 requires 32bpp cursors to be aligned to 16KB, so we have to expose the alignment parameter to i915_gem_attach_phys_object(). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_overlay.c')
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 9ae61aa05a1f..4f00390d7c61 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -1367,7 +1367,8 @@ void intel_setup_overlay(struct drm_device *dev)
1367 overlay->flip_addr = overlay->reg_bo->gtt_offset; 1367 overlay->flip_addr = overlay->reg_bo->gtt_offset;
1368 } else { 1368 } else {
1369 ret = i915_gem_attach_phys_object(dev, reg_bo, 1369 ret = i915_gem_attach_phys_object(dev, reg_bo,
1370 I915_GEM_PHYS_OVERLAY_REGS); 1370 I915_GEM_PHYS_OVERLAY_REGS,
1371 0);
1371 if (ret) { 1372 if (ret) {
1372 DRM_ERROR("failed to attach phys overlay regs\n"); 1373 DRM_ERROR("failed to attach phys overlay regs\n");
1373 goto out_free_bo; 1374 goto out_free_bo;