drm/i915: Refactor panel backlight controls

There were two instances of code to control the panel backlight and
neither handled the complete set of device variations.

Fixes:

  Bug 29716 - [GM965] Regression: Backlight resets to minimum when changing resolution
  https://bugs.freedesktop.org/show_bug.cgi?id=29716

And a bug on one of my PineView boxes which overflowed the backlight
value.

Incorporates part of a similar patch by Matthew Garrett that exposes a
native Intel backlight controller.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

1 files changed, 6 insertions, 55 deletions

diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
index 3cb13237ba58..917c7dc3cd6b 100644
--- a/drivers/gpu/drm/i915/intel_opregion.c
+++ b/drivers/gpu/drm/i915/intel_opregion.c
@@ -31,9 +31,9 @@
 #include "drmP.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
+#include "intel_drv.h"
 
 #define PCI_ASLE 0xe4
-#define PCI_LBPC 0xf4
 #define PCI_ASLS 0xfc
 
 #define OPREGION_HEADER_OFFSET 0
@@ -147,36 +147,17 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
         struct opregion_asle *asle = dev_priv->opregion.asle;
-        u32 blc_pwm_ctl, blc_pwm_ctl2;
-        u32 max_backlight, level, shift;
+        u32 max;
 
         if (!(bclp & ASLE_BCLP_VALID))
                 return ASLE_BACKLIGHT_FAILED;
 
         bclp &= ASLE_BCLP_MSK;
-        if (bclp < 0 || bclp > 255)
+        if (bclp > 255)
                 return ASLE_BACKLIGHT_FAILED;
 
-        blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
-        blc_pwm_ctl2 = I915_READ(BLC_PWM_CTL2);
-
-        if (IS_I965G(dev) && (blc_pwm_ctl2 & BLM_COMBINATION_MODE))
-                pci_write_config_dword(dev->pdev, PCI_LBPC, bclp);
-        else {
-                if (IS_PINEVIEW(dev)) {
-                        blc_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
-                        max_backlight = (blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >> 
-                                        BACKLIGHT_MODULATION_FREQ_SHIFT;
-                        shift = BACKLIGHT_DUTY_CYCLE_SHIFT + 1;
-                } else {
-                        blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
-                        max_backlight = ((blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >> 
-                                        BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
-                        shift = BACKLIGHT_DUTY_CYCLE_SHIFT;
-                }
-                level = (bclp * max_backlight) / 255;
-                I915_WRITE(BLC_PWM_CTL, blc_pwm_ctl | (level << shift));
-        }
+        max = intel_panel_get_max_backlight(dev);
+        intel_panel_set_backlight(dev, bclp * max / 255);
         asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID;
 
         return 0;
@@ -243,36 +224,6 @@ void intel_opregion_asle_intr(struct drm_device *dev)
         asle->aslc = asle_stat;
 }
 
-static u32 asle_set_backlight_ironlake(struct drm_device *dev, u32 bclp)
-{
-        struct drm_i915_private *dev_priv = dev->dev_private;
-        struct opregion_asle *asle = dev_priv->opregion.asle;
-        u32 cpu_pwm_ctl, pch_pwm_ctl2;
-        u32 max_backlight, level;
-
-        if (!(bclp & ASLE_BCLP_VALID))
-                return ASLE_BACKLIGHT_FAILED;
-
-        bclp &= ASLE_BCLP_MSK;
-        if (bclp < 0 || bclp > 255)
-                return ASLE_BACKLIGHT_FAILED;
-
-        cpu_pwm_ctl = I915_READ(BLC_PWM_CPU_CTL);
-        pch_pwm_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
-        /* get the max PWM frequency */
-        max_backlight = (pch_pwm_ctl2 >> 16) & BACKLIGHT_DUTY_CYCLE_MASK;
-        /* calculate the expected PMW frequency */
-        level = (bclp * max_backlight) / 255;
-        /* reserve the high 16 bits */
-        cpu_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK);
-        /* write the updated PWM frequency */
-        I915_WRITE(BLC_PWM_CPU_CTL, cpu_pwm_ctl | level);
-
-        asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID;
-
-        return 0;
-}
-
 /* Only present on Ironlake+ */
 void intel_opregion_gse_intr(struct drm_device *dev)
 {
@@ -297,7 +248,7 @@ void intel_opregion_gse_intr(struct drm_device *dev)
         }
 
         if (asle_req & ASLE_SET_BACKLIGHT)
-                asle_stat |= asle_set_backlight_ironlake(dev, asle->bclp);
+                asle_stat |= asle_set_backlight(dev, asle->bclp);
 
         if (asle_req & ASLE_SET_PFIT) {
                 DRM_DEBUG_DRIVER("Pfit is not supported\n");