diff options
author | Keith Packard <keithp@keithp.com> | 2011-08-06 13:33:12 -0400 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2011-08-08 16:37:11 -0400 |
commit | ed10fca9c351c83ab89a97f3515089e0d36bdccc (patch) | |
tree | a9dfeda8301a1a7b10d502e5dece6f2f47d01c95 /drivers/gpu/drm/i915/intel_lvds.c | |
parent | de842eff41017721312d2747bcbee89c1beda6d0 (diff) |
drm/i915: Leave LVDS registers unlocked
There's no reason to relock them; it just makes operations more
complex. This fixes DPMS where the panel registers were locked making
the disable not work.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lvds.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 51 |
1 files changed, 16 insertions, 35 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 63188285d7f9..8b521a289b29 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -400,53 +400,21 @@ out: | |||
400 | 400 | ||
401 | static void intel_lvds_prepare(struct drm_encoder *encoder) | 401 | static void intel_lvds_prepare(struct drm_encoder *encoder) |
402 | { | 402 | { |
403 | struct drm_device *dev = encoder->dev; | ||
404 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
405 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); | 403 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
406 | 404 | ||
407 | /* We try to do the minimum that is necessary in order to unlock | 405 | /* |
408 | * the registers for mode setting. | ||
409 | * | ||
410 | * On Ironlake, this is quite simple as we just set the unlock key | ||
411 | * and ignore all subtleties. (This may cause some issues...) | ||
412 | * | ||
413 | * Prior to Ironlake, we must disable the pipe if we want to adjust | 406 | * Prior to Ironlake, we must disable the pipe if we want to adjust |
414 | * the panel fitter. However at all other times we can just reset | 407 | * the panel fitter. However at all other times we can just reset |
415 | * the registers regardless. | 408 | * the registers regardless. |
416 | */ | 409 | */ |
417 | 410 | if (!HAS_PCH_SPLIT(encoder->dev) && intel_lvds->pfit_dirty) | |
418 | if (HAS_PCH_SPLIT(dev)) { | 411 | intel_lvds_disable(intel_lvds); |
419 | I915_WRITE(PCH_PP_CONTROL, | ||
420 | I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); | ||
421 | } else if (intel_lvds->pfit_dirty) { | ||
422 | I915_WRITE(PP_CONTROL, | ||
423 | (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS) | ||
424 | & ~POWER_TARGET_ON); | ||
425 | } else { | ||
426 | I915_WRITE(PP_CONTROL, | ||
427 | I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); | ||
428 | } | ||
429 | } | 412 | } |
430 | 413 | ||
431 | static void intel_lvds_commit(struct drm_encoder *encoder) | 414 | static void intel_lvds_commit(struct drm_encoder *encoder) |
432 | { | 415 | { |
433 | struct drm_device *dev = encoder->dev; | ||
434 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
435 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); | 416 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
436 | 417 | ||
437 | /* Undo any unlocking done in prepare to prevent accidental | ||
438 | * adjustment of the registers. | ||
439 | */ | ||
440 | if (HAS_PCH_SPLIT(dev)) { | ||
441 | u32 val = I915_READ(PCH_PP_CONTROL); | ||
442 | if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS) | ||
443 | I915_WRITE(PCH_PP_CONTROL, val & 0x3); | ||
444 | } else { | ||
445 | u32 val = I915_READ(PP_CONTROL); | ||
446 | if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS) | ||
447 | I915_WRITE(PP_CONTROL, val & 0x3); | ||
448 | } | ||
449 | |||
450 | /* Always do a full power on as we do not know what state | 418 | /* Always do a full power on as we do not know what state |
451 | * we were left in. | 419 | * we were left in. |
452 | */ | 420 | */ |
@@ -1042,6 +1010,19 @@ out: | |||
1042 | pwm = I915_READ(BLC_PWM_PCH_CTL1); | 1010 | pwm = I915_READ(BLC_PWM_PCH_CTL1); |
1043 | pwm |= PWM_PCH_ENABLE; | 1011 | pwm |= PWM_PCH_ENABLE; |
1044 | I915_WRITE(BLC_PWM_PCH_CTL1, pwm); | 1012 | I915_WRITE(BLC_PWM_PCH_CTL1, pwm); |
1013 | /* | ||
1014 | * Unlock registers and just | ||
1015 | * leave them unlocked | ||
1016 | */ | ||
1017 | I915_WRITE(PCH_PP_CONTROL, | ||
1018 | I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); | ||
1019 | } else { | ||
1020 | /* | ||
1021 | * Unlock registers and just | ||
1022 | * leave them unlocked | ||
1023 | */ | ||
1024 | I915_WRITE(PP_CONTROL, | ||
1025 | I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); | ||
1045 | } | 1026 | } |
1046 | dev_priv->lid_notifier.notifier_call = intel_lid_notify; | 1027 | dev_priv->lid_notifier.notifier_call = intel_lid_notify; |
1047 | if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) { | 1028 | if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) { |