drm/i915: prepare HDMI link for Haswell

On Haswell, we need to properly train the DDI buffers prior to enabling
HDMI, and enable the required clocks with correct dividers for the desired
frequency.

Also, we cannot simple reuse HDMI routines from previous generations of
GPU, as most of HDMI-specific stuff is being done via the DDI port
programming instead of HDMI-specific registers.

This commit take advantage of the WR PLL clock table which is in a
separate (previous) commit to select the right divisors for each mode.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 12 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index a7871b18c201..03b3524a6ba2 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -560,6 +560,14 @@ static void intel_hdmi_destroy(struct drm_connector *connector)
         kfree(connector);
 }
 
+static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs_hsw = {
+        .dpms = intel_ddi_dpms,
+        .mode_fixup = intel_hdmi_mode_fixup,
+        .prepare = intel_encoder_prepare,
+        .mode_set = intel_ddi_mode_set,
+        .commit = intel_encoder_commit,
+};
+
 static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
         .dpms = intel_hdmi_dpms,
         .mode_fixup = intel_hdmi_mode_fixup,
@@ -699,7 +707,10 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
                         I915_WRITE(TVIDEO_DIP_CTL(i), 0);
         }
 
-        drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
+        if (IS_HASWELL(dev))
+                drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs_hsw);
+        else
+                drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
 
         intel_hdmi_add_properties(intel_hdmi, connector);