drm/i915: move cpu_transcoder to the pipe configuration

For a bunch of reason we need to more accurately track this:
- hw pipe state readout for Haswell needs the cpu transcoder.
- We need to know the right cpu transcoder in a bunch of places in
  ->disable and other modeset callbacks.

In the future we need to add hw state readout&check support, too. But
to avoid ugly merge conflicts do the rote sed job now without any
functional changes.

v2: Preserve the cpu_transcoder value when overwriting crtc->config.
Reported by Paulo.

Cc: Paulo Zanoni <przanoni@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v1)
[danvet: Removed rough whitespace that Chris spotted.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 3 insertions, 3 deletions

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 89122011720b..3e6a3ef10d5c 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -294,8 +294,8 @@ static void hsw_write_infoframe(struct drm_encoder *encoder,
         struct drm_device *dev = encoder->dev;
         struct drm_i915_private *dev_priv = dev->dev_private;
         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-        u32 ctl_reg = HSW_TVIDEO_DIP_CTL(intel_crtc->cpu_transcoder);
-        u32 data_reg = hsw_infoframe_data_reg(frame, intel_crtc->cpu_transcoder);
+        u32 ctl_reg = HSW_TVIDEO_DIP_CTL(intel_crtc->config.cpu_transcoder);
+        u32 data_reg = hsw_infoframe_data_reg(frame, intel_crtc->config.cpu_transcoder);
         unsigned int i, len = DIP_HEADER_SIZE + frame->len;
         u32 val = I915_READ(ctl_reg);
 
@@ -570,7 +570,7 @@ static void hsw_set_infoframes(struct drm_encoder *encoder,
         struct drm_i915_private *dev_priv = encoder->dev->dev_private;
         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
-        u32 reg = HSW_TVIDEO_DIP_CTL(intel_crtc->cpu_transcoder);
+        u32 reg = HSW_TVIDEO_DIP_CTL(intel_crtc->config.cpu_transcoder);
         u32 val = I915_READ(reg);
 
         assert_hdmi_port_disabled(intel_hdmi);