i915: enable AVI infoframe for intel_hdmi.c [v4]

This patch enables the sending of AVI infoframes in
drivers/gpu/drm/i915/intel_hdmi.c.

My receiver currently loses sync when the HDMI output on my computer
(DG45FC motherboard) is switched from 800x600 (the BIOS resolution) to
1920x1080 as part of the boot. Fixable by switching inputs on the receiver
a couple of times.

With this patch, my receiver has not lost sync yet (> 40 tries).

Fourth version, now based on drm-intel-next from:
git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel.git

Two questions still remain:

I'm assuming that the sdvo hardware also stores a header ECC byte in
the MSB of the first dword - is this correct?

Does the SDVOB and SDVOC handling in intel_hdmi_set_avi_infoframe()
look correct?

Signed-off-by: David Härdeman <david@hardeman.nu>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

1 files changed, 33 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 0581e5e5ac55..9af9f86a8765 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -178,6 +178,38 @@ struct intel_crtc {
 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 
+#define DIP_TYPE_AVI    0x82
+#define DIP_VERSION_AVI 0x2
+#define DIP_LEN_AVI     13
+
+struct dip_infoframe {
+        uint8_t type;           /* HB0 */
+        uint8_t ver;            /* HB1 */
+        uint8_t len;            /* HB2 - body len, not including checksum */
+        uint8_t ecc;            /* Header ECC */
+        uint8_t checksum;       /* PB0 */
+        union {
+                struct {
+                        /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
+                        uint8_t Y_A_B_S;
+                        /* PB2 - C 7:6, M 5:4, R 3:0 */
+                        uint8_t C_M_R;
+                        /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
+                        uint8_t ITC_EC_Q_SC;
+                        /* PB4 - VIC 6:0 */
+                        uint8_t VIC;
+                        /* PB5 - PR 3:0 */
+                        uint8_t PR;
+                        /* PB6 to PB13 */
+                        uint16_t top_bar_end;
+                        uint16_t bottom_bar_start;
+                        uint16_t left_bar_end;
+                        uint16_t right_bar_start;
+                } avi;
+                uint8_t payload[27];
+        } __attribute__ ((packed)) body;
+} __attribute__((packed));
+
 static inline struct drm_crtc *
 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 {
@@ -200,6 +232,7 @@ extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
 
 extern void intel_crt_init(struct drm_device *dev);
 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
+void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
 extern void intel_dvo_init(struct drm_device *dev);
 extern void intel_tv_init(struct drm_device *dev);