diff options
author | Dave Airlie <airlied@redhat.com> | 2009-12-07 23:03:47 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-12-07 23:03:47 -0500 |
commit | 3ff99164f67aae78a2bd2313f65ad55bddb1ffea (patch) | |
tree | d6bba03616d1be6ab9e6d9e92641a6f4047e1e15 /drivers/gpu/drm/i915/intel_dp.c | |
parent | 1bd049fa895f9c6743f38b52ce14775f5a31ea63 (diff) | |
parent | f2b115e69d46344ae7afcaad5823496d2a0d8650 (diff) |
Merge remote branch 'anholt/drm-intel-next' into drm-linus
This merges the upstream Intel tree and fixes up numerous conflicts
due to patches merged into Linus tree later in -rc cycle.
Conflicts:
drivers/char/agp/intel-agp.c
drivers/gpu/drm/drm_dp_i2c_helper.c
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_suspend.c
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 96 |
1 files changed, 74 insertions, 22 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 63424d5db9c6..4e7aa8b7b938 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include "i915_drv.h" | 35 | #include "i915_drv.h" |
36 | #include "drm_dp_helper.h" | 36 | #include "drm_dp_helper.h" |
37 | 37 | ||
38 | |||
38 | #define DP_LINK_STATUS_SIZE 6 | 39 | #define DP_LINK_STATUS_SIZE 6 |
39 | #define DP_LINK_CHECK_TIMEOUT (10 * 1000) | 40 | #define DP_LINK_CHECK_TIMEOUT (10 * 1000) |
40 | 41 | ||
@@ -223,8 +224,8 @@ intel_dp_aux_ch(struct intel_output *intel_output, | |||
223 | */ | 224 | */ |
224 | if (IS_eDP(intel_output)) | 225 | if (IS_eDP(intel_output)) |
225 | aux_clock_divider = 225; /* eDP input clock at 450Mhz */ | 226 | aux_clock_divider = 225; /* eDP input clock at 450Mhz */ |
226 | else if (IS_IGDNG(dev)) | 227 | else if (IS_IRONLAKE(dev)) |
227 | aux_clock_divider = 62; /* IGDNG: input clock fixed at 125Mhz */ | 228 | aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */ |
228 | else | 229 | else |
229 | aux_clock_divider = intel_hrawclk(dev) / 2; | 230 | aux_clock_divider = intel_hrawclk(dev) / 2; |
230 | 231 | ||
@@ -282,7 +283,7 @@ intel_dp_aux_ch(struct intel_output *intel_output, | |||
282 | /* Timeouts occur when the device isn't connected, so they're | 283 | /* Timeouts occur when the device isn't connected, so they're |
283 | * "normal" -- don't fill the kernel log with these */ | 284 | * "normal" -- don't fill the kernel log with these */ |
284 | if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) { | 285 | if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) { |
285 | DRM_DEBUG("dp_aux_ch timeout status 0x%08x\n", status); | 286 | DRM_DEBUG_KMS("dp_aux_ch timeout status 0x%08x\n", status); |
286 | return -ETIMEDOUT; | 287 | return -ETIMEDOUT; |
287 | } | 288 | } |
288 | 289 | ||
@@ -432,7 +433,7 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | |||
432 | msg, msg_bytes, | 433 | msg, msg_bytes, |
433 | reply, reply_bytes); | 434 | reply, reply_bytes); |
434 | if (ret < 0) { | 435 | if (ret < 0) { |
435 | DRM_DEBUG("aux_ch failed %d\n", ret); | 436 | DRM_DEBUG_KMS("aux_ch failed %d\n", ret); |
436 | return ret; | 437 | return ret; |
437 | } | 438 | } |
438 | switch (reply[0] & AUX_I2C_REPLY_MASK) { | 439 | switch (reply[0] & AUX_I2C_REPLY_MASK) { |
@@ -442,10 +443,10 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | |||
442 | } | 443 | } |
443 | return reply_bytes - 1; | 444 | return reply_bytes - 1; |
444 | case AUX_I2C_REPLY_NACK: | 445 | case AUX_I2C_REPLY_NACK: |
445 | DRM_DEBUG("aux_ch nack\n"); | 446 | DRM_DEBUG_KMS("aux_ch nack\n"); |
446 | return -EREMOTEIO; | 447 | return -EREMOTEIO; |
447 | case AUX_I2C_REPLY_DEFER: | 448 | case AUX_I2C_REPLY_DEFER: |
448 | DRM_DEBUG("aux_ch defer\n"); | 449 | DRM_DEBUG_KMS("aux_ch defer\n"); |
449 | udelay(100); | 450 | udelay(100); |
450 | break; | 451 | break; |
451 | default: | 452 | default: |
@@ -495,7 +496,8 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
495 | dp_priv->link_bw = bws[clock]; | 496 | dp_priv->link_bw = bws[clock]; |
496 | dp_priv->lane_count = lane_count; | 497 | dp_priv->lane_count = lane_count; |
497 | adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw); | 498 | adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw); |
498 | DRM_DEBUG("Display port link bw %02x lane count %d clock %d\n", | 499 | DRM_DEBUG_KMS("Display port link bw %02x lane " |
500 | "count %d clock %d\n", | ||
499 | dp_priv->link_bw, dp_priv->lane_count, | 501 | dp_priv->link_bw, dp_priv->lane_count, |
500 | adjusted_mode->clock); | 502 | adjusted_mode->clock); |
501 | return true; | 503 | return true; |
@@ -574,7 +576,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
574 | intel_dp_compute_m_n(3, lane_count, | 576 | intel_dp_compute_m_n(3, lane_count, |
575 | mode->clock, adjusted_mode->clock, &m_n); | 577 | mode->clock, adjusted_mode->clock, &m_n); |
576 | 578 | ||
577 | if (IS_IGDNG(dev)) { | 579 | if (IS_IRONLAKE(dev)) { |
578 | if (intel_crtc->pipe == 0) { | 580 | if (intel_crtc->pipe == 0) { |
579 | I915_WRITE(TRANSA_DATA_M1, | 581 | I915_WRITE(TRANSA_DATA_M1, |
580 | ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) | | 582 | ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) | |
@@ -666,23 +668,23 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
666 | } | 668 | } |
667 | } | 669 | } |
668 | 670 | ||
669 | static void igdng_edp_backlight_on (struct drm_device *dev) | 671 | static void ironlake_edp_backlight_on (struct drm_device *dev) |
670 | { | 672 | { |
671 | struct drm_i915_private *dev_priv = dev->dev_private; | 673 | struct drm_i915_private *dev_priv = dev->dev_private; |
672 | u32 pp; | 674 | u32 pp; |
673 | 675 | ||
674 | DRM_DEBUG("\n"); | 676 | DRM_DEBUG_KMS("\n"); |
675 | pp = I915_READ(PCH_PP_CONTROL); | 677 | pp = I915_READ(PCH_PP_CONTROL); |
676 | pp |= EDP_BLC_ENABLE; | 678 | pp |= EDP_BLC_ENABLE; |
677 | I915_WRITE(PCH_PP_CONTROL, pp); | 679 | I915_WRITE(PCH_PP_CONTROL, pp); |
678 | } | 680 | } |
679 | 681 | ||
680 | static void igdng_edp_backlight_off (struct drm_device *dev) | 682 | static void ironlake_edp_backlight_off (struct drm_device *dev) |
681 | { | 683 | { |
682 | struct drm_i915_private *dev_priv = dev->dev_private; | 684 | struct drm_i915_private *dev_priv = dev->dev_private; |
683 | u32 pp; | 685 | u32 pp; |
684 | 686 | ||
685 | DRM_DEBUG("\n"); | 687 | DRM_DEBUG_KMS("\n"); |
686 | pp = I915_READ(PCH_PP_CONTROL); | 688 | pp = I915_READ(PCH_PP_CONTROL); |
687 | pp &= ~EDP_BLC_ENABLE; | 689 | pp &= ~EDP_BLC_ENABLE; |
688 | I915_WRITE(PCH_PP_CONTROL, pp); | 690 | I915_WRITE(PCH_PP_CONTROL, pp); |
@@ -701,13 +703,13 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) | |||
701 | if (dp_reg & DP_PORT_EN) { | 703 | if (dp_reg & DP_PORT_EN) { |
702 | intel_dp_link_down(intel_output, dp_priv->DP); | 704 | intel_dp_link_down(intel_output, dp_priv->DP); |
703 | if (IS_eDP(intel_output)) | 705 | if (IS_eDP(intel_output)) |
704 | igdng_edp_backlight_off(dev); | 706 | ironlake_edp_backlight_off(dev); |
705 | } | 707 | } |
706 | } else { | 708 | } else { |
707 | if (!(dp_reg & DP_PORT_EN)) { | 709 | if (!(dp_reg & DP_PORT_EN)) { |
708 | intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); | 710 | intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); |
709 | if (IS_eDP(intel_output)) | 711 | if (IS_eDP(intel_output)) |
710 | igdng_edp_backlight_on(dev); | 712 | ironlake_edp_backlight_on(dev); |
711 | } | 713 | } |
712 | } | 714 | } |
713 | dp_priv->dpms_mode = mode; | 715 | dp_priv->dpms_mode = mode; |
@@ -1070,7 +1072,7 @@ intel_dp_link_down(struct intel_output *intel_output, uint32_t DP) | |||
1070 | struct drm_i915_private *dev_priv = dev->dev_private; | 1072 | struct drm_i915_private *dev_priv = dev->dev_private; |
1071 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1073 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; |
1072 | 1074 | ||
1073 | DRM_DEBUG("\n"); | 1075 | DRM_DEBUG_KMS("\n"); |
1074 | 1076 | ||
1075 | if (IS_eDP(intel_output)) { | 1077 | if (IS_eDP(intel_output)) { |
1076 | DP &= ~DP_PLL_ENABLE; | 1078 | DP &= ~DP_PLL_ENABLE; |
@@ -1131,7 +1133,7 @@ intel_dp_check_link_status(struct intel_output *intel_output) | |||
1131 | } | 1133 | } |
1132 | 1134 | ||
1133 | static enum drm_connector_status | 1135 | static enum drm_connector_status |
1134 | igdng_dp_detect(struct drm_connector *connector) | 1136 | ironlake_dp_detect(struct drm_connector *connector) |
1135 | { | 1137 | { |
1136 | struct intel_output *intel_output = to_intel_output(connector); | 1138 | struct intel_output *intel_output = to_intel_output(connector); |
1137 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1139 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; |
@@ -1166,8 +1168,8 @@ intel_dp_detect(struct drm_connector *connector) | |||
1166 | 1168 | ||
1167 | dp_priv->has_audio = false; | 1169 | dp_priv->has_audio = false; |
1168 | 1170 | ||
1169 | if (IS_IGDNG(dev)) | 1171 | if (IS_IRONLAKE(dev)) |
1170 | return igdng_dp_detect(connector); | 1172 | return ironlake_dp_detect(connector); |
1171 | 1173 | ||
1172 | temp = I915_READ(PORT_HOTPLUG_EN); | 1174 | temp = I915_READ(PORT_HOTPLUG_EN); |
1173 | 1175 | ||
@@ -1287,7 +1289,53 @@ intel_dp_hot_plug(struct intel_output *intel_output) | |||
1287 | if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON) | 1289 | if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON) |
1288 | intel_dp_check_link_status(intel_output); | 1290 | intel_dp_check_link_status(intel_output); |
1289 | } | 1291 | } |
1290 | 1292 | /* | |
1293 | * Enumerate the child dev array parsed from VBT to check whether | ||
1294 | * the given DP is present. | ||
1295 | * If it is present, return 1. | ||
1296 | * If it is not present, return false. | ||
1297 | * If no child dev is parsed from VBT, it is assumed that the given | ||
1298 | * DP is present. | ||
1299 | */ | ||
1300 | static int dp_is_present_in_vbt(struct drm_device *dev, int dp_reg) | ||
1301 | { | ||
1302 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
1303 | struct child_device_config *p_child; | ||
1304 | int i, dp_port, ret; | ||
1305 | |||
1306 | if (!dev_priv->child_dev_num) | ||
1307 | return 1; | ||
1308 | |||
1309 | dp_port = 0; | ||
1310 | if (dp_reg == DP_B || dp_reg == PCH_DP_B) | ||
1311 | dp_port = PORT_IDPB; | ||
1312 | else if (dp_reg == DP_C || dp_reg == PCH_DP_C) | ||
1313 | dp_port = PORT_IDPC; | ||
1314 | else if (dp_reg == DP_D || dp_reg == PCH_DP_D) | ||
1315 | dp_port = PORT_IDPD; | ||
1316 | |||
1317 | ret = 0; | ||
1318 | for (i = 0; i < dev_priv->child_dev_num; i++) { | ||
1319 | p_child = dev_priv->child_dev + i; | ||
1320 | /* | ||
1321 | * If the device type is not DP, continue. | ||
1322 | */ | ||
1323 | if (p_child->device_type != DEVICE_TYPE_DP && | ||
1324 | p_child->device_type != DEVICE_TYPE_eDP) | ||
1325 | continue; | ||
1326 | /* Find the eDP port */ | ||
1327 | if (dp_reg == DP_A && p_child->device_type == DEVICE_TYPE_eDP) { | ||
1328 | ret = 1; | ||
1329 | break; | ||
1330 | } | ||
1331 | /* Find the DP port */ | ||
1332 | if (p_child->dvo_port == dp_port) { | ||
1333 | ret = 1; | ||
1334 | break; | ||
1335 | } | ||
1336 | } | ||
1337 | return ret; | ||
1338 | } | ||
1291 | void | 1339 | void |
1292 | intel_dp_init(struct drm_device *dev, int output_reg) | 1340 | intel_dp_init(struct drm_device *dev, int output_reg) |
1293 | { | 1341 | { |
@@ -1297,6 +1345,10 @@ intel_dp_init(struct drm_device *dev, int output_reg) | |||
1297 | struct intel_dp_priv *dp_priv; | 1345 | struct intel_dp_priv *dp_priv; |
1298 | const char *name = NULL; | 1346 | const char *name = NULL; |
1299 | 1347 | ||
1348 | if (!dp_is_present_in_vbt(dev, output_reg)) { | ||
1349 | DRM_DEBUG_KMS("DP is not present. Ignore it\n"); | ||
1350 | return; | ||
1351 | } | ||
1300 | intel_output = kcalloc(sizeof(struct intel_output) + | 1352 | intel_output = kcalloc(sizeof(struct intel_output) + |
1301 | sizeof(struct intel_dp_priv), 1, GFP_KERNEL); | 1353 | sizeof(struct intel_dp_priv), 1, GFP_KERNEL); |
1302 | if (!intel_output) | 1354 | if (!intel_output) |
@@ -1314,11 +1366,11 @@ intel_dp_init(struct drm_device *dev, int output_reg) | |||
1314 | else | 1366 | else |
1315 | intel_output->type = INTEL_OUTPUT_DISPLAYPORT; | 1367 | intel_output->type = INTEL_OUTPUT_DISPLAYPORT; |
1316 | 1368 | ||
1317 | if (output_reg == DP_B) | 1369 | if (output_reg == DP_B || output_reg == PCH_DP_B) |
1318 | intel_output->clone_mask = (1 << INTEL_DP_B_CLONE_BIT); | 1370 | intel_output->clone_mask = (1 << INTEL_DP_B_CLONE_BIT); |
1319 | else if (output_reg == DP_C) | 1371 | else if (output_reg == DP_C || output_reg == PCH_DP_C) |
1320 | intel_output->clone_mask = (1 << INTEL_DP_C_CLONE_BIT); | 1372 | intel_output->clone_mask = (1 << INTEL_DP_C_CLONE_BIT); |
1321 | else if (output_reg == DP_D) | 1373 | else if (output_reg == DP_D || output_reg == PCH_DP_D) |
1322 | intel_output->clone_mask = (1 << INTEL_DP_D_CLONE_BIT); | 1374 | intel_output->clone_mask = (1 << INTEL_DP_D_CLONE_BIT); |
1323 | 1375 | ||
1324 | if (IS_eDP(intel_output)) { | 1376 | if (IS_eDP(intel_output)) { |