diff options
author | Zhao Yakui <yakui.zhao@intel.com> | 2009-10-08 23:39:41 -0400 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2009-11-05 17:47:11 -0500 |
commit | 28c97730c36e06d5ba0c442156eb2154347cc3fe (patch) | |
tree | 3c5dc547eae020bf602c27dc82c83d2e14610e21 /drivers/gpu/drm/i915/intel_dp.c | |
parent | 44d98a614267c81a04ba9c7a0427c3a628985b7d (diff) |
drm/i915: Replace DRM_DEBUG with DRM_DEBUG_KMS
Replace the DRM_DEBUG with DRM_DEBUG_KMS in output device code.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d83447557f9b..fcab9dee93da 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -282,7 +282,7 @@ intel_dp_aux_ch(struct intel_output *intel_output, | |||
282 | /* Timeouts occur when the device isn't connected, so they're | 282 | /* Timeouts occur when the device isn't connected, so they're |
283 | * "normal" -- don't fill the kernel log with these */ | 283 | * "normal" -- don't fill the kernel log with these */ |
284 | if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) { | 284 | if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) { |
285 | DRM_DEBUG("dp_aux_ch timeout status 0x%08x\n", status); | 285 | DRM_DEBUG_KMS("dp_aux_ch timeout status 0x%08x\n", status); |
286 | return -ETIMEDOUT; | 286 | return -ETIMEDOUT; |
287 | } | 287 | } |
288 | 288 | ||
@@ -435,7 +435,8 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
435 | dp_priv->link_bw = bws[clock]; | 435 | dp_priv->link_bw = bws[clock]; |
436 | dp_priv->lane_count = lane_count; | 436 | dp_priv->lane_count = lane_count; |
437 | adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw); | 437 | adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw); |
438 | DRM_DEBUG("Display port link bw %02x lane count %d clock %d\n", | 438 | DRM_DEBUG_KMS("Display port link bw %02x lane " |
439 | "count %d clock %d\n", | ||
439 | dp_priv->link_bw, dp_priv->lane_count, | 440 | dp_priv->link_bw, dp_priv->lane_count, |
440 | adjusted_mode->clock); | 441 | adjusted_mode->clock); |
441 | return true; | 442 | return true; |
@@ -611,7 +612,7 @@ static void igdng_edp_backlight_on (struct drm_device *dev) | |||
611 | struct drm_i915_private *dev_priv = dev->dev_private; | 612 | struct drm_i915_private *dev_priv = dev->dev_private; |
612 | u32 pp; | 613 | u32 pp; |
613 | 614 | ||
614 | DRM_DEBUG("\n"); | 615 | DRM_DEBUG_KMS("\n"); |
615 | pp = I915_READ(PCH_PP_CONTROL); | 616 | pp = I915_READ(PCH_PP_CONTROL); |
616 | pp |= EDP_BLC_ENABLE; | 617 | pp |= EDP_BLC_ENABLE; |
617 | I915_WRITE(PCH_PP_CONTROL, pp); | 618 | I915_WRITE(PCH_PP_CONTROL, pp); |
@@ -622,7 +623,7 @@ static void igdng_edp_backlight_off (struct drm_device *dev) | |||
622 | struct drm_i915_private *dev_priv = dev->dev_private; | 623 | struct drm_i915_private *dev_priv = dev->dev_private; |
623 | u32 pp; | 624 | u32 pp; |
624 | 625 | ||
625 | DRM_DEBUG("\n"); | 626 | DRM_DEBUG_KMS("\n"); |
626 | pp = I915_READ(PCH_PP_CONTROL); | 627 | pp = I915_READ(PCH_PP_CONTROL); |
627 | pp &= ~EDP_BLC_ENABLE; | 628 | pp &= ~EDP_BLC_ENABLE; |
628 | I915_WRITE(PCH_PP_CONTROL, pp); | 629 | I915_WRITE(PCH_PP_CONTROL, pp); |
@@ -1010,7 +1011,7 @@ intel_dp_link_down(struct intel_output *intel_output, uint32_t DP) | |||
1010 | struct drm_i915_private *dev_priv = dev->dev_private; | 1011 | struct drm_i915_private *dev_priv = dev->dev_private; |
1011 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1012 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; |
1012 | 1013 | ||
1013 | DRM_DEBUG("\n"); | 1014 | DRM_DEBUG_KMS("\n"); |
1014 | 1015 | ||
1015 | if (IS_eDP(intel_output)) { | 1016 | if (IS_eDP(intel_output)) { |
1016 | DP &= ~DP_PLL_ENABLE; | 1017 | DP &= ~DP_PLL_ENABLE; |