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author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-07-20 23:39:28 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-07-20 23:39:28 -0400 |
commit | 5556ea4df6426e2a11f459a633e26cb7466e0d1c (patch) | |
tree | a8ecc76c7d4247beba150e630fc89ae7cae33c18 /drivers/gpu/drm/i915/intel_dp.c | |
parent | cfad81ce28b6d47fbc7c8afabd3ab16d9a8499e9 (diff) | |
parent | e898c791e1a4c27fa1f221058b29b0ad06ddf8b0 (diff) |
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull intel drm fixes from Dave Airlie:
"Intel fixes came in late, but since I debugged one of them I'll send
them on,
Two reverts, a quirk and one warn regression"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
Revert "drm/i915: reverse dp link param selection, prefer fast over wide again"
drm/i915: Track the primary plane correctly when reassigning planes
drm/i915: Ignore VBT backlight presence check on HP Chromebook 14
Revert "drm/i915: Don't set the 8to6 dither flag when not scaling"
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 075170d1844f..8a1a4fbc06ac 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -906,8 +906,8 @@ intel_dp_compute_config(struct intel_encoder *encoder, | |||
906 | mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock, | 906 | mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock, |
907 | bpp); | 907 | bpp); |
908 | 908 | ||
909 | for (lane_count = min_lane_count; lane_count <= max_lane_count; lane_count <<= 1) { | 909 | for (clock = min_clock; clock <= max_clock; clock++) { |
910 | for (clock = min_clock; clock <= max_clock; clock++) { | 910 | for (lane_count = min_lane_count; lane_count <= max_lane_count; lane_count <<= 1) { |
911 | link_clock = drm_dp_bw_code_to_link_rate(bws[clock]); | 911 | link_clock = drm_dp_bw_code_to_link_rate(bws[clock]); |
912 | link_avail = intel_dp_max_data_rate(link_clock, | 912 | link_avail = intel_dp_max_data_rate(link_clock, |
913 | lane_count); | 913 | lane_count); |