diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-08-23 12:43:35 -0400 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-08 05:13:29 -0400 |
commit | 481b6af3d1f36d4a19bd36321c1e9f713db49aad (patch) | |
tree | af86f7fdd673130fe726df2bd822eb45abce63a4 /drivers/gpu/drm/i915/intel_dp.c | |
parent | 75ef9da2cdb64e7926404dd2b755bbbfe98eaeaf (diff) |
drm/i915: Drop the msleep parameter to wait_for()
Jesse's feedback from using the wait_for() macro was that the msleep
argument was that it was superfluous and made the macro more difficult
to use and to read. As the actually amount of time to sleep is not
critical, the crucial part is to sleep and let the processor schedule
something else whilst we wait for the event, replace the argument with a
hardcoded value.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index b1fc65b41275..3449a3b89e7f 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -772,7 +772,7 @@ static void ironlake_edp_panel_on (struct drm_device *dev) | |||
772 | pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON; | 772 | pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON; |
773 | I915_WRITE(PCH_PP_CONTROL, pp); | 773 | I915_WRITE(PCH_PP_CONTROL, pp); |
774 | 774 | ||
775 | if (wait_for(I915_READ(PCH_PP_STATUS) & PP_ON, 5000, 10)) | 775 | if (wait_for(I915_READ(PCH_PP_STATUS) & PP_ON, 5000)) |
776 | DRM_ERROR("panel on wait timed out: 0x%08x\n", | 776 | DRM_ERROR("panel on wait timed out: 0x%08x\n", |
777 | I915_READ(PCH_PP_STATUS)); | 777 | I915_READ(PCH_PP_STATUS)); |
778 | 778 | ||
@@ -797,7 +797,7 @@ static void ironlake_edp_panel_off (struct drm_device *dev) | |||
797 | pp &= ~POWER_TARGET_ON; | 797 | pp &= ~POWER_TARGET_ON; |
798 | I915_WRITE(PCH_PP_CONTROL, pp); | 798 | I915_WRITE(PCH_PP_CONTROL, pp); |
799 | 799 | ||
800 | if (wait_for((I915_READ(PCH_PP_STATUS) & PP_ON) == 0, 5000, 10)) | 800 | if (wait_for((I915_READ(PCH_PP_STATUS) & PP_ON) == 0, 5000)) |
801 | DRM_ERROR("panel off wait timed out: 0x%08x\n", | 801 | DRM_ERROR("panel off wait timed out: 0x%08x\n", |
802 | I915_READ(PCH_PP_STATUS)); | 802 | I915_READ(PCH_PP_STATUS)); |
803 | 803 | ||